Re: [PATCH 0/3] STM32 Extended TrustZone Protection driver

On 28/02/18 17:53, Mark Rutland wrote: [...] It is not about to "check" the DT but if Linux could get access to the hardware. Hardware block assignment to secure or non-secure world could change at runtime for example I2C block could be manage by secure OS for a trusted application and when it

Re: [PATCH 0/3] STM32 Extended TrustZone Protection driver

On 28/02/18 17:53, Mark Rutland wrote: [...] It is not about to "check" the DT but if Linux could get access to the hardware. Hardware block assignment to secure or non-secure world could change at runtime for example I2C block could be manage by secure OS for a trusted application and when it

[RFC PATCH v4 7/7] KVM: x86: Allow Qemu/KVM to use PVH entry point

For certain applications it is desirable to rapidly boot a KVM virtual machine. In cases where legacy hardware and software support within the guest is not needed, Qemu should be able to boot directly into the uncompressed Linux kernel binary without the need to run firmware. There already exists

[RFC PATCH v4 7/7] KVM: x86: Allow Qemu/KVM to use PVH entry point

For certain applications it is desirable to rapidly boot a KVM virtual machine. In cases where legacy hardware and software support within the guest is not needed, Qemu should be able to boot directly into the uncompressed Linux kernel binary without the need to run firmware. There already exists

[RFC PATCH v4 0/7] KVM: x86: Allow Qemu/KVM to use PVH entry point

Sorry for the delay between this version and the last -- it was mostly due to holidays and everyone being focused on security bug mitigation issues. Here are the links to the previous email threads in case it is helpful: V3: https://lkml.org/lkml/2017/12/12/1230 V2:

[RFC PATCH v4 0/7] KVM: x86: Allow Qemu/KVM to use PVH entry point

Sorry for the delay between this version and the last -- it was mostly due to holidays and everyone being focused on security bug mitigation issues. Here are the links to the previous email threads in case it is helpful: V3: https://lkml.org/lkml/2017/12/12/1230 V2:

[RFC PATCH v4 4/7] xen/pvh: Move Xen specific PVH VM initialization out of common code

We need to refactor PVH entry code so that support for other hypervisors like Qemu/KVM can be added more easily. This patch moves the small block of code used for initializing Xen PVH virtual machines into the Xen specific file. This initialization is not going to be needed for Qemu/KVM guests.

[RFC PATCH v4 4/7] xen/pvh: Move Xen specific PVH VM initialization out of common code

We need to refactor PVH entry code so that support for other hypervisors like Qemu/KVM can be added more easily. This patch moves the small block of code used for initializing Xen PVH virtual machines into the Xen specific file. This initialization is not going to be needed for Qemu/KVM guests.

[RFC PATCH v4 2/7] xen/pvh: Move PVH entry code out of Xen specific tree

Once hypervisors other than Xen start using the PVH entry point for starting VMs, we would like the option of being able to compile PVH entry capable kernels without enabling CONFIG_XEN and all the code that comes along with that. To allow that, we are moving the PVH code out of Xen and into files

[RFC PATCH v4 2/7] xen/pvh: Move PVH entry code out of Xen specific tree

Once hypervisors other than Xen start using the PVH entry point for starting VMs, we would like the option of being able to compile PVH entry capable kernels without enabling CONFIG_XEN and all the code that comes along with that. To allow that, we are moving the PVH code out of Xen and into files

[RFC PATCH v4 1/7] xen/pvh: Split CONFIG_XEN_PVH into CONFIG_PVH and CONFIG_XEN_PVH

In order to pave the way for hypervisors other then Xen to use the PVH entry point for VMs, we need to factor the PVH entry code into Xen specific and hypervisor agnostic components. The first step in doing that, is to create a new config option for PVH entry that can be enabled independently from

[RFC PATCH v4 1/7] xen/pvh: Split CONFIG_XEN_PVH into CONFIG_PVH and CONFIG_XEN_PVH

In order to pave the way for hypervisors other then Xen to use the PVH entry point for VMs, we need to factor the PVH entry code into Xen specific and hypervisor agnostic components. The first step in doing that, is to create a new config option for PVH entry that can be enabled independently from

[RFC PATCH v4 3/7] xen/pvh: Create a new file for Xen specific PVH code

We need to refactor PVH entry code so that support for other hypervisors like Qemu/KVM can be added more easily. The first step in that direction is to create a new file that will eventually hold the Xen specific routines. Signed-off-by: Maran Wilson --- arch/x86/pvh.c

[RFC PATCH v4 3/7] xen/pvh: Create a new file for Xen specific PVH code

We need to refactor PVH entry code so that support for other hypervisors like Qemu/KVM can be added more easily. The first step in that direction is to create a new file that will eventually hold the Xen specific routines. Signed-off-by: Maran Wilson --- arch/x86/pvh.c | 1 -

[RFC PATCH v4 5/7] xen/pvh: Move Xen code for getting mem map via hcall out of common file

We need to refactor PVH entry code so that support for other hypervisors like Qemu/KVM can be added more easily. The original design for PVH entry in Xen guests relies on being able to obtain the memory map from the hypervisor using a hypercall. When we extend the PVH entry ABI to support other

[RFC PATCH v4 5/7] xen/pvh: Move Xen code for getting mem map via hcall out of common file

We need to refactor PVH entry code so that support for other hypervisors like Qemu/KVM can be added more easily. The original design for PVH entry in Xen guests relies on being able to obtain the memory map from the hypervisor using a hypercall. When we extend the PVH entry ABI to support other

Re: [PATCH v2 11/11] test_firmware: test three firmware kernel configs using a proc knob

On Wed, Feb 28, 2018 at 01:07:23AM -0800, Josh Triplett wrote: > On Wed, Feb 28, 2018 at 01:32:37AM +, Luis R. Rodriguez wrote: > > On Tue, Feb 27, 2018 at 03:18:15PM -0800, Kees Cook wrote: > > > On Fri, Feb 23, 2018 at 6:46 PM, Luis R. Rodriguez > > > wrote: > > > >

Re: [PATCH v2 11/11] test_firmware: test three firmware kernel configs using a proc knob

On Wed, Feb 28, 2018 at 01:07:23AM -0800, Josh Triplett wrote: > On Wed, Feb 28, 2018 at 01:32:37AM +, Luis R. Rodriguez wrote: > > On Tue, Feb 27, 2018 at 03:18:15PM -0800, Kees Cook wrote: > > > On Fri, Feb 23, 2018 at 6:46 PM, Luis R. Rodriguez > > > wrote: > > > > Since we now have knobs

Re: [PATCH 00/10] Add Actions Semi S900 pinctrl and gpio support

On Wed, Feb 28, 2018 at 11:18:56PM +0530, Manivannan Sadhasivam wrote: > This patchset adds pinctrl and gpio support for Actions Semi S900 SoC. > Pinctrl and gpio subsystems share the common set of register range but > implemented as individual drivers for making it less complex. > > Pinmux

I Hope You Get My Message This Time

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Re: [PATCH 00/10] Add Actions Semi S900 pinctrl and gpio support

On Wed, Feb 28, 2018 at 11:18:56PM +0530, Manivannan Sadhasivam wrote: > This patchset adds pinctrl and gpio support for Actions Semi S900 SoC. > Pinctrl and gpio subsystems share the common set of register range but > implemented as individual drivers for making it less complex. > > Pinmux

I Hope You Get My Message This Time

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Re: [PATCH v2 4/6] x86: Consolidate PCI_MMCONFIG configs

On Wed, Feb 28, 2018 at 05:45:37PM +0200, Andy Shevchenko wrote: > On Wed, Feb 28, 2018 at 8:34 AM, Jan Kiszka wrote: > > From: Jan Kiszka > > > > Not sure if those two worked by design or just by chance so far. In any > > case, it's at least

Re: [PATCH v2 4/6] x86: Consolidate PCI_MMCONFIG configs

On Wed, Feb 28, 2018 at 05:45:37PM +0200, Andy Shevchenko wrote: > On Wed, Feb 28, 2018 at 8:34 AM, Jan Kiszka wrote: > > From: Jan Kiszka > > > > Not sure if those two worked by design or just by chance so far. In any > > case, it's at least cleaner and clearer to express this in a single > >

Re: [PATCH v3] of: cache phandle nodes to reduce cost of of_find_node_by_phandle()

On 02/28/18 05:27, Chintan Pandya wrote: > > > On 2/15/2018 6:22 AM, frowand.l...@gmail.com wrote: > >> +static void of_populate_phandle_cache(void) >> +{ >> +    unsigned long flags; >> +    u32 cache_entries; >> +    struct device_node *np; >> +    u32 phandles = 0; >> + >> +   

Re: [PATCH v3] of: cache phandle nodes to reduce cost of of_find_node_by_phandle()

On 02/28/18 05:27, Chintan Pandya wrote: > > > On 2/15/2018 6:22 AM, frowand.l...@gmail.com wrote: > >> +static void of_populate_phandle_cache(void) >> +{ >> +    unsigned long flags; >> +    u32 cache_entries; >> +    struct device_node *np; >> +    u32 phandles = 0; >> + >> +   

Re: [PATCH] drm/sun4i: init dclk_min_div & dclk_max_div inside encoder init functions

Hi, Il 28/02/2018 17:34, Giulio Benetti ha scritto: Hi, Il 28/02/2018 16:55, Maxime Ripard ha scritto: Hi, On Wed, Feb 28, 2018 at 01:51:58PM +0100, Giulio Benetti wrote: sun4i_dclk_round_rate is called before sun4i_tcon_mode_set, so it finds dclk_min_div and dclk_max_div set to 0 and fails

Re: [PATCH] drm/sun4i: init dclk_min_div & dclk_max_div inside encoder init functions

Hi, Il 28/02/2018 17:34, Giulio Benetti ha scritto: Hi, Il 28/02/2018 16:55, Maxime Ripard ha scritto: Hi, On Wed, Feb 28, 2018 at 01:51:58PM +0100, Giulio Benetti wrote: sun4i_dclk_round_rate is called before sun4i_tcon_mode_set, so it finds dclk_min_div and dclk_max_div set to 0 and fails

[PATCH] powerpc/dma: remove unnecessary BUG()

Direction is already checked in all calling functions in include/linux/dma-mapping.h and also in called function __dma_sync() So really no need to check it once more here. Signed-off-by: Christophe Leroy --- arch/powerpc/kernel/dma.c | 2 -- 1 file changed, 2

[PATCH] powerpc/dma: remove unnecessary BUG()

Direction is already checked in all calling functions in include/linux/dma-mapping.h and also in called function __dma_sync() So really no need to check it once more here. Signed-off-by: Christophe Leroy --- arch/powerpc/kernel/dma.c | 2 -- 1 file changed, 2 deletions(-) diff --git

[PATCH v3 02/10] arm64: dts: actions: Add pinctrl node for S900

Add pinctrl nodes for Actions Semi S900 SoC Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s900.dtsi | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/actions/s900.dtsi b/arch/arm64/boot/dts/actions/s900.dtsi

[PATCH v3 02/10] arm64: dts: actions: Add pinctrl node for S900

Add pinctrl nodes for Actions Semi S900 SoC Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s900.dtsi | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/actions/s900.dtsi b/arch/arm64/boot/dts/actions/s900.dtsi index fee0c9557656..0156483f0f4d

[PATCH v3 10/10] MAINTAINERS: Add Actions Semi S900 pinctrl and gpio entries

Add S900 pinctrl and gpio entries under ARCH_ACTIONS Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 4 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 640dabc4c311..d63793ee545e 100644 --- a/MAINTAINERS +++

[PATCH v3 10/10] MAINTAINERS: Add Actions Semi S900 pinctrl and gpio entries

Add S900 pinctrl and gpio entries under ARCH_ACTIONS Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 4 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 640dabc4c311..d63793ee545e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1125,10 +1125,14 @@ F:

[PATCH v3 09/10] MAINTAINERS: Add reviewer for ACTIONS platforms

Since I'll be working on improving support for ACTIONS platforms, adding myself as the reviewer. Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9a7f76eadae9..640dabc4c311

[PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

Add pinctrl driver for Actions Semi S900 SoC. The driver supports pinctrl, pinmux and pinconf functionalities through a range of registers common to both gpio driver and pinctrl driver. Pinmux functionality is available only for the pin groups while the pinconf functionality is available for both

[PATCH v3 09/10] MAINTAINERS: Add reviewer for ACTIONS platforms

Since I'll be working on improving support for ACTIONS platforms, adding myself as the reviewer. Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9a7f76eadae9..640dabc4c311 100644 --- a/MAINTAINERS +++

[PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

Add pinctrl driver for Actions Semi S900 SoC. The driver supports pinctrl, pinmux and pinconf functionalities through a range of registers common to both gpio driver and pinctrl driver. Pinmux functionality is available only for the pin groups while the pinconf functionality is available for both

[PATCH v3 03/10] arm64: actions: Enable PINCTRL in platforms Kconfig

Select PINCTRL for Actions Semi SoCs Signed-off-by: Manivannan Sadhasivam --- arch/arm64/Kconfig.platforms | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index fbedbd8f619a..bae1289bdc3f 100644

[PATCH v3 08/10] gpio: Add gpio driver for Actions OWL S900 SoC

Add gpio driver for Actions Semi OWL family S900 SoC. Set of registers controlling the gpio shares the same register range with pinctrl block. GPIO registers are organized as 6 banks and each bank controls the maximum of 32 gpios. Signed-off-by: Manivannan Sadhasivam

[PATCH v3 03/10] arm64: actions: Enable PINCTRL in platforms Kconfig

Select PINCTRL for Actions Semi SoCs Signed-off-by: Manivannan Sadhasivam --- arch/arm64/Kconfig.platforms | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index fbedbd8f619a..bae1289bdc3f 100644 --- a/arch/arm64/Kconfig.platforms

[PATCH v3 08/10] gpio: Add gpio driver for Actions OWL S900 SoC

Add gpio driver for Actions Semi OWL family S900 SoC. Set of registers controlling the gpio shares the same register range with pinctrl block. GPIO registers are organized as 6 banks and each bank controls the maximum of 32 gpios. Signed-off-by: Manivannan Sadhasivam --- drivers/gpio/Kconfig

[PATCH v3 05/10] dt-bindings: gpio: Add gpio nodes for Actions S900 SoC

Add gpio nodes for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- .../devicetree/bindings/gpio/actions,owl-gpio.txt | 95 ++ 1 file changed, 95 insertions(+) create mode 100644

[PATCH v3 05/10] dt-bindings: gpio: Add gpio nodes for Actions S900 SoC

Add gpio nodes for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- .../devicetree/bindings/gpio/actions,owl-gpio.txt | 95 ++ 1 file changed, 95 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt diff --git

[PATCH v3 07/10] arm64: dts: actions: Add gpio line names to Bubblegum-96 board

Add gpio line names to Actions Semi S900 based Bubblegum-96 board. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s900-bubblegum-96.dts | 195 ++ 1 file changed, 195 insertions(+) diff --git

[PATCH v3 07/10] arm64: dts: actions: Add gpio line names to Bubblegum-96 board

Add gpio line names to Actions Semi S900 based Bubblegum-96 board. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s900-bubblegum-96.dts | 195 ++ 1 file changed, 195 insertions(+) diff --git a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts

[PATCH v3 06/10] arm64: dts: actions: Add S900 gpio nodes

Add gpio nodes for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s900-bubblegum-96.dts | 6 +++ arch/arm64/boot/dts/actions/s900.dtsi | 48 +++ 2 files changed, 54 insertions(+)

[PATCH v3 06/10] arm64: dts: actions: Add S900 gpio nodes

Add gpio nodes for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s900-bubblegum-96.dts | 6 +++ arch/arm64/boot/dts/actions/s900.dtsi | 48 +++ 2 files changed, 54 insertions(+) diff --git

[PATCH v3 01/10] dt-bindings: pinctrl: Add bindings for Actions S900 SoC

Add pinctrl bindings for Actions Semi S900 SoC Signed-off-by: Manivannan Sadhasivam --- .../bindings/pinctrl/actions,s900-pinctrl.txt | 178 + 1 file changed, 178 insertions(+) create mode 100644

[PATCH v3 01/10] dt-bindings: pinctrl: Add bindings for Actions S900 SoC

Add pinctrl bindings for Actions Semi S900 SoC Signed-off-by: Manivannan Sadhasivam --- .../bindings/pinctrl/actions,s900-pinctrl.txt | 178 + 1 file changed, 178 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt diff

[PATCH v3 00/10] Add Actions Semi S900 pinctrl and gpio support

This patchset adds pinctrl and gpio support for Actions Semi S900 SoC. Pinctrl and gpio subsystems share the common set of register range but implemented as individual drivers for making it less complex. Pinmux functions are only accessible for pin groups while pinconf parameters are available

[PATCH v3 00/10] Add Actions Semi S900 pinctrl and gpio support

This patchset adds pinctrl and gpio support for Actions Semi S900 SoC. Pinctrl and gpio subsystems share the common set of register range but implemented as individual drivers for making it less complex. Pinmux functions are only accessible for pin groups while pinconf parameters are available

Re: [PATCH 3/3] mailbox: sunxi-msgbox: Add a new mailbox driver

On Wed, Feb 28, 2018 at 11:21 PM, Samuel Holland wrote: > Hi, > > On 02/28/18 03:16, Jassi Brar wrote: >> On Wed, Feb 28, 2018 at 7:57 AM, Samuel Holland wrote: >> >> >>> +/* >>> + * The message box hardware provides 8 unidirectional channels. As

Re: [PATCH 3/3] mailbox: sunxi-msgbox: Add a new mailbox driver

On Wed, Feb 28, 2018 at 11:21 PM, Samuel Holland wrote: > Hi, > > On 02/28/18 03:16, Jassi Brar wrote: >> On Wed, Feb 28, 2018 at 7:57 AM, Samuel Holland wrote: >> >> >>> +/* >>> + * The message box hardware provides 8 unidirectional channels. As the >>> mailbox >>> + * framework expects

[GIT PULL] dma-mapping fixe for Linux 4.16

The following changes since commit a638af00b27266c09ab7ac69141e6f4ac6c00eff: Merge tag 'usb-4.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb (2018-02-22 12:13:01 -0800) are available in the git repository at: git://git.infradead.org/users/hch/dma-mapping.git

[GIT PULL] dma-mapping fixe for Linux 4.16

The following changes since commit a638af00b27266c09ab7ac69141e6f4ac6c00eff: Merge tag 'usb-4.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb (2018-02-22 12:13:01 -0800) are available in the git repository at: git://git.infradead.org/users/hch/dma-mapping.git

Re: [RFC] power/hibernate: Make passing hibernate offsets more friendly

On Wed, Feb 28, 2018 at 7:43 PM, Mario Limonciello wrote: > Currently the only way to specify a hibernate offset for a swap > file is on the kernel command line. > > This makes some changes to improve: > 1) Add a new /sys/power/disk_offset that lets userspace specify >

Re: [RFC] power/hibernate: Make passing hibernate offsets more friendly

On Wed, Feb 28, 2018 at 7:43 PM, Mario Limonciello wrote: > Currently the only way to specify a hibernate offset for a swap > file is on the kernel command line. > > This makes some changes to improve: > 1) Add a new /sys/power/disk_offset that lets userspace specify > the offset and disk to use

Re: [PATCH v2 05/15] s390: vfio-ap: base implementation of VFIO AP device driver

On Wed, 28 Feb 2018 11:43:37 -0500 Tony Krowiak wrote: > On 02/28/2018 10:33 AM, Pierre Morel wrote: > > On 27/02/2018 15:28, Tony Krowiak wrote: (...) > >> diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig > >> index cbe1d97..9f23caf 100644 > >> ---

Re: [PATCH v2 05/15] s390: vfio-ap: base implementation of VFIO AP device driver

On Wed, 28 Feb 2018 11:43:37 -0500 Tony Krowiak wrote: > On 02/28/2018 10:33 AM, Pierre Morel wrote: > > On 27/02/2018 15:28, Tony Krowiak wrote: (...) > >> diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig > >> index cbe1d97..9f23caf 100644 > >> --- a/arch/s390/Kconfig > >> +++

[PATCH] X86/KVM: Update the exit_qualification access bits while walking an address

... to avoid having a stale value when handling an EPT misconfig for MMIO regions. MMIO regions that are not passed-through to the guest are handled through EPT misconfigs. The first time a certain MMIO page is touched it causes an EPT violation, then KVM marks the EPT entry to cause an EPT

[PATCH] X86/KVM: Update the exit_qualification access bits while walking an address

... to avoid having a stale value when handling an EPT misconfig for MMIO regions. MMIO regions that are not passed-through to the guest are handled through EPT misconfigs. The first time a certain MMIO page is touched it causes an EPT violation, then KVM marks the EPT entry to cause an EPT

Re: [RFT 0/7] firmware: enable caching of firmware for reboot optimization

On 28/02/18 01:20, Luis R. Rodriguez wrote: Cantabile, please give these patches a spin and let me know if it fixes your reported issue. They depend on other pending patches I have in line waiting to be merged so the easiest I thing I think is for you to test my 20180227-firmware-cache branch

Re: [RFT 0/7] firmware: enable caching of firmware for reboot optimization

On 28/02/18 01:20, Luis R. Rodriguez wrote: Cantabile, please give these patches a spin and let me know if it fixes your reported issue. They depend on other pending patches I have in line waiting to be merged so the easiest I thing I think is for you to test my 20180227-firmware-cache branch

Re: [RFC PATCH V2 13/22] x86/intel_rdt: Support schemata write - pseudo-locking core

On Wed, 28 Feb 2018, Thomas Gleixner wrote: > On Tue, 27 Feb 2018, Reinette Chatre wrote: > > On 2/20/2018 9:15 AM, Thomas Gleixner wrote: > > > Let's look at the existing crtl/mon groups which are each represented by a > > > directory already. > > > > > > - Adding a 'size' file to the ctrl

Re: [RFC PATCH V2 13/22] x86/intel_rdt: Support schemata write - pseudo-locking core

On Wed, 28 Feb 2018, Thomas Gleixner wrote: > On Tue, 27 Feb 2018, Reinette Chatre wrote: > > On 2/20/2018 9:15 AM, Thomas Gleixner wrote: > > > Let's look at the existing crtl/mon groups which are each represented by a > > > directory already. > > > > > > - Adding a 'size' file to the ctrl

Re: [RFC PATCH V2 13/22] x86/intel_rdt: Support schemata write - pseudo-locking core

On Tue, 27 Feb 2018, Reinette Chatre wrote: > On 2/20/2018 9:15 AM, Thomas Gleixner wrote: > > Let's look at the existing crtl/mon groups which are each represented by a > > directory already. > > > > - Adding a 'size' file to the ctrl groups would be a natural extension > >which makes sense

[PATCH 3/3] ima: support platform keyring for kernel appraisal

Distros may sign the kernel images and, possibly, the initramfs with platform trusted keys. On secure boot enabled systems or embedded devices, these signatures are to be validated using keys on the platform keyring. This patch enables IMA-appraisal to access the platform keyring, based on a new

Re: [RFC PATCH V2 13/22] x86/intel_rdt: Support schemata write - pseudo-locking core

On Tue, 27 Feb 2018, Reinette Chatre wrote: > On 2/20/2018 9:15 AM, Thomas Gleixner wrote: > > Let's look at the existing crtl/mon groups which are each represented by a > > directory already. > > > > - Adding a 'size' file to the ctrl groups would be a natural extension > >which makes sense

[PATCH 3/3] ima: support platform keyring for kernel appraisal

Distros may sign the kernel images and, possibly, the initramfs with platform trusted keys. On secure boot enabled systems or embedded devices, these signatures are to be validated using keys on the platform keyring. This patch enables IMA-appraisal to access the platform keyring, based on a new

[PATCH 2/3] keys: export find_keyring_by_name()

This patch exports the function find_keyring_by_name() to be used by other subsystems. Signed-off-by: Nayna Jain --- include/linux/key.h | 2 ++ security/keys/internal.h | 2 -- security/keys/keyring.c | 1 + 3 files changed, 3 insertions(+), 2 deletions(-) diff

[PATCH 2/3] keys: export find_keyring_by_name()

This patch exports the function find_keyring_by_name() to be used by other subsystems. Signed-off-by: Nayna Jain --- include/linux/key.h | 2 ++ security/keys/internal.h | 2 -- security/keys/keyring.c | 1 + 3 files changed, 3 insertions(+), 2 deletions(-) diff --git

[PATCH 1/3] certs: define a trusted platform keyring

The kernel can be supplied in SEEPROM or lockable flash memory in embedded devices. Some devices may not support secure boot, but the kernel is trusted because the image is stored in protected memory. That kernel may need to kexec additional kernels, it may be used as a bootloader, for example, or

[PATCH 1/3] certs: define a trusted platform keyring

The kernel can be supplied in SEEPROM or lockable flash memory in embedded devices. Some devices may not support secure boot, but the kernel is trusted because the image is stored in protected memory. That kernel may need to kexec additional kernels, it may be used as a bootloader, for example, or

Re: [PATCH v2 4/5] ipc: Clamp msgmni and shmmni to the real IPCMNI limit

On 02/27/2018 08:01 PM, Luis R. Rodriguez wrote: > On Tue, Feb 27, 2018 at 03:49:50PM -0500, Waiman Long wrote: >> diff --git a/ipc/ipc_sysctl.c b/ipc/ipc_sysctl.c >> index 8ad93c2..e4ab272 100644 >> --- a/ipc/ipc_sysctl.c >> +++ b/ipc/ipc_sysctl.c >> @@ -41,12 +41,17 @@ static int

Re: [PATCH v2 4/5] ipc: Clamp msgmni and shmmni to the real IPCMNI limit

On 02/27/2018 08:01 PM, Luis R. Rodriguez wrote: > On Tue, Feb 27, 2018 at 03:49:50PM -0500, Waiman Long wrote: >> diff --git a/ipc/ipc_sysctl.c b/ipc/ipc_sysctl.c >> index 8ad93c2..e4ab272 100644 >> --- a/ipc/ipc_sysctl.c >> +++ b/ipc/ipc_sysctl.c >> @@ -41,12 +41,17 @@ static int

[PATCH 01/10] dt-bindings: pinctrl: Add bindings for Actions S900 SoC

Add pinctrl bindings for Actions Semi S900 SoC Signed-off-by: Manivannan Sadhasivam --- .../bindings/pinctrl/actions,s900-pinctrl.txt | 178 + 1 file changed, 178 insertions(+) create mode 100644

[PATCH 01/10] dt-bindings: pinctrl: Add bindings for Actions S900 SoC

Add pinctrl bindings for Actions Semi S900 SoC Signed-off-by: Manivannan Sadhasivam --- .../bindings/pinctrl/actions,s900-pinctrl.txt | 178 + 1 file changed, 178 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt diff

[PATCH 2/2] drm/sun4i: add lvds mode_valid function

mode_valid function is missing for lvds. Add it based on rgb model, also setting up dclk_min_div and dclk_max_div Signed-off-by: Giulio Benetti --- drivers/gpu/drm/sun4i/sun4i_lvds.c | 55 ++ 1 file changed, 55 insertions(+)

[PATCH 2/2] drm/sun4i: add lvds mode_valid function

mode_valid function is missing for lvds. Add it based on rgb model, also setting up dclk_min_div and dclk_max_div Signed-off-by: Giulio Benetti --- drivers/gpu/drm/sun4i/sun4i_lvds.c | 55 ++ 1 file changed, 55 insertions(+) diff --git

Re: [PATCH v2 3/5] sysctl: Warn when a clamped sysctl parameter is set out of range

On 02/27/2018 07:57 PM, Luis R. Rodriguez wrote: > On Tue, Feb 27, 2018 at 03:49:49PM -0500, Waiman Long wrote: >> Even with clamped sysctl parameters, it is still not that straight >> forward to figure out the exact range of those parameters. One may >> try to write extreme parameter values to

Re: [PATCH v2 3/5] sysctl: Warn when a clamped sysctl parameter is set out of range

On 02/27/2018 07:57 PM, Luis R. Rodriguez wrote: > On Tue, Feb 27, 2018 at 03:49:49PM -0500, Waiman Long wrote: >> Even with clamped sysctl parameters, it is still not that straight >> forward to figure out the exact range of those parameters. One may >> try to write extreme parameter values to

[PATCH 1/2] drm/sun4i: increase lvds dclk max divisor

At the moment both min and max dclk div are set to 7. This doesn't allow to have lower frequencies. Increase dclk_max_div to 18 to achieve 30Mhz. Signed-off-by: Giulio Benetti --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 2 +- 1 file changed, 1 insertion(+), 1

[PATCH 1/2] drm/sun4i: increase lvds dclk max divisor

At the moment both min and max dclk div are set to 7. This doesn't allow to have lower frequencies. Increase dclk_max_div to 18 to achieve 30Mhz. Signed-off-by: Giulio Benetti --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 05/10] dt-bindings: gpio: Add gpio nodes for Actions S900 SoC

Add gpio nodes for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- .../devicetree/bindings/gpio/actions,owl-gpio.txt | 95 ++ 1 file changed, 95 insertions(+) create mode 100644

[PATCH 05/10] dt-bindings: gpio: Add gpio nodes for Actions S900 SoC

Add gpio nodes for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- .../devicetree/bindings/gpio/actions,owl-gpio.txt | 95 ++ 1 file changed, 95 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt diff --git

Re: [PATCH v2 2/5] sysctl: Add flags to support min/max range clamping

On 02/27/2018 07:47 PM, Luis R. Rodriguez wrote: > On Tue, Feb 27, 2018 at 03:49:48PM -0500, Waiman Long wrote: >> When minimum/maximum values are specified for a sysctl parameter in >> the ctl_table structure with proc_dointvec_minmax() handler, > an > >> update >> to that parameter will fail

Re: [PATCH 3/3] mailbox: sunxi-msgbox: Add a new mailbox driver

Hi, On 02/28/18 03:16, Jassi Brar wrote: > On Wed, Feb 28, 2018 at 7:57 AM, Samuel Holland wrote: > > >> +/* >> + * The message box hardware provides 8 unidirectional channels. As the >> mailbox >> + * framework expects them to be bidirectional >> > That is incorrect.

Re: [PATCH v2 2/5] sysctl: Add flags to support min/max range clamping

On 02/27/2018 07:47 PM, Luis R. Rodriguez wrote: > On Tue, Feb 27, 2018 at 03:49:48PM -0500, Waiman Long wrote: >> When minimum/maximum values are specified for a sysctl parameter in >> the ctl_table structure with proc_dointvec_minmax() handler, > an > >> update >> to that parameter will fail

Re: [PATCH 3/3] mailbox: sunxi-msgbox: Add a new mailbox driver

Hi, On 02/28/18 03:16, Jassi Brar wrote: > On Wed, Feb 28, 2018 at 7:57 AM, Samuel Holland wrote: > > >> +/* >> + * The message box hardware provides 8 unidirectional channels. As the >> mailbox >> + * framework expects them to be bidirectional >> > That is incorrect. Mailbox framework

Re: [PATCH 0/3] STM32 Extended TrustZone Protection driver

On Wed, Feb 28, 2018 at 08:53:28AM +0100, Benjamin Gaignard wrote: > 2018-02-27 20:46 GMT+01:00 Robin Murphy : > > On 27/02/18 19:16, Benjamin Gaignard wrote: > >> 2018-02-27 18:11 GMT+01:00 Mark Rutland : > >>> On Tue, Feb 27, 2018 at 03:09:23PM +0100,

Re: [PATCH 1/3] dt-bindings: Add a binding for the sunxi message box

Hi, On 02/28/18 02:28, Maxime Ripard wrote: > On Tue, Feb 27, 2018 at 08:27:12PM -0600, Samuel Holland wrote: >> This mailbox hardware is present in several Allwinner sun8i and sun50i >> SoCs. Add a device tree binding for it. >> >> Signed-off-by: Samuel Holland >> --- >>

Re: [PATCH 0/3] STM32 Extended TrustZone Protection driver

On Wed, Feb 28, 2018 at 08:53:28AM +0100, Benjamin Gaignard wrote: > 2018-02-27 20:46 GMT+01:00 Robin Murphy : > > On 27/02/18 19:16, Benjamin Gaignard wrote: > >> 2018-02-27 18:11 GMT+01:00 Mark Rutland : > >>> On Tue, Feb 27, 2018 at 03:09:23PM +0100, Benjamin Gaignard wrote: > > On

Re: [PATCH 1/3] dt-bindings: Add a binding for the sunxi message box

Hi, On 02/28/18 02:28, Maxime Ripard wrote: > On Tue, Feb 27, 2018 at 08:27:12PM -0600, Samuel Holland wrote: >> This mailbox hardware is present in several Allwinner sun8i and sun50i >> SoCs. Add a device tree binding for it. >> >> Signed-off-by: Samuel Holland >> --- >>

Re: [PATCH V2] scsi: core: use blk_mq_requeue_request in __scsi_queue_insert

On Wed, 2018-02-28 at 16:55 +0800, Jianchao Wang wrote: > diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c > index a86df9c..6fa7b0c 100644 > --- a/drivers/scsi/scsi_lib.c > +++ b/drivers/scsi/scsi_lib.c > @@ -191,7 +191,8 @@ static void __scsi_queue_insert(struct scsi_cmnd *cmd, >

Re: [PATCH V2] scsi: core: use blk_mq_requeue_request in __scsi_queue_insert

On Wed, 2018-02-28 at 16:55 +0800, Jianchao Wang wrote: > diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c > index a86df9c..6fa7b0c 100644 > --- a/drivers/scsi/scsi_lib.c > +++ b/drivers/scsi/scsi_lib.c > @@ -191,7 +191,8 @@ static void __scsi_queue_insert(struct scsi_cmnd *cmd, >

[PATCH 10/10] MAINTAINERS: Add Actions Semi S900 pinctrl and gpio entries

Add S900 pinctrl and gpio entries under ARCH_ACTIONS Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 4 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 640dabc4c311..d63793ee545e 100644 --- a/MAINTAINERS +++

[PATCH 09/10] MAINTAINERS: Add reviewer for ACTIONS platforms

Since I'll be working on improving support for ACTIONS platforms, adding myself as the reviewer. Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9a7f76eadae9..640dabc4c311

[PATCH 10/10] MAINTAINERS: Add Actions Semi S900 pinctrl and gpio entries

Add S900 pinctrl and gpio entries under ARCH_ACTIONS Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 4 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 640dabc4c311..d63793ee545e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1125,10 +1125,14 @@ F:

[PATCH 09/10] MAINTAINERS: Add reviewer for ACTIONS platforms

Since I'll be working on improving support for ACTIONS platforms, adding myself as the reviewer. Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9a7f76eadae9..640dabc4c311 100644 --- a/MAINTAINERS +++

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