Hello,
syzbot hit the following crash on upstream commit
a27fc14219f2e3c4a46ba9177b04d9b52c875532 (Mon Apr 16 21:07:39 2018 +)
Merge branch 'parisc-4.17-3' of
git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
syzbot dashboard link:
Hello,
syzbot hit the following crash on upstream commit
a27fc14219f2e3c4a46ba9177b04d9b52c875532 (Mon Apr 16 21:07:39 2018 +)
Merge branch 'parisc-4.17-3' of
git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
syzbot dashboard link:
Hello,
syzbot hit the following crash on upstream commit
86bbbebac1933e6e95e8234c4f7d220c5ddd38bc (Mon Apr 2 18:47:07 2018 +)
Merge branch 'ras-core-for-linus' of
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
syzbot dashboard link:
On 04/18/2018 05:11 PM, Kees Cook wrote:
> On Fri, Apr 6, 2018 at 1:55 PM, Dave Hansen
> wrote:
>> +/*
>> + * For some configurations, map all of kernel text into the user page
>> + * tables. This reduces TLB misses, especially on non-PCID systems.
>> + */
>> +void
Hello,
syzbot hit the following crash on upstream commit
86bbbebac1933e6e95e8234c4f7d220c5ddd38bc (Mon Apr 2 18:47:07 2018 +)
Merge branch 'ras-core-for-linus' of
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
syzbot dashboard link:
On 04/18/2018 05:11 PM, Kees Cook wrote:
> On Fri, Apr 6, 2018 at 1:55 PM, Dave Hansen
> wrote:
>> +/*
>> + * For some configurations, map all of kernel text into the user page
>> + * tables. This reduces TLB misses, especially on non-PCID systems.
>> + */
>> +void pti_clone_kernel_text(void)
Hello,
syzbot hit the following crash on upstream commit
9dd2326890d89a5179967c947dab2bab34d7ddee (Fri Mar 30 17:29:47 2018 +)
Merge tag 'ceph-for-4.16-rc8' of git://github.com/ceph/ceph-client
syzbot dashboard link:
https://syzkaller.appspot.com/bug?extid=187510916eb6a14598f7
So far
Hello,
syzbot hit the following crash on upstream commit
9dd2326890d89a5179967c947dab2bab34d7ddee (Fri Mar 30 17:29:47 2018 +)
Merge tag 'ceph-for-4.16-rc8' of git://github.com/ceph/ceph-client
syzbot dashboard link:
https://syzkaller.appspot.com/bug?extid=187510916eb6a14598f7
So far
When remounting ext4 from ro to rw, currently it allows its transition,
even if ext4_commit_super() returns EIO. Even worse thing is, after that,
fs/buffer complains buffer dirty bits like:
Call trace:
[] mark_buffer_dirty+0x184/0x1a4
[] __ext4_handle_dirty_super+0x4c/0xfc
[]
When remounting ext4 from ro to rw, currently it allows its transition,
even if ext4_commit_super() returns EIO. Even worse thing is, after that,
fs/buffer complains buffer dirty bits like:
Call trace:
[] mark_buffer_dirty+0x184/0x1a4
[] __ext4_handle_dirty_super+0x4c/0xfc
[]
On Thu 19 Apr 03:45 PDT 2018, kgu...@codeaurora.org wrote:
>
> On 2017-12-05 11:10, Bjorn Andersson wrote:
> > On Thu 16 Nov 04:18 PST 2017, Kiran Gunda wrote:
> >
> > > The auto-calibration algorithm checks if the current WLED sink
> > > configuration is valid. It tries enabling every sink and
On Thu 19 Apr 03:45 PDT 2018, kgu...@codeaurora.org wrote:
>
> On 2017-12-05 11:10, Bjorn Andersson wrote:
> > On Thu 16 Nov 04:18 PST 2017, Kiran Gunda wrote:
> >
> > > The auto-calibration algorithm checks if the current WLED sink
> > > configuration is valid. It tries enabling every sink and
Hi Jan,
Thank you for the review.
On 04/19, Jan Kara wrote:
> On Thu 29-03-18 18:44:29, Jaegeuk Kim wrote:
> > From: Jaegeuk Kim
> >
> > When remounting ext4 from ro to rw, currently it allows its transition,
> > even if ext4_commit_super() returns EIO. Even worse thing is,
Hi Jan,
Thank you for the review.
On 04/19, Jan Kara wrote:
> On Thu 29-03-18 18:44:29, Jaegeuk Kim wrote:
> > From: Jaegeuk Kim
> >
> > When remounting ext4 from ro to rw, currently it allows its transition,
> > even if ext4_commit_super() returns EIO. Even worse thing is, after that,
> >
Colin Ian King wrote:
> Trivial fix to spelling mistake in message text
>
> Signed-off-by: Colin Ian King
> Signed-off-by: Kalle Valo
Patch applied to ath-next branch of ath.git, thanks.
5072d87426bb ath6kl: fix
Colin Ian King wrote:
> Trivial fix to spelling mistake in message text
>
> Signed-off-by: Colin Ian King
> Signed-off-by: Kalle Valo
Patch applied to ath-next branch of ath.git, thanks.
5072d87426bb ath6kl: fix spelling mistake: "chache" -> "cache"
--
On Thu, Apr 19, 2018 at 06:16:26PM +0300, Thomas Backlund wrote:
> Den 19.04.2018 kl. 17:22, skrev Greg KH:
> > On Thu, Apr 19, 2018 at 04:05:45PM +0200, Jan Kara wrote:
> > > On Thu 19-04-18 15:59:43, Greg KH wrote:
> > > > On Thu, Apr 19, 2018 at 02:41:33PM +0300, Thomas Backlund wrote:
> > > >
On Thu, Apr 19, 2018 at 06:16:26PM +0300, Thomas Backlund wrote:
> Den 19.04.2018 kl. 17:22, skrev Greg KH:
> > On Thu, Apr 19, 2018 at 04:05:45PM +0200, Jan Kara wrote:
> > > On Thu 19-04-18 15:59:43, Greg KH wrote:
> > > > On Thu, Apr 19, 2018 at 02:41:33PM +0300, Thomas Backlund wrote:
> > > >
Hello,
syzbot hit the following crash on upstream commit
48023102b7078a6674516b1fe0d639669336049d (Fri Apr 13 23:55:41 2018 +)
Merge branch 'overlayfs-linus' of
git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/vfs
syzbot dashboard link:
Hello,
syzbot hit the following crash on upstream commit
48023102b7078a6674516b1fe0d639669336049d (Fri Apr 13 23:55:41 2018 +)
Merge branch 'overlayfs-linus' of
git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/vfs
syzbot dashboard link:
The JIT compiler emits ia32 bit instructions. Currently, It supports
eBPF only. Classic BPF is supported because of the conversion by BPF core.
Almost all instructions from eBPF ISA supported except the following:
BPF_ALU64 | BPF_DIV | BPF_K
BPF_ALU64 | BPF_DIV | BPF_X
BPF_ALU64 | BPF_MOD | BPF_K
The JIT compiler emits ia32 bit instructions. Currently, It supports
eBPF only. Classic BPF is supported because of the conversion by BPF core.
Almost all instructions from eBPF ISA supported except the following:
BPF_ALU64 | BPF_DIV | BPF_K
BPF_ALU64 | BPF_DIV | BPF_X
BPF_ALU64 | BPF_MOD | BPF_K
This came to light in some internal discussions and it is nice to have
this documented rather than digging up the PRM (Prog Ref Manual) again.
Acked-by: Vineet Gupta
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* Minor comment fix.
This came to light in some internal discussions and it is nice to have
this documented rather than digging up the PRM (Prog Ref Manual) again.
Acked-by: Vineet Gupta
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* Minor comment fix.
drivers/clocksource/arc_timer.c | 14 ++
On Thu, Apr 19, 2018 at 5:30 PM, Zack Weinberg wrote:
> On Thu, Apr 19, 2018 at 10:37 AM, Arnd Bergmann wrote:
>> Most architectures now use the asm-generic copy of the sysvipc data
>> structures (msqid64_ds, semid64_ds, shmid64_ds), which use 32-bit
>>
On Thu, Apr 19, 2018 at 5:30 PM, Zack Weinberg wrote:
> On Thu, Apr 19, 2018 at 10:37 AM, Arnd Bergmann wrote:
>> Most architectures now use the asm-generic copy of the sysvipc data
>> structures (msqid64_ds, semid64_ds, shmid64_ds), which use 32-bit
>> __kernel_time_t on 32-bit architectures
Hi Archit & Andrzej,
May I ask you please a short review of this documentation update.
Many thanks
Philippe :-)
On 04/09/2018 05:24 PM, Philippe Cornu wrote:
> This patch clarifies the adjusted_mode documentation
> for bridges.
>
> Signed-off-by: Philippe Cornu
>
Hi Archit & Andrzej,
May I ask you please a short review of this documentation update.
Many thanks
Philippe :-)
On 04/09/2018 05:24 PM, Philippe Cornu wrote:
> This patch clarifies the adjusted_mode documentation
> for bridges.
>
> Signed-off-by: Philippe Cornu
> Signed-off-by: Laurent
This patch fixes the clang warning of extraneous parentheses, with the
following coccinelle script.
@@
identifier i;
constant c;
expression e;
@@
(
!((e))
|
-((
\(i == c\|i != c\|i <= c\|i < c\|i >= c\|i > c\)
-))
)
Signed-off-by: Varsha Rao
---
Changes in v2:
- Modified
This patch fixes the clang warning of extraneous parentheses, with the
following coccinelle script.
@@
identifier i;
constant c;
expression e;
@@
(
!((e))
|
-((
\(i == c\|i != c\|i <= c\|i < c\|i >= c\|i > c\)
-))
)
Signed-off-by: Varsha Rao
---
Changes in v2:
- Modified coccinelle script
This introduces support for Allwinner's MB32-tiled NV12 format, where
each plane is divided into macroblocks of 32x32 pixels. Hence, the size
of each plane has to be aligned to 32 bytes. The pixels inside each
macroblock are coded as they would be if the macroblock was a single
plane, line after
This introduces support for Allwinner's MB32-tiled NV12 format, where
each plane is divided into macroblocks of 32x32 pixels. Hence, the size
of each plane has to be aligned to 32 bytes. The pixels inside each
macroblock are coded as they would be if the macroblock was a single
plane, line after
Stateless video decoding engines require both the MPEG slices and
associated metadata from the video stream in order to decode frames.
This introduces definitions for a new pixel format, describing buffers
with MPEG2 slice data, as well as a control structure for passing the
frame header
Stateless video decoding engines require both the MPEG slices and
associated metadata from the video stream in order to decode frames.
This introduces definitions for a new pixel format, describing buffers
with MPEG2 slice data, as well as a control structure for passing the
frame header
I've seen timeout errors from HCI commands where it looks like
schedule_timeout() has returned immediately; additional logging for the
error case gives:
req_status=1 req_result=0 remaining=1 jiffies
so the device is still in state HCI_REQ_PEND and the value returned by
I've seen timeout errors from HCI commands where it looks like
schedule_timeout() has returned immediately; additional logging for the
error case gives:
req_status=1 req_result=0 remaining=1 jiffies
so the device is still in state HCI_REQ_PEND and the value returned by
This adds nodes for the Video Engine and the associated reserved memory
for the Allwinner A20. Up to 96 MiB of memory are dedicated to the VPU.
The VPU can only map the first 256 MiB of DRAM, so the reserved memory
pool has to be located in that area. Following Allwinner's decision in
downstream
This adds nodes for the Video Engine and the associated reserved memory
for the Allwinner A20. Up to 96 MiB of memory are dedicated to the VPU.
The VPU can only map the first 256 MiB of DRAM, so the reserved memory
pool has to be located in that area. Following Allwinner's decision in
downstream
This adds nodes for the Video Engine and the associated reserved memory
for the Allwinner A33. Up to 96 MiB of memory are dedicated to the VPU.
The VPU can only map the first 256 MiB of DRAM, so the reserved memory
pool has to be located in that area. Following Allwinner's decision in
downstream
This adds nodes for the Video Engine and the associated reserved memory
for the Allwinner A33. Up to 96 MiB of memory are dedicated to the VPU.
The VPU can only map the first 256 MiB of DRAM, so the reserved memory
pool has to be located in that area. Following Allwinner's decision in
downstream
I got it.
I'll send v2 shortly.
Thanks for the feedback, Masahiro.
--
Gustavo
On 04/19/2018 10:42 AM, Masahiro Yamada wrote:
Hi.
2018-04-19 22:53 GMT+09:00 Gustavo A. R. Silva :
Currently, the code block inside the for loop will never execute
more than once,
I got it.
I'll send v2 shortly.
Thanks for the feedback, Masahiro.
--
Gustavo
On 04/19/2018 10:42 AM, Masahiro Yamada wrote:
Hi.
2018-04-19 22:53 GMT+09:00 Gustavo A. R. Silva :
Currently, the code block inside the for loop will never execute
more than once, because the function returns
On Thu, Apr 19, 2018 at 10:11:03AM -0500, Alex G. wrote:
> There is value in this. From my observations, fw claims it will do
> everything through FFS, yet fails to fully handle the situation. It's
> rooted in FW's assumptions about OS behavior. Because the (old) versions
> of windows, esxi, and
On Thu, Apr 19, 2018 at 10:11:03AM -0500, Alex G. wrote:
> There is value in this. From my observations, fw claims it will do
> everything through FFS, yet fails to fully handle the situation. It's
> rooted in FW's assumptions about OS behavior. Because the (old) versions
> of windows, esxi, and
This introduces the Sunxi-Cedrus VPU driver that supports the VPU found
in Allwinner SoCs, also known as Video Engine. It is implemented through
a v4l2 m2m decoder device and a media device (used for media requests).
So far, it only supports MPEG2 decoding.
Since this VPU is stateless,
This introduces the Sunxi-Cedrus VPU driver that supports the VPU found
in Allwinner SoCs, also known as Video Engine. It is implemented through
a v4l2 m2m decoder device and a media device (used for media requests).
So far, it only supports MPEG2 decoding.
Since this VPU is stateless,
This adds a device-tree binding document that specifies the properties
used by the Sunxi-Cedurs VPU driver, as well as examples.
Signed-off-by: Paul Kocialkowski
---
.../devicetree/bindings/media/sunxi-cedrus.txt | 50 ++
1 file changed, 50
This adds a device-tree binding document that specifies the properties
used by the Sunxi-Cedurs VPU driver, as well as examples.
Signed-off-by: Paul Kocialkowski
---
.../devicetree/bindings/media/sunxi-cedrus.txt | 50 ++
1 file changed, 50 insertions(+)
create mode
On Thu, Apr 19, 2018 at 10:37 AM, Arnd Bergmann wrote:
> Most architectures now use the asm-generic copy of the sysvipc data
> structures (msqid64_ds, semid64_ds, shmid64_ds), which use 32-bit
> __kernel_time_t on 32-bit architectures but have padding behind them to
> allow
On Thu, Apr 19, 2018 at 10:37 AM, Arnd Bergmann wrote:
> Most architectures now use the asm-generic copy of the sysvipc data
> structures (msqid64_ds, semid64_ds, shmid64_ds), which use 32-bit
> __kernel_time_t on 32-bit architectures but have padding behind them to
> allow extending the type to
On 04/19/2018 10:29 AM, Borislav Petkov wrote:
> On Thu, Apr 19, 2018 at 09:57:08AM -0500, Alex G. wrote:
>> And that was the motivation behind my splitting it in this patch.
>
> By "split" I don't mean add a function pointer which gets selected and
> then called - if the function becomes too
On 04/19/2018 10:29 AM, Borislav Petkov wrote:
> On Thu, Apr 19, 2018 at 09:57:08AM -0500, Alex G. wrote:
>> And that was the motivation behind my splitting it in this patch.
>
> By "split" I don't mean add a function pointer which gets selected and
> then called - if the function becomes too
When using the request API in the context of a m2m driver, the
operations that come with a m2m run scheduling call in their
(m2m-specific) ioctl handler are delayed until the request is queued
(for instance, this includes queuing buffers and streamon).
Thus, the m2m run scheduling calls are not
When using the request API in the context of a m2m driver, the
operations that come with a m2m run scheduling call in their
(m2m-specific) ioctl handler are delayed until the request is queued
(for instance, this includes queuing buffers and streamon).
Thus, the m2m run scheduling calls are not
This adds an implementation of the media request complete operation for
the vim2m driver, that ensures that the driver will try to schedule a
m2m run whenever a request was completed. Without this operation, no m2m
device run will be scheduled in many scenarios.
Signed-off-by: Paul Kocialkowski
This adds an implementation of the media request complete operation for
the vim2m driver, that ensures that the driver will try to schedule a
m2m run whenever a request was completed. Without this operation, no m2m
device run will be scheduled in many scenarios.
Signed-off-by: Paul Kocialkowski
This adds a missing v4l2_ctrl_unlock call that is required to avoid
deadlocks.
Signed-off-by: Paul Kocialkowski
---
drivers/media/v4l2-core/v4l2-ctrls.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c
This adds a missing v4l2_ctrl_unlock call that is required to avoid
deadlocks.
Signed-off-by: Paul Kocialkowski
---
drivers/media/v4l2-core/v4l2-ctrls.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c
This presents a second iteration of the updated Sunxi-Cedrus driver,
that supports the Video Engine found in most Allwinner SoCs, starting
with the A10. It was tested on both the A20 and the A33.
The initial version of this driver[0] was originally written and
submitted by Florent Revest using a
This presents a second iteration of the updated Sunxi-Cedrus driver,
that supports the Video Engine found in most Allwinner SoCs, starting
with the A10. It was tested on both the A20 and the A33.
The initial version of this driver[0] was originally written and
submitted by Florent Revest using a
When calling media operation driver callbacks related to media requests,
only a pointer to the request itself is provided, which is insufficient
to retrieve the driver's context. Since the driver context is usually
set as vb2 queue private data and given that the core can determine
which objects
When calling media operation driver callbacks related to media requests,
only a pointer to the request itself is provided, which is insufficient
to retrieve the driver's context. Since the driver context is usually
set as vb2 queue private data and given that the core can determine
which objects
Currently the 8250_of driver only supports MEM IO type
accesses.
Some development boards (Huawei D03, specifically) require
IO space access for 8250-compatible OF driver support, so
add it.
The modification is quite simple: just set the port iotype
and associated flags depending on the device
Hi.
2018-04-19 22:53 GMT+09:00 Gustavo A. R. Silva :
> Currently, the code block inside the for loop will never execute
> more than once, because the function returns inmediately after
> the first iteration, hence the execution of the code at the second
> iteration is
Currently the 8250_of driver only supports MEM IO type
accesses.
Some development boards (Huawei D03, specifically) require
IO space access for 8250-compatible OF driver support, so
add it.
The modification is quite simple: just set the port iotype
and associated flags depending on the device
Hi.
2018-04-19 22:53 GMT+09:00 Gustavo A. R. Silva :
> Currently, the code block inside the for loop will never execute
> more than once, because the function returns inmediately after
> the first iteration, hence the execution of the code at the second
> iteration is structurally dead and, code
On Wed, Apr 18, 2018 at 11:36 AM, Jan Kara wrote:
> Hello,
>
> On Tue 17-04-18 18:02:02, syzbot wrote:
>> syzbot hit the following crash on upstream commit
>> a27fc14219f2e3c4a46ba9177b04d9b52c875532 (Mon Apr 16 21:07:39 2018 +)
>> Merge branch 'parisc-4.17-3' of
>>
On Wed, Apr 18, 2018 at 11:36 AM, Jan Kara wrote:
> Hello,
>
> On Tue 17-04-18 18:02:02, syzbot wrote:
>> syzbot hit the following crash on upstream commit
>> a27fc14219f2e3c4a46ba9177b04d9b52c875532 (Mon Apr 16 21:07:39 2018 +)
>> Merge branch 'parisc-4.17-3' of
>>
On Thu, Apr 19, 2018 at 09:57:07AM -0500, Alex G. wrote:
> ghes_severity() is a one-to-one mapping from a set of unsorted
> severities to monotonically increasing numbers. The "one-to-one" mapping
> part of the sentence is obvious from the function name. To change it to
> parse the entire GHES
On Thu, Apr 19, 2018 at 09:57:07AM -0500, Alex G. wrote:
> ghes_severity() is a one-to-one mapping from a set of unsorted
> severities to monotonically increasing numbers. The "one-to-one" mapping
> part of the sentence is obvious from the function name. To change it to
> parse the entire GHES
When using half-duplex mode (which disables receiver during txing)
the RTS signal cannot be driven low during transmission when using
i.MX UART RTS/CTS control. This seems to be a limitation of the
i.MX UART IP: The RTS (CTS_B) signal is controlled by the receiver.
When the receiver is disabled,
When using half-duplex mode (which disables receiver during txing)
the RTS signal cannot be driven low during transmission when using
i.MX UART RTS/CTS control. This seems to be a limitation of the
i.MX UART IP: The RTS (CTS_B) signal is controlled by the receiver.
When the receiver is disabled,
On 04/19/2018 04:03 AM, Stefan Berger wrote:
> On 04/18/2018 05:32 PM, John Johansen wrote:
>> On 04/18/2018 01:12 PM, Eric W. Biederman wrote:
>>> Mimi Zohar writes:
>>>
On Wed, 2018-04-18 at 09:09 -0700, John Johansen wrote:
> On 04/13/2018 09:25 AM, Mimi
On 04/19/2018 04:03 AM, Stefan Berger wrote:
> On 04/18/2018 05:32 PM, John Johansen wrote:
>> On 04/18/2018 01:12 PM, Eric W. Biederman wrote:
>>> Mimi Zohar writes:
>>>
On Wed, 2018-04-18 at 09:09 -0700, John Johansen wrote:
> On 04/13/2018 09:25 AM, Mimi Zohar wrote:
>> [Cc'ing
Hi Alex,
(I haven't read through all this yet, just on this one:)
On 04/19/2018 03:57 PM, Alex G. wrote:
> Maybe it's better move the AER handling to NMI/IRQ context, since
> ghes_handle_aer() is only scheduling the real AER andler, and is irq
> safe. I'm scratching my head about why we're
Hi Alex,
(I haven't read through all this yet, just on this one:)
On 04/19/2018 03:57 PM, Alex G. wrote:
> Maybe it's better move the AER handling to NMI/IRQ context, since
> ghes_handle_aer() is only scheduling the real AER andler, and is irq
> safe. I'm scratching my head about why we're
On Thu, Apr 19, 2018 at 03:50:25PM +0300, Kirill Tkhai wrote:
> Hi, Al,
>
> commit 87b95ce0964c016ede92763be9c164e49f1019e9 is the first after which the
> below test crashes the kernel:
>
> Author: Al Viro
> Date: Sat Jan 10 19:01:08 2015 -0500
>
>
On Thu, Apr 19, 2018 at 03:50:25PM +0300, Kirill Tkhai wrote:
> Hi, Al,
>
> commit 87b95ce0964c016ede92763be9c164e49f1019e9 is the first after which the
> below test crashes the kernel:
>
> Author: Al Viro
> Date: Sat Jan 10 19:01:08 2015 -0500
>
> switch the IO-triggering parts
Em Wed, Apr 18, 2018 at 04:05:18PM -0600, Mathieu Poirier escreveu:
> Moving perf tools CoreSight support to the SPDX identifier.
>
> Signed-off-by: Mathieu Poirier
Thanks, applied.
- Arnaldo
Em Wed, Apr 18, 2018 at 04:05:18PM -0600, Mathieu Poirier escreveu:
> Moving perf tools CoreSight support to the SPDX identifier.
>
> Signed-off-by: Mathieu Poirier
Thanks, applied.
- Arnaldo
On Thu, Apr 19, 2018 at 09:57:08AM -0500, Alex G. wrote:
> And that was the motivation behind my splitting it in this patch.
By "split" I don't mean add a function pointer which gets selected and
then called - if the function becomes too long, you simply split the
function body properly.
> You
On Thu, Apr 19, 2018 at 09:57:08AM -0500, Alex G. wrote:
> And that was the motivation behind my splitting it in this patch.
By "split" I don't mean add a function pointer which gets selected and
then called - if the function becomes too long, you simply split the
function body properly.
> You
On 04/19/2018 07:41 AM, Christoph Hellwig wrote:
Use remove_proc_subtree to remove the whole subtree on cleanup instead
of a hand rolled list of proc entries, unwind the registration loop into
individual calls. Switch to use proc_create_single to further simplify
the code.
I'm yanking all the
On 04/19/2018 07:41 AM, Christoph Hellwig wrote:
Use remove_proc_subtree to remove the whole subtree on cleanup instead
of a hand rolled list of proc entries, unwind the registration loop into
individual calls. Switch to use proc_create_single to further simplify
the code.
I'm yanking all the
No, this isn't a joke. No, it doesn't even really have anything to do
with my employer ;-)
What it is about is saving some stack space in the slub allocator.
You see, slub has some bitfields embedded in struct page which it wants
to be able to access as a single unsigned int. To avoid
No, this isn't a joke. No, it doesn't even really have anything to do
with my employer ;-)
What it is about is saving some stack space in the slub allocator.
You see, slub has some bitfields embedded in struct page which it wants
to be able to access as a single unsigned int. To avoid
On Thu, 19 Apr 2018 16:14:25 +0200
Pierre Morel wrote:
> On 13/04/2018 16:05, Cornelia Huck wrote:
> > When we call ssch, an interrupt might already be pending once we
> > return from the START SUBCHANNEL instruction. Therefore we need to
> > make sure interrupts are
On Thu, 19 Apr 2018 16:14:25 +0200
Pierre Morel wrote:
> On 13/04/2018 16:05, Cornelia Huck wrote:
> > When we call ssch, an interrupt might already be pending once we
> > return from the START SUBCHANNEL instruction. Therefore we need to
> > make sure interrupts are disabled until after we're
drivers/dma/qcom directory is being shared by multiple QCOM dmaengine
drivers. Separate ownership by filenames.
Signed-off-by: Sinan Kaya
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ff14894..111dd8d 100644
---
On Thu, Apr 19, 2018 at 03:32:05PM +0100, Phil Elwell wrote:
> The Microchip LAN78XX family of devices are Ethernet controllers with
> a USB interface. Despite being discoverable devices it can be useful to
> be able to configure them from Device Tree, particularly in low-cost
> applications
drivers/dma/qcom directory is being shared by multiple QCOM dmaengine
drivers. Separate ownership by filenames.
Signed-off-by: Sinan Kaya
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ff14894..111dd8d 100644
--- a/MAINTAINERS
+++
On Thu, Apr 19, 2018 at 03:32:05PM +0100, Phil Elwell wrote:
> The Microchip LAN78XX family of devices are Ethernet controllers with
> a USB interface. Despite being discoverable devices it can be useful to
> be able to configure them from Device Tree, particularly in low-cost
> applications
On Thu, Apr 19, 2018 at 4:59 PM, Eric W. Biederman
wrote:
> Arnd Bergmann writes:
>>
>> struct msqid64_ds {
>> struct ipc64_perm msg_perm;
>> +#if __BITS_PER_LONG == 64
>> __kernel_time_t msg_stime; /* last msgsnd time */
>> -#if
On Thu, Apr 19, 2018 at 4:59 PM, Eric W. Biederman
wrote:
> Arnd Bergmann writes:
>>
>> struct msqid64_ds {
>> struct ipc64_perm msg_perm;
>> +#if __BITS_PER_LONG == 64
>> __kernel_time_t msg_stime; /* last msgsnd time */
>> -#if __BITS_PER_LONG != 64
>> - unsigned long
On Thu, Apr 19, 2018 at 10:13 AM, Icenowy Zheng wrote:
>
>
> 于 2018年4月19日 GMT+08:00 下午11:11:22, Kyle Evans 写到:
>>On Mon, Jan 29, 2018 at 6:03 AM, Philipp Rossak
>>wrote:
>>>
>>>
>>> On 29.01.2018 10:52, Maxime Ripard wrote:
On
On Thu, Apr 19, 2018 at 10:13 AM, Icenowy Zheng wrote:
>
>
> 于 2018年4月19日 GMT+08:00 下午11:11:22, Kyle Evans 写到:
>>On Mon, Jan 29, 2018 at 6:03 AM, Philipp Rossak
>>wrote:
>>>
>>>
>>> On 29.01.2018 10:52, Maxime Ripard wrote:
On Mon, Jan 29, 2018 at 12:29:17AM +0100, Philipp Rossak
> @@ -2077,6 +2085,28 @@ static int lan78xx_phy_init(struct lan78xx_net *dev)
> mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
> phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
>
> + if (phydev->mdio.dev.of_node) {
> + u32 reg;
> +
> @@ -2077,6 +2085,28 @@ static int lan78xx_phy_init(struct lan78xx_net *dev)
> mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
> phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
>
> + if (phydev->mdio.dev.of_node) {
> + u32 reg;
> +
Add support for DT property "microchip,led-modes", a vector of zero
to four cells (u32s) in the range 0-15, each of which sets the mode
for one of the LEDs. Some possible values are:
0=link/activity 1=link1000/activity
2=link100/activity 3=link10/activity
Add support for DT property "microchip,led-modes", a vector of zero
to four cells (u32s) in the range 0-15, each of which sets the mode
for one of the LEDs. Some possible values are:
0=link/activity 1=link1000/activity
2=link100/activity 3=link10/activity
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