On Thu 10-05-18 18:18:32, mike.tra...@hpe.com wrote:
>
> Update support for the UV kernel to accommodate Intel BIOS changes in
> NVDIMM alignment, which caused UV BIOS to align the memory boundaries
> on different blocks than the previous UV standard of 2GB.
Please elaborate (much) more. What is
Christophe Leroy writes:
> The purpose of this serie is to implement hardware assistance for TLB table
> walk
> on the 8xx.
>
> First part is to make L1 entries and L2 entries independant.
> For that, we need to alter ioremap functions in order to handle GUARD
> attribute
> at the PGD/PMD level
Christophe Leroy writes:
> diff --git a/arch/powerpc/mm/ioremap.c b/arch/powerpc/mm/ioremap.c
> index 59be5dfcb3e9..b8c347077e02 100644
> --- a/arch/powerpc/mm/ioremap.c
> +++ b/arch/powerpc/mm/ioremap.c
> @@ -132,9 +132,14 @@ void __iomem * __ioremap_caller(phys_addr_t addr,
> unsigned long siz
On Thu 10-05-18 09:00:24, Prakash Sangappa wrote:
>
>
> On 5/10/18 12:42 AM, Michal Hocko wrote:
> > On Fri 04-05-18 09:18:11, Prakash Sangappa wrote:
> > >
> > > On 5/4/18 4:12 AM, Michal Hocko wrote:
> > > > On Thu 03-05-18 15:39:49, prakash.sangappa wrote:
> > > > > On 05/03/2018 11:03 AM, Ch
On Thu, May 10, 2018 at 11:46:33AM -0500, Alexandru Gagniuc wrote:
> This patch started as a challenge from Keith relating to code
> structuring with goto vs return. I think the final result improves
> readability on two counts:
> First, it clarifies the separation between work struct and nvme_dev.
> -Original Message-
> From: Peter Zijlstra [mailto:pet...@infradead.org]
> Sent: Thursday, May 10, 2018 7:17 PM
> To: ��ȣ��
> Cc: mi...@kernel.org; aaron...@intel.com; adobri...@gmail.com;
> frede...@kernel.org; ying.hu...@intel.com; linux-kernel@vger.kernel.org
> Subject: Re: smp_call_f
On (05/11/18 11:38), Tetsuo Handa wrote:
> >
> > So you basically want to have one more con_msg_format_flags? Do
> > you want to track a context which prints out a messages or the
> > context which "generated" the message? A CPU/task that stores
> > a logbuf entry - vprintk_emit() - is not always
From: Alastair D'Silva
This patch adds a CPU feature bit to show whether the CPU has
the TIDR register available, enabling as_notify/wait in userspace.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/include/asm/cputable.h | 3 ++-
arch/powerpc/kernel/dt_cpu_ftrs.c | 1 +
2 files changed, 3
From: Alastair D'Silva
In order for a userspace AFU driver to call the POWER9 specific
OCXL_IOCTL_ENABLE_P9_WAIT, it needs to verify that it can actually
make that call.
Signed-off-by: Alastair D'Silva
---
drivers/misc/ocxl/file.c | 25 +
include/uapi/misc/ocxl.h | 6 +
From: Alastair D'Silva
In order to successfully issue as_notify, an AFU needs to know the TID
to notify, which in turn means that this information should be
available in userspace so it can be communicated to the AFU.
Signed-off-by: Alastair D'Silva
---
drivers/misc/ocxl/context.c | 5 +
From: Alastair D'Silva
Signed-off-by: Alastair D'Silva
---
Documentation/accelerators/ocxl.rst | 11 +++
1 file changed, 11 insertions(+)
diff --git a/Documentation/accelerators/ocxl.rst
b/Documentation/accelerators/ocxl.rst
index ddcc58d01cfb..14cefc020e2d 100644
--- a/Documentation/
From: Alastair D'Silva
Switch the use of TIDR on it's CPU feature, rather than assuming it
is available based on architecture.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/kernel/process.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/process
From: Alastair D'Silva
The function removes the process element from NPU cache.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/include/asm/pnv-ocxl.h | 2 +-
arch/powerpc/platforms/powernv/ocxl.c | 4 ++--
drivers/misc/ocxl/link.c | 2 +-
3 files changed, 4 insertions(+), 4 de
From: Alastair D'Silva
The current implementation of TID allocation, using a global IDR, may
result in an errant process starving the system of available TIDs.
Instead, use task_pid_nr(), as mentioned by the original author. The
scenario described which prevented it's use is not applicable, as
se
From: Alastair D'Silva
The Power 9 as_notify/wait feature provides a lower latency way to
signal a thread that work is complete. This series enables the use of
this feature from OpenCAPI adapters, as well as addressing a potential
starvation issue when allocating thread IDs.
Changelog:
v5:
Rem
Hi Daniel,
I love your patch! Perhaps something to improve:
[auto build test WARNING on pm/linux-next]
[also build test WARNING on v4.17-rc4 next-20180510]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
On Thu, 10 May 2018 14:18:16 -0600
Shuah Khan wrote:
> Hi Masami,
>
> On 05/07/2018 09:38 PM, Masami Hiramatsu wrote:
> > On Fri, 4 May 2018 19:13:13 -0600
> > "Shuah Khan (Samsung OSG)" wrote:
> >
> >> When ftrace test is skipped because of unmet dependencies and/or
> >> unsupported configur
On Fri, May 11, 2018 at 11:20 AM, Chen-Yu Tsai wrote:
> On Thu, May 10, 2018 at 10:43 PM, Jagan Teki
> wrote:
>> Amarula A64 Relic is Allwinner A64 based IoT device, which support
>> - Allwinner A64 Cortex-A53
>> - Mali-400MP2 GPU
>> - AXP803 PMIC
>> - 1GB DDR3 RAM
>> - 8GB eMMC
>> - AP6330 Wifi
Christophe Leroy writes:
> diff --git a/arch/powerpc/mm/ioremap.c b/arch/powerpc/mm/ioremap.c
> new file mode 100644
> index ..5d2645193568
> --- /dev/null
> +++ b/arch/powerpc/mm/ioremap.c
> @@ -0,0 +1,350 @@
> +/*
> + * This file contains the routines for mapping IO areas
> + *
> +
Hi all,
Changes since 20180510:
New trees: regmap-fixes
regulator-fixes
omap-fixes
powerpc-pkey
Non-merge commits (relative to Linus' tree): 5376
5157 files changed, 196107 insertions(+), 93830 dele
On Fri, May 11, 2018 at 07:40:26AM +0200, Dmitry Vyukov wrote:
> On Fri, May 11, 2018 at 1:54 AM, Paolo Bonzini wrote:
> > On 10/05/2018 21:16, Roman Kagan wrote:
> >> If an IDR contains a single entry at index==0, the underlying radix tree
> >> has a single item in its root node, in which case
>
On Mon, May 07, 2018 at 04:53:09PM +0300, Nikita Yushchenko wrote:
> This fixes errors in RDU1 device tree that cause touch screens not
> working.
>
> Signed-off-by: Nikita Yushchenko
Applied, thanks.
On Thu, May 10, 2018 at 10:43 PM, Jagan Teki wrote:
> Amarula A64 Relic is Allwinner A64 based IoT device, which support
> - Allwinner A64 Cortex-A53
> - Mali-400MP2 GPU
> - AXP803 PMIC
> - 1GB DDR3 RAM
> - 8GB eMMC
> - AP6330 Wifi/BLE
> - MIPI-DSI
> - CSI: OV5640 sensor
> - USB OTG
> - 12V DC pow
On 10-05-18, 16:05, Patrick Bellasi wrote:
> When a task is enqueue the estimated utilization of a CPU is updated
> to better support the selection of the required frequency.
> However, schedutil is (implicitly) updated by update_load_avg() which
> always happens before util_est_{en,de}queue(), thu
On 10-05-18, 16:05, Patrick Bellasi wrote:
> Since the refactoring introduced by:
>
>commit 8f111bc357aa ("cpufreq/schedutil: Rewrite CPUFREQ_RT support")
>
> we aggregate FAIR utilization only if this class has runnable tasks.
> This was mainly due to avoid the risk to stay on an high freque
On 10-05-18, 16:05, Patrick Bellasi wrote:
> diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
> -static void attach_entity_load_avg(struct cfs_rq *cfs_rq, struct
> sched_entity *se, int flags)
> +static void attach_entity_load_avg(struct cfs_rq *cfs_rq, struct
> sched_entity *se)
> {
>
Amarula A64 Relic is Allwinner A64 based IoT device, which support
- Allwinner A64 Cortex-A53
- Mali-400MP2 GPU
- AXP803 PMIC
- 1GB DDR3 RAM
- 8GB eMMC
- AP6330 Wifi/BLE
- MIPI-DSI
- CSI: OV5640 sensor
- USB OTG
- 12V DC power supply
Signed-off-by: Jagan Teki
---
Changes for v2:
- Rename dts name
On Fri, May 11, 2018 at 1:54 AM, Paolo Bonzini wrote:
> On 10/05/2018 21:16, Roman Kagan wrote:
>> If an IDR contains a single entry at index==0, the underlying radix tree
>> has a single item in its root node, in which case
>> __radix_tree_lookup(index!=0) doesn't set its *@nodep argument (in
>>
On Fri, 11 May 2018, Michael Schmitz wrote:
>
> I'm afraid using platform_device_register() (which you already use for
> the SCC devices) is the only option handling this on a per-device basis
> without touching platform core code, while at the same time keeping the
> DMA mask setup out of dev
On Thu, May 10, 2018 at 06:18:33PM -0500, mike.tra...@hpe.com wrote:
> Add a new function to "adjust" the current fixed UV memory block size of
> 2GB so it can be changed to a different physical boundary. This is out
> of necessity so UV BIOS can accommodate Intel BIOS changes for NVDIMM's,
> whic
On Thu, May 10, 2018 at 06:18:34PM -0500, mike.tra...@hpe.com wrote:
> Add a call to the new function to "adjust" the current fixed UV memory
> block size of 2GB so it can be changed to a different physical boundary.
> This accommodates changes in the Intel BIOS, and therefore UV BIOS, which
> now
On Thu, May 10, 2018 at 06:18:35PM -0500, mike.tra...@hpe.com wrote:
> Add a kernel parameter that allows setting UV memory block size. This
> is to provide an adjustment for new forms of PMEM and other DIMM memory
> that might require alignment restrictions other than scanning the global
> addres
We report the crash: KASAN: use-after-free Read in cma_cancel_operation
Note that this bug is previously reported by syzkaller.
https://syzkaller.appspot.com/bug?id=95f89b8fb9fdc42e28ad586e657fea074e4e719b
Nonetheless, this bug has not fixed yet, and we hope that this report and our
analysis, whic
On Thu, May 10, 2018 at 06:18:32PM -0500, mike.tra...@hpe.com wrote:
>
> Update support for the UV kernel to accommodate Intel BIOS changes in
> NVDIMM alignment, which caused UV BIOS to align the memory boundaries
> on different blocks than the previous UV standard of 2GB.
>
> --
This is no
We report the crash: KASAN: null-ptr-deref Read in rds_ib_get_mr
Note that this bug is previously reported by syzkaller.
https://syzkaller.appspot.com/bug?id=0bb56a5a48b000b52aa2b0d8dd20b1f545214d91
Nonetheless, this bug has not fixed yet, and we hope that this report and our
analysis, which gets
"Alastair D'Silva" writes:
> diff --git a/include/uapi/misc/ocxl.h b/include/uapi/misc/ocxl.h
> index 8d2748e69c84..bb80f294b429 100644
> --- a/include/uapi/misc/ocxl.h
> +++ b/include/uapi/misc/ocxl.h
> @@ -72,5 +75,6 @@ struct ocxl_ioctl_irq_fd {
> #define OCXL_IOCTL_IRQ_SET_FD_IOW(OCX
Hi Arnd:
I am GCC guy from Andes, we've missed the release schedule for GCC 8,
we didn't upstream the Linux support on time.
Our plan is put our GCC 8 on github and continue commit rest patches
to upstream.
And we'll put our source on github after our internal testing done.
Thanks.
On Fri, May
On Mon, May 7, 2018 at 5:44 AM, Paul Kocialkowski
wrote:
> This introduces platform-specific compatibles for the A13, A20 and A33
> SRAM driver. No particular adaptation for these platforms is required at
> this point, although this might become the case in the future.
>
> Signed-off-by: Paul Koci
Hi,
Le 04/05/2018 à 04:09, Wan, Jane (Nokia - US/Sunnyvale) a écrit
The following is the reposting of patch with v2 version indication based on comment on
"[PATCH 1/2]" (also in the attachment).
Subject: [PATCH v2 2/2] mtd: rawnand: fsl_ifc: use bit-wise majority to
recover the contents of O
"Alastair D'Silva" writes:
> diff --git a/include/uapi/misc/ocxl.h b/include/uapi/misc/ocxl.h
> index 0af83d80fb3e..8d2748e69c84 100644
> --- a/include/uapi/misc/ocxl.h
> +++ b/include/uapi/misc/ocxl.h
> @@ -48,6 +48,15 @@ struct ocxl_ioctl_metadata {
> __u64 reserved[13]; // Total of 16*u64
On Thu, 2018-05-10 at 23:26 +, Luis R. Rodriguez wrote:
> On Wed, May 09, 2018 at 10:00:58PM -0400, Mimi Zohar wrote:
> > On Wed, 2018-05-09 at 23:48 +, Luis R. Rodriguez wrote:
> > > On Wed, May 09, 2018 at 06:06:57PM -0400, Mimi Zohar wrote:
> >
> > > > > > Yes, writing regdb as a micro/
A headless page also need to be set UNDER_RECLAIM in previous
reply, but I missed it.
---
mm/z3fold.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/mm/z3fold.c b/mm/z3fold.c
index 5f659ab..8536a47 100644
--- a/mm/z3fold.c
+++ b/mm/z3fold.c
@@ -849,10 +849,10 @@ static int
Hi Linus,
As last week seemed a bit slow, we got a few more fixes this week.
The main stuff is 2 weeks of fixes for amdgpu, some missing bits of
vega12 atom firmware support were added, and some power management
fixes.
Nouveau got two regression fixes for an DP MST deadlock and a random oops fix
On Fri, May 11, 2018 at 01:24:42AM +, Dey, Megha wrote:
>
> Are you suggesting that the SIMD wrapper, will do what is currently being
> done by the ' mcryptd_queue_worker ' function (assuming FPU is not disabled)
> i.e dispatching the job to the inner algorithm?
>
> I have got rid of the mc
On 05/10/2018 07:40 PM, Arnd Bergmann wrote:
On Wed, Apr 18, 2018 at 3:19 AM, Greentime Hu wrote:
2018-04-17 20:47 GMT+08:00 Arnd Bergmann :
On Mon, Apr 16, 2018 at 11:06 AM, Greentime Hu wrote:
2018-04-16 11:58 GMT+08:00 Guenter Roeck :
This built failure is because the toolchain version y
Hi Finn,
Am 11.05.2018 um 15:28 schrieb Finn Thain:
> On Fri, 11 May 2018, Michael Schmitz wrote:
>
Which begs the question: why can' you set up all Nubus bus devices'
DMA masks in nubus_device_register(), or nubus_add_board()?
>>>
>>> I am expecting to see the same WARNING from the nu
Hello Andrew,
On 05/11/2018 05:49 AM, Andrew Morton wrote:
On Thu, 10 May 2018 13:32:30 +0800 Larry Chen wrote:
ocfs2_inode_lock_tracker as a variant of ocfs2_inode_lock,
is used to prevent deadlock due to recursive lock acquisition.
But this function does not distinguish
whether the reques
On 09/05/18 20:46, Steven Rostedt wrote:
>
> From: "Steven Rostedt (VMware)"
>
> Doing an audit of trace events, I discovered two trace events in the xen
> subsystem that use a hack to create zero data size trace events. This is not
> what trace events are for. Trace events add memory footprint
On Thu, May 10, 2018 at 03:48:44PM -0700, Andrew Morton wrote:
> so I think I'll just ignore all that and send this series off to Linus next
> week.
Great. Thank you, Andrew.
On Wed, Apr 4, 2018 at 9:32 AM, Will Deacon wrote:
> Hi Linus,
>
> Please pull these arm64 updates for 4.17. Note that I've pulled in a
> stable branch from Eric Biederman here to fulfil some siginfo dependencies,
> so the diffstat strays slightly out of arm64 due to his changes.
{snip}
>
> Catali
> Subject: Re: cross-compiling a 64-bit kernel on a 32-bit host
>
> Hi Josh,
>
> CC LKP team.
>
> On Thu, May 10, 2018 at 05:36:19PM -0500, Josh Poimboeuf wrote:
> >Hi Fengguang,
> >
> >I occasionally get compilation bug reports from people who are
> >cross-compiling an x86-64 kernel target on
On Thu, May 10, 2018 at 08:50:07PM +0100, Dmitry Safonov wrote:
> random uses __ratelimit() which calls ___ratelimit() with a function
> name. Depending on !RATELIMIT_MSG_ON_RELEASE it prints how many
> messages were suppressed every ratelimit interval (1 second for random)
> and flushes ratelimit_
This file contains symbol values, and was originally linked into
vmlinux, but I have no idea what it was actually used for.
Since commit 827880ec260b ("x86/um: thin archives build fix"), it is
not even linked. Now it is completely orphan, and no problem has
been reported. It is a proof that this
Richard,
2018-05-09 15:36 GMT+09:00 Richard Weinberger :
> Masahiro,
>
> Am Mittwoch, 9. Mai 2018, 05:36:18 CEST schrieb Masahiro Yamada:
>> Hi Richard,
>>
>>
>> Please let me ask a question about vdso-syms.lds
>> under arch/x86/um/vdso/.
>>
>> This file exists since:
>>
>> commit f1c2bb8b9964ed3
On 2018-05-10 8:50 PM, Robin Murphy wrote:
On 10/05/18 10:16, d...@t-chip.com.cn wrote:
From: Levin Du
Adding a new gpio controller named "gpio-syscon10" to rk3328, providing
access to the pins defined in the syscon GRF_SOC_CON10.
This is the GPIO_MUTE pin, right? The public TRM is rather va
On Fri, May 11, 2018 at 10:53:24AM +0800, Ye Xiaolong wrote:
> Hi, Joe
>
> Sorry for the late response.
Hi Xiaolong, no worries...
> On 04/26, Joe Lawrence wrote:
> >>On 04/25/2018 02:28 PM, Joe Lawrence wrote:
> >
> >> [ ... snip ... ]
> >>
> >> base-commit: 0adb32858b0bddf4ada5f364a84ed60b196
Hi Josh,
CC LKP team.
On Thu, May 10, 2018 at 05:36:19PM -0500, Josh Poimboeuf wrote:
Hi Fengguang,
I occasionally get compilation bug reports from people who are
cross-compiling an x86-64 kernel target on an x86-32 host.
Any chance the 0-day build bot could test that configuration? I think
From: Zhang Ying-22455
Add the identify of the platform to support set the rcpm with
big-endian or little-endian.
Signed-off-by: Zhang Ying-22455
---
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts
From: Zhang Ying-22455
Add the identify of the platform to support set the rcpm with
big-endian or little-endian.
Signed-off-by: Zhang Ying-22455
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm64/boot/dts/fre
From: Yuantian Tang
In current kernel, only psci v1.0 is supported. But our psci firmware
only support psci v0.2. So update psci driver to support psci v0.2.
Signed-off-by: Tang Yuantian
---
drivers/firmware/psci.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/dri
From: Zhang Ying-22455
Signed-off-by: Zhang Ying-22455
---
drivers/soc/fsl/layerscape/ftm_alarm.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/soc/fsl/layerscape/ftm_alarm.c
b/drivers/soc/fsl/layerscape/ftm_alarm.c
index 811dcfa..c22ef49 100644
--- a/drivers
From: Zhang Ying-22455
Add the identify of the platform to support set the rcpm with
big-endian or little-endian.
Signed-off-by: Zhang Ying-22455
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm64/boot/dts/fre
From: Yuantian Tang
Technically psci v0.2 can not support system sleep. Unfortunately
our PPA only supports psci v0.2. So workaround this by changing
psci v1.0 to v0.2 call to implement system sleep.
Signed-off-by: Tang Yuantian
Signed-off-by: Yinbo Zhu
---
drivers/firmware/psci.c | 16
From: Ran Wang
When rcpm driver get target register data from DTS property 'fsl,
rcpm-wakeup' (second value), it directly write that data to register
RCPM_IPPDEXPCRx rather than 'OR' the value read from it before. This
operation will over-write those non-related IP control bit which
might have be
From: Zhang Ying-22455
Set RCPM for FTM when using FTM as wakeup source. Because the RCPM
module of each platform has different big-end and little-end mode,
there need to set RCPM depending on the platform.
Signed-off-by: Zhang Ying-22455
Signed-off-by: Yinbo Zhu
---
.../devicetree/bindings/t
From: Yuantian Tang
The Run Control and Power Management (RCPM) module communicates
with embedded cores, coherency modules, and other device platform
module to provide run control and power management functionality
Signed-off-by: Tang Yuantian
Signed-off-by: Yinbo Zhu
---
drivers/soc/fsl/Make
According to a description from TRM, add all the power domains.
Signed-off-by: Elaine Zhang
---
include/dt-bindings/power/rk3228-power.h | 26 ++
1 file changed, 26 insertions(+)
create mode 100644 include/dt-bindings/power/rk3228-power.h
diff --git a/include/dt-binding
This driver is modified to support RK3228 SoC.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index 99a2dd8a7801..90dcd5e21a
Add binding documentation for the power domains
found on Rockchip RK3228 SoCs.
Signed-off-by: Elaine Zhang
---
Documentation/devicetree/bindings/soc/rockchip/power_domain.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
b
Add binding documentation for the power domains
found on Rockchip PX30 SoCs.
Signed-off-by: Elaine Zhang
Signed-off-by: Finley Xiao
---
Documentation/devicetree/bindings/soc/rockchip/power_domain.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/ro
This driver is modified to support PX30 SoC.
Signed-off-by: Elaine Zhang
Signed-off-by: Finley Xiao
---
drivers/soc/rockchip/pm_domains.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
in
On Fri, 11 May 2018, Michael Schmitz wrote:
> > > Which begs the question: why can' you set up all Nubus bus devices'
> > > DMA masks in nubus_device_register(), or nubus_add_board()?
> >
> > I am expecting to see the same WARNING from the nubus sonic driver but
> > it hasn't happened yet, so I
According to a description from TRM, add all the power domains.
Signed-off-by: Elaine Zhang
Signed-off-by: Finley Xiao
---
include/dt-bindings/power/px30-power.h | 32
1 file changed, 32 insertions(+)
create mode 100644 include/dt-bindings/power/px30-power.h
d
Add binding documentation for the power domains
found on Rockchip RK3128 SoCs.
Signed-off-by: Elaine Zhang
---
Documentation/devicetree/bindings/soc/rockchip/power_domain.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
b
According to a description from TRM, add all the power domains.
Signed-off-by: Elaine Zhang
---
include/dt-bindings/power/rk3128-power.h | 28
1 file changed, 28 insertions(+)
create mode 100644 include/dt-bindings/power/rk3128-power.h
diff --git a/include/dt-bindi
This driver is modified to support RK3128 SoC.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index 01d4ba26a054..99a2dd8a7801 1
According to a description from TRM, add all the power domains.
Signed-off-by: Elaine Zhang
Signed-off-by: Caesar Wang
---
include/dt-bindings/power/rk3036-power.h | 27 +++
1 file changed, 27 insertions(+)
create mode 100644 include/dt-bindings/power/rk3036-power.h
di
Add binding documentation for the power domains
found on Rockchip RK3036 SoCs.
Signed-off-by: Elaine Zhang
---
Documentation/devicetree/bindings/soc/rockchip/power_domain.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
b
Signed-off-by: Elaine Zhang
Signed-off-by: Finley Xiao
---
drivers/soc/rockchip/pm_domains.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index ebd7c41898c0..01d4ba26a054 100644
--- a/drivers/soc/rockch
This driver is modified to support RK3036 SoC.
Signed-off-by: Elaine Zhang
Signed-off-by: Caesar Wang
---
drivers/soc/rockchip/pm_domains.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.
add power domain support for RK3036/RK3128/RK3228/PX30 Soc.
fix up the wrong value when set power domain up.
Elaine Zhang (13):
dt-bindings: power: add RK3036 SoCs header for power-domain
dt-bindings: add binding for rk3036 power domains
Soc: rockchip: power-domain: add power domain support
> From: owner-linux...@kvack.org [mailto:owner-linux...@kvack.org] On Behalf Of
> Matthew
> Wilcox
> On Fri, May 11, 2018 at 12:10:25AM +0800, Huaisheng Ye wrote:
> > -#define __GFP_DMA ((__force gfp_t)___GFP_DMA)
> > -#define __GFP_HIGHMEM ((__force gfp_t)___GFP_HIGHMEM)
> > -#define __GFP_
The patch
ASoC: amd: dma config parameters changes
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linu
The patch
ASoC: amd: added byte count register offset variables to rtd
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hou
The patch
ASoC: amd: removed separate byte count variables for playback and capture
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in th
The patch
soc: qcom dt-bindings: Add APR bus bindings
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to L
The patch
soc: qcom: Add APR bus driver
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
th
The patch
ASoC: qdsp6: dt-bindings: Add q6core dt bindings
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
Hi Changbin,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v4.17-rc4 next-20180510]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day
The patch
ASoC: qdsp6: dt-bindings: Add q6afe dt bindings
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
The patch
ASoC: qdsp6: dt-bindings: Add q6adm dt bindings
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
The patch
ASoC: qdsp6: dt-bindings: Add q6asm dt bindings
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
The patch
ASoC: qdsp6: q6common: Add qdsp6 helper functions
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sen
imm24 is signed, so the right range is:
[-(1<<(24 - 1)), (1<<(24 - 1)) - 1]
Note:this patch also fix a typo.
Signed-off-by: Wang YanQing
---
Changes
v1-v2:
1:Rewrite the patch, I make a mistake, the v1 is wrong totally,
reported by Russell King.
I use the fix suggested by Russell King
The Orange Pi Zero Plus has an additional LED that was missing from the
device tree, and the power sequence for the SDIO Wi-Fi was missing.
The board also has UARTs 1, 2, and 3 exposed on a 26-pin GPIO header. As
the header is not populated by the manufacturer, disable the UARTs by
default.
Addit
Enable the following board hardware features:
- Gigabit Ethernet
- SDIO Wi-Fi on mmc1
- SPI flash on spi0
- Status LED
- Dual-role micro-USB connection
Also provide nodes for the UARTs exposed by the 40-pin GPIO header.
A couple of fixes were made:
- Updating a couple of regulators from the schem
On Fri, 2018-05-11 at 11:41 +0900, Sergey Senozhatsky wrote:
> On (05/10/18 19:33), Joe Perches wrote:
> > >
> > > [ 28.420519] generic: RSP: 0018:a01dc062bda8 EFLAGS: 00010282
> > > [ 28.420522] generic: RAX: 8317612f RBX: ffea RCX:
> > > a01dc062bdc8
> > > [ 28
The names for BPF_ALU64 | BPF_ARSH are emit_a32_arsh_*,
the names for BPF_ALU64 | BPF_LSH are emit_a32_lsh_*, but
the names for BPF_ALU64 | BPF_RSH are emit_a32_lsr_*.
For consistence reason, let's rename emit_a32_lsr_* to
emit_a32_rsh_*.
This patch also correct a wrong comment.
Signed-off-by: W
Hi, Joe
Sorry for the late response.
On 04/26, Joe Lawrence wrote:
>>On 04/25/2018 02:28 PM, Joe Lawrence wrote:
>
>> [ ... snip ... ]
>>
>> base-commit: 0adb32858b0bddf4ada5f364a84ed60b196dbcda
>> prerequisite-patch-id: 5ed747c1a89a5dc4bba08186e21f927d7f3bf049
>> prerequisite-patch-id: e9800288
The patch
ASoC: zx-i2s: fix spelling mistake: "timeing" -> "timing"
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours)
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