Hello,
Since we decided to remove jprobe from kernel last year,
its APIs are disabled and we worked on moving in-kernel
jprobe users to kprobes or trace-events. And now no jprobe
users are here anymore.
This is the 4th version of the series for removing jprobe.
Previous version is here:
https:/
Hi,
On 2018년 05월 26일 05:30, Matthias Kaehlcke wrote:
> The performance, powersave and simpleondemand governors can return
> df->min/max_freq, which are the user defined frequency limits.
> update_devfreq() already takes care of adjusting the target frequency
> with the user limits if necessary, th
On Fri, May 25, 2018 at 05:25:09PM +0200, Arnd Bergmann wrote:
> I ran into a randconfig build error with the new driver:
>
> drivers/media/platform/cadence/cdns-csi2tx.c: In function 'csi2tx_probe':
> drivers/media/platform/cadence/cdns-csi2tx.c:477:11: error: implicit
> declaration of function
Hi Rob,
On 2018-05-24 19:50, Rob Herring wrote:
> Now that we use the driver core to stop deferred probe for missing
> drivers, IOMMU_OF_DECLARE can be removed.
>
> This is slightly less optimal than having a list of built-in drivers in
> that we'll now defer probe twice before giving up. This sho
On Fri, May 25, 2018 at 11:07:42PM +0200, Arnd Bergmann wrote:
> The newly added runtime-pm functions cause a harmless warning
> when CONFIG_PM is disabled:
>
> drivers/mmc/host/sunxi-mmc.c:1452:12: error: 'sunxi_mmc_runtime_suspend'
> defined but not used [-Werror=unused-function]
> static int
On 05/28/2018 05:49 AM, Ravi Bangoria wrote:
> Hi Thomas,
>
> On 05/24/2018 07:26 PM, Thomas Richter wrote:
>> @@ -95,7 +98,7 @@ int test__session_topology(struct test *test
>> __maybe_unused, int subtest __maybe
>> {
>> char path[PATH_MAX];
>> struct cpu_map *map;
>> -int ret = -1
Hi Bart
On 05/20/2018 07:51 PM, Bart Van Assche wrote:
> On Sun, 2018-05-20 at 07:54 +0530, Alim Akhtar wrote:
>> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
>> index a355d98..9a1374e 100644
>> --- a/drivers/scsi/ufs/ufshcd.c
>> +++ b/drivers/scsi/ufs/ufshcd.c
>> @@ -7781,6
Hi,
On Mon, May 28, 2018 at 10:26:54AM +0800, Shawn Guo wrote:
> On Tue, Feb 27, 2018 at 11:17:12AM +0100, Sebastian Reichel wrote:
> > Hi,
> >
> > On Tue, Feb 27, 2018 at 09:10:34AM +0800, Shawn Guo wrote:
> > > On Mon, Feb 26, 2018 at 02:47:41PM +0100, Sebastian Reichel wrote:
> > > > On Sat, F
This patch add component AAL1 and
rename AAL to AAL0
Signed-off-by: Stu Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 2 +-
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 3 ++-
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 3 ++-
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +-
4 fi
Update device tree binding documentation for the display subsystem for
Mediatek MT2712 SoCs.
Signed-off-by: Stu Hsieh
Acked-by: CK Hu
---
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Documentation/devic
This patch add support for the Mediatek MT2712 DISP subsystem.
There are two OVL engine and three disp output in MT2712.
Signed-off-by: Stu Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 39 ++
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 38 ++
This patch support that if modules more than 32,
add index more than 31 when using DISP_REG_MUTEX_MOD2 bit
Signed-off-by: Stu Hsieh
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 75 +-
1 file changed, 47 insertions(+), 28 deletions(-)
diff --gi
This patch add component PWM1 in mtk_ddp_matches
Signed-off-by: Stu Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 87acf6be87f6..a5c7ac2d162
This patch add the connection from OD1 to RDMA1 for ext path.
Signed-off-by: Stu Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 58e44349e315..8bfc0debd
This patch add component PWM2
Signed-off-by: Stu Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp
This patch create third crtc by third ddp path
Signed-off-by: Stu Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 3 +++
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 +
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 7 +--
3 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/dri
This patch add the component OD1 and
rename the OD to OD1
Signed-off-by: Stu Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 ++--
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 3 ++-
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 3 ++-
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +
On 05/27/2018 11:03 PM, Vinod wrote:
[ ... ]
diff --git a/sound/soc/intel/skylake/skl-tplg-interface.h
b/sound/soc/intel/skylake/skl-tplg-interface.h
index f8d1749a2e0c..b0e3d376594c 100644
--- a/sound/soc/intel/skylake/skl-tplg-interface.h
+++ b/sound/soc/intel/skylake/skl-tplg-interface.h
Do
This patch add support for the Mediatek MT2712 DISP subsystem.
MT2712 is base on MT8173, there are some difference as following:
MT2712 support three disp output(two ovl and one rdma)
Change in v4:
- Move some modification about AAL1 from patch
"Add support for mediatek SOC MT2712" to
"add ddp
Hi,
On 2018년 05월 26일 05:30, Matthias Kaehlcke wrote:
> Commit ab8f58ad72c4 ("PM / devfreq: Set min/max_freq when adding the
> devfreq device") initializes df->min/max_freq with the min/max OPP when
> the device is added. Later commit f1d981eaecf8 ("PM / devfreq: Use the
> available min/max frequen
The "old" enumeration scheme is considerably faster (it takes
~244ms instead of ~356ms to get the descriptor).
It is currently only possible to use the old scheme globally
(/sys/module/usbcore/parameters/old_scheme_first), which is not
desirable as the new scheme was introduced to increase compati
Currently, the USB hub core waits for 50 ms after enumerating the
device. This was added to help "some high speed devices" to
enumerate (b789696af8 "[PATCH] USB: relax usbcore reset timings").
On some devices, the time-to-active is important, so we provide
a per-port option to reduce the time to w
On Mon, 28 May 2018, Christoph Hellwig wrote:
> On Mon, May 28, 2018 at 08:18:46AM +0200, Thomas Gleixner wrote:
> > > Which other two? The boot optional removal patches? They just remove
> > > the visible interface, but keep the implementation which is converted
> > > to the better mechanism he
On Mon, May 28, 2018 at 08:18:46AM +0200, Thomas Gleixner wrote:
> > Which other two? The boot optional removal patches? They just remove
> > the visible interface, but keep the implementation which is converted
> > to the better mechanism here, so I think the order makes sense.
> > But I might b
Summary: mke2s uses the BLKDISCARD ioctl to wipe the device,
and then uses BLKDISCARDZEROES to check if that zeroed the data.
A while ago I made BLKDISCARDZEROES always return 0 because it is
basically impossible to have reliably zeroing using discard as the
standards leave the devices way to many
On Mon, 28 May 2018, Christoph Hellwig wrote:
> On Mon, May 28, 2018 at 08:10:40AM +0200, Thomas Gleixner wrote:
> > n Fri, 25 May 2018, Christoph Hellwig wrote:
> >
> > x86/pci-dma: ...
> >
> > Please
> >
> > > Instead of globally disabling > 32bit DMA using the arch_dma_supported
> > > hook w
Hi,
Are there any updates on this?
On Tue, May 22, 2018 at 11:06:05PM +0300, Mike Rapoport wrote:
> The test verifies that when there is active TCP connection, the
> memory.stat.sock and memory.current values are close.
>
> Signed-off-by: Mike Rapoport
> Acked-by: Roman Gushchin
> ---
> v3 cha
Put data to skb, decrypt with lib80211_crypt_wep, and place back to tx buffer.
Signed-off-by: Ivan Safonov
---
drivers/staging/rtl8188eu/core/rtw_security.c | 72 ---
1 file changed, 43 insertions(+), 29 deletions(-)
diff --git a/drivers/staging/rtl8188eu/core/rtw_securi
On 2018-05-26 14:28, Miquel Raynal wrote:
Hi Abhishek,
@@ -2141,12 +2127,10 @@ static int qcom_nandc_block_bad(struct
mtd_info *mtd, loff_t ofs)
goto err;
}
- bbpos = mtd->writesize - host->cw_size * (ecc->steps - 1);
-
- bad = nandc->data_buffer[bbpos] !=
GPC is in always-on domain, it never lost its
content during suspend/resume, so no need to
do save/restore for it during suspend/resume.
Signed-off-by: Anson Huang
---
changes since V1:
Add missing wakeup source write into GPC IMR register;
remove all necessary arrays;
sus
On Fri, 25 May 2018, Radim Krčmář wrote:
> 2018-05-25 13:16-0400, Waiman Long:
> > As the SSBD bit in kvm_cpuid_7_0_edx_x86_features has been renamed to
> > SPEC_CTRL_SSBD in the commit 52817587e706 ("x86/cpufeatures: Disentangle
> > SSBD enumeration"). The corresponding name change needed to be m
On Mon, May 28, 2018 at 08:10:40AM +0200, Thomas Gleixner wrote:
> n Fri, 25 May 2018, Christoph Hellwig wrote:
>
> x86/pci-dma: ...
>
> Please
>
> > Instead of globally disabling > 32bit DMA using the arch_dma_supported
> > hook walk the PCI bus under the actually affected bridge and mark every
On 2018-05-26 14:16, Miquel Raynal wrote:
Hi Abhishek,
On Fri, 25 May 2018 17:51:41 +0530, Abhishek Sahu
wrote:
The QCOM NAND controller layout is such that, the bad block byte
offset for last codeword will come to first byte in spare area.
"is the first spare byte"?
Currently, the raw r
n Fri, 25 May 2018, Christoph Hellwig wrote:
x86/pci-dma: ...
Please
> Instead of globally disabling > 32bit DMA using the arch_dma_supported
> hook walk the PCI bus under the actually affected bridge and mark every
> device with the dma_32bit_limit flag. This also gets rid of the
> arch_dma_su
When compiled with GCC 8.1, vmlinux is significantly bigger than
with GCC 4.8.
When looking at the generated code with objdump, we notice that
all functions and loops when a 16 bytes alignment. This significantly
increases the size of the kernel. It is pointless and even
counterproductive as on th
On Fri, 25 May 2018, Christoph Hellwig wrote:
x86/pci-dma: ...
Please
> This is something drivers should decide (modulo chipset quirks like
> for VIA), which as far as I can tell is how things have been handled
> for the last 15 years.
>
> Note that we keep the usedac option for now, as it is u
On Fri, 25 May 2018, Christoph Hellwig wrote:
x86/pci-dma: ...
Please
> Limiting the dma mask to avoid PCI (pre-PCIe) DAC cycles while paying
> the huge overhead of an IOMMU is rather pointless, and this seriously
> gets in the way of dma mapping work.
>
> Signed-off-by: Christoph Hellwig
Rev
On 25-05-18, 19:03, Shreyas NC wrote:
> Adding Vinod to help review as well..
Thanks Shreyas,
> > Commit dc31e741db49 ("ASoC: topology: ABI - Add the types for BE
> > DAI") introduced sound topology files version 5. Initially, this
> > change made the topology code incompatible with v4 topology f
On 2018-05-26 14:13, Miquel Raynal wrote:
Hi Abhishek,
On Fri, 25 May 2018 17:51:34 +0530, Abhishek Sahu
wrote:
Currently the driver uses the ECC strength specified in DT.
The QPIC/EBI2 NAND supports 4 or 8-bit ECC correction. The same
kind of board can have different NAND parts so use the EC
>Many CPU architectures have caches that can scale independent of the CPUs.
>Frequency scaling of the caches is necessary to make sure the cache is not
>a performance bottleneck that leads to poor performance and power. The same
>idea applies for RAM/DDR.
>
>To achieve this, this patch series adds
On 2018-05-26 14:12, Miquel Raynal wrote:
Hi Abhishek,
On Fri, 25 May 2018 17:51:33 +0530, Abhishek Sahu
wrote:
QCOM NAND controller supports only one step size (512) so
nand-ecc-step-size DT property is redundant. This property
can be removed and ecc step size can be assigned with 512 value.
On 2018-05-26 14:12, Miquel Raynal wrote:
Hi Abhishek,
On Fri, 25 May 2018 17:51:31 +0530, Abhishek Sahu
wrote:
If nand-ecc-strength specified in DT, then controller will use
this ECC strength otherwise ECC strength will be calculated
according to chip requirement and available OOB size.
Sig
On 2018-05-26 14:12, Miquel Raynal wrote:
Hi Abhishek,
On Fri, 25 May 2018 17:51:29 +0530, Abhishek Sahu
wrote:
commit 2c8f8afa7f92 ("mtd: nand: add generic helpers to check,
match, maximize ECC settings") provides generic helpers which
drivers can use for setting up ECC parameters.
Since sa
From: Pramod Kumar
This commit adds stingray thermal driver to monitor six
thermal zones temperature and trips at critical temperature.
Signed-off-by: Pramod Kumar
Signed-off-by: Srinath Mannam
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
Reviewed-by: Vikram Prakash
---
drivers/thermal/
From: Pramod Kumar
Add DT nodes for thermal zones memory base address
to read temperature.
Signed-off-by: Pramod Kumar
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
Reviewed-by: Srinath Mannam
---
.../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 37 ++
1 file chang
From: Pramod Kumar
Add binding document for supported thermal implementation
in Stingray.
Signed-off-by: Pramod Kumar
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
Reviewed-by: Srinath Mannam
---
.../bindings/thermal/brcm,sr-thermal.txt | 45 ++
1 file change
These patches adds the stingray thermal driver and its
corresponding DT nodes with documentation.
Pramod Kumar (3):
dt-bindings: thermal: Add binding document for SR thermal
arm64: dts: stingray: Add Stingray Thermal DT support.
thermal: broadcom: Add Stingray thermal driver
.../bindings/t
Hi,
On 2018년 05월 26일 05:30, Matthias Kaehlcke wrote:
> The userspace and simpleondemand governor determine a target frequency and
> then adjust it according to the df->min/max_freq limits that might have
> been set by user space. This adjustment is redundant, it is done in
> update_devfreq() for a
Hi,
On 5/24/2018 4:15 PM, Raju P L S S S N wrote:
From: Lina Iyer
Add controller driver for QCOM SoCs that have hardware based shared
resource management. The hardware IP known as RSC (Resource State
Coordinator) houses multiple Direct Resource Voter (DRV) for different
execution levels. A DRV
On 27.05.2018 22:31, Florian Fainelli wrote:
Le 05/27/18 à 12:01, Gerhard Wiesinger a écrit :
On 24.05.2018 08:22, Gerhard Wiesinger wrote:
On 24.05.2018 07:29, Gerhard Wiesinger wrote:
After some analysis with Florian (thnx) we found out that the current
implementation is broken:
https://pat
Hi all,
I am a student from Peking University. I'm not sure if it's
appropriate to ask questions here. I have already tried other mailing
lists, but I got no reply. I am very sorry to bother all of you.
I am doing a research about the maintainers' workload in the Linux
kernel community. We all kn
Hi,
On 2018년 05월 26일 05:30, Matthias Kaehlcke wrote:
> Commit "PM / devfreq: Fix handling of min/max_freq == 0" ensures that
> df->max_freq is not 0, remove unnecessary checks.
>
> Signed-off-by: Matthias Kaehlcke
> ---
> drivers/devfreq/governor_performance.c| 5 +
> drivers/devfreq/go
Hi,
On 2018년 05월 26일 05:30, Matthias Kaehlcke wrote:
> Commit ab8f58ad72c4 ("PM / devfreq: Set min/max_freq when adding
> the devfreq device") introduced the initialization of the user
> limits min/max_freq from the lowest/highest available OPPs. Later
> commit f1d981eaecf8 ("PM / devfreq: Use the
On Sat, May 26, 2018 at 09:15:05PM -0700, Guenter Roeck wrote:
> Good point. Maybe it would be better to limit the warning to SMP systems
> instead of (unnecessarily) fixing drivers all over the place ?
No. The coherent_dma_mask is the mask used for dma_alloc_coherent and
dma_alloc_attrs. It has
On Mon, 28 May 2018, Michael Schmitz wrote:
> Hi Finn,
>
> Am 27.05.2018 um 17:49 schrieb Finn Thain:
> > On Sun, 27 May 2018, Michael Schmitz wrote:
> >
> >> That should have fixed the warning already ...
> >
> > It's still not fixed (hence my "acked-by" for Geunter's patch).
> >
>
> Odd - d
On 27.05.2018 22:35, Florian Fainelli wrote:
Le 05/27/18 à 12:18, Gerhard Wiesinger a écrit :
On 27.05.2018 21:01, Gerhard Wiesinger wrote:
On 24.05.2018 08:22, Gerhard Wiesinger wrote:
On 24.05.2018 07:29, Gerhard Wiesinger wrote:
After some analysis with Florian (thnx) we found out that the
>Currently update_devfreq() is only visible to devfreq governors outside
>of devfreq.c. Make it public to allow drivers that adjust devfreq policies
>to cause a re-evaluation of the frequency after a policy change.
>
>Signed-off-by: Matthias Kaehlcke
>---
> drivers/devfreq/governor.h | 3 ---
> inc
Some regression and improvements is found by LKP-tools(linux kernel
performance) on V9 patch series
tested on Intel 4s Skylake platform.
The regression result is sorted by the metric will-it-scale.per_thread_ops.
Branch: Laurent-Dufour/Speculative-page-faults/20180316-151833 (V9 patch series)
Co
> -Original Message-
> From: Warzecha, Douglas
> Sent: Friday, May 25, 2018 2:02 PM
> To: Stuart Hayes
> Cc: Limonciello, Mario; Dominguez, Jared; linux-kernel@vger.kernel.org
> Subject: RE: [PATCH v2] dcdbas: Add support for WSMT ACPI table
>
>
> On 05/16/2018 9:06 AM, Stuart Hayes wro
On Mon, May 28, 2018 at 11:33:55AM +0800, nixiaoming wrote:
> Signed-off-by: nixiaoming
Please do not submit patches without any changelog text. I do not
accept such patches, but other maintainers might be easier...
greg k-h
Hi Finn,
Am 27.05.2018 um 17:49 schrieb Finn Thain:
> On Sun, 27 May 2018, Michael Schmitz wrote:
>
>> That should have fixed the warning already ...
>
> It's still not fixed (hence my "acked-by" for Geunter's patch).
>
Odd - does link order still matter even though the
arch_setup_dev_archdata
>Policy notifiers are called before a frequency change and may narrow
>the min/max frequency range in devfreq_policy, which is used to adjust
>the target frequency if it is beyond this range.
>
>Also add a few helpers:
> - devfreq_verify_within_[dev_]limits()
>- should be used by the notifiers
On Thu, May 24, 2018 at 03:52:39PM +0200, Peter Rosin wrote:
> Needed for annotating rt_mutex locks.
>
> Signed-off-by: Peter Rosin
> ---
> include/linux/rtmutex.h | 7 +++
> kernel/locking/rtmutex.c | 29 +
> 2 files changed, 32 insertions(+), 4 deletions(-)
>
Hi all,
Just inform you a news reported by a user who confirmed the wake up
issue can't be reproduce by the new kernel.
https://bugzilla.kernel.org/show_bug.cgi?id=61651#c126
Guillaume de Jabrun 2018-05-27 15:12:54 UTC
I am using this patch for a long time. I was experiencing the "wake up
twice
>The performance, powersave and simpleondemand governors can return
>df->min/max_freq, which are the user defined frequency limits.
>update_devfreq() already takes care of adjusting the target frequency
>with the user limits if necessary, therefore we can return
>df->scaling_min/max_freq instead, w
On 25-05-18, 15:41, Ilia Lin wrote:
> In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
> the CPU frequency subset and voltage value of each OPP varies
> based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
> defines the voltage and frequency value bas
> The userspace and simpleondemand governor determine a target frequency and
> then adjust it according to the df->min/max_freq limits that might have
> been set by user space. This adjustment is redundant, it is done in
> update_devfreq() for any governor, right after returning from
> governor->ge
>Commit "PM / devfreq: Fix handling of min/max_freq == 0" ensures that
>df->max_freq is not 0, remove unnecessary checks.
>
>Signed-off-by: Matthias Kaehlcke
>---
> drivers/devfreq/governor_performance.c| 5 +
> drivers/devfreq/governor_simpleondemand.c | 7 +++
> 2 files changed, 4 inse
On Mon, 2018-05-28 at 12:13 +0800, Ian Kent wrote:
> On Fri, 2018-05-25 at 20:48 -0700, Andrew Morton wrote:
> > On Sat, 26 May 2018 11:31:35 +0800 kbuild test robot wrote:
> >
> > > Hi Andrey,
> > >
> > > I love your patch! Yet something to improve:
> > >
> > > [auto build test ERROR on mmotm/
On Fri, 2018-05-25 at 20:48 -0700, Andrew Morton wrote:
> On Sat, 26 May 2018 11:31:35 +0800 kbuild test robot wrote:
>
> > Hi Andrey,
> >
> > I love your patch! Yet something to improve:
> >
> > [auto build test ERROR on mmotm/master]
> > [cannot apply to v4.17-rc6]
> > [if your patch is appli
> Commit ab8f58ad72c4 ("PM / devfreq: Set min/max_freq when adding the
> devfreq device") initializes df->min/max_freq with the min/max OPP when
> the device is added. Later commit f1d981eaecf8 ("PM / devfreq: Use the
> available min/max frequency") adds df->scaling_min/max_freq and the
> following
Signed-off-by: nixiaoming
---
arch/arm64/mm/mmu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 2dbb2c9..849f326 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -491,6 +491,7 @@ static void __init map_mem(pgd_t *pgdp)
#endif
Signed-off-by: nixiaoming
---
arch/x86/mm/init_32.c | 2 ++
arch/x86/mm/init_64.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index c893c6a..121c567 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -920,6 +920,7 @@ static v
Signed-off-by: nixiaoming
---
arch/s390/mm/init.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index 3fa3e53..a96fc3f 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -116,6 +116,7 @@ void __init paging_init(void)
free_area_i
Hi Thomas,
On 05/24/2018 07:26 PM, Thomas Richter wrote:
> @@ -95,7 +98,7 @@ int test__session_topology(struct test *test
> __maybe_unused, int subtest __maybe
> {
> char path[PATH_MAX];
> struct cpu_map *map;
> - int ret = -1;
> + int ret;
This is failing for me:
tests/top
channel 1: SYSMEM<->ACP
channel 2: ACP<->I2S
Instead of waiting on period interrupt of ch 2 and then starting
dma on ch1, we make ch1 dma as circular.
This removes dependency of period granularity on hw pointer.
Signed-off-by: Akshu Agrawal
Reviewed-by: Daniel Kurtz
Tested-by: Daniel Kurtz
---
On 2018-05-24 8:18 PM, Heiko Stuebner wrote:
Hi Levin,
Am Donnerstag, 24. Mai 2018, 03:59:36 CEST schrieb Levin Du:
Hi all, I'd like to quote reply of Robin Murphy at
http://lists.infradead.org/pipermail/linux-rockchip/2018-May/020619.html
I would suggest s/pin number/bit number in the ass
On Thu, Jan 25, 2018 at 12:33:21AM -0800, vcap...@pengaru.com wrote:
> On Fri, Jan 19, 2018 at 11:57:32AM +0100, Enric Balletbo Serra wrote:
> > Hi Vito,
> >
> > 2018-01-17 23:48 GMT+01:00 :
> > > On Mon, Dec 18, 2017 at 10:25:33AM +0100, Enric Balletbo Serra wrote:
> > >> Hi Vito,
> > >>
> > >>
Linux 4.17-rc6 (2018-05-20 15:31:38 -0700)
are available in the Git repository at:
ssh://g...@gitolite.kernel.org/pub/scm/linux/kernel/git/greentime/linux.git
tags/nds32-for-linus-4.17-fixes
for you to fetch changes up to a30e7d1e37e8acc37c25420d93af218166cca3ae:
nds32: Fix compiler warn
On Fri, May 25, 2018 at 05:10:54PM -0600, Mathieu Poirier wrote:
> The tail of a queue is supposed to be pointing to the next available slot
> in a queue. In this implementation the tail is incremented before it is
> used and as such points to the last used element, something that has the
> immens
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Hi, Stu:
On Mon, 2018-05-28 at 10:26 +0800, Stu Hsieh wrote:
> Hi, CK:
> I've some idea as below.
>
> On Fri, 2018-05-25 at 13:00 +0800, CK Hu wrote:
> > Hi, Stu:
> >
> > On Fri, 2018-05-25 at 10:34 +0800, stu.hs...@mediatek.com wrote:
> > > From: Stu Hsieh
> > >
> > > This patch create third
On Sun, May 27, 2018 at 07:44:52PM -0600, Jens Axboe wrote:
> On 5/27/18 1:23 AM, Ming Lei wrote:
> > On Fri, May 25, 2018 at 10:30:46AM -0600, Jens Axboe wrote:
> >> On 5/24/18 10:53 PM, Kent Overstreet wrote:
> >>> On Fri, May 25, 2018 at 11:45:48AM +0800, Ming Lei wrote:
> Hi,
>
>
On Tue, Feb 27, 2018 at 11:17:12AM +0100, Sebastian Reichel wrote:
> Hi,
>
> On Tue, Feb 27, 2018 at 09:10:34AM +0800, Shawn Guo wrote:
> > On Mon, Feb 26, 2018 at 02:47:41PM +0100, Sebastian Reichel wrote:
> > > On Sat, Feb 24, 2018 at 03:45:44PM +0800, Shawn Guo wrote:
> > > > On Mon, Feb 12, 20
Hi, CK:
I've some idea as below.
On Fri, 2018-05-25 at 13:00 +0800, CK Hu wrote:
> Hi, Stu:
>
> On Fri, 2018-05-25 at 10:34 +0800, stu.hs...@mediatek.com wrote:
> > From: Stu Hsieh
> >
> > This patch create third crtc by third ddp path
> >
>
> Apply this patch before the patch 'Add support fo
Colin King writes:
> From: Colin Ian King
>
> Trivial fix to spelling mistake in hmi_error_types text
>
> Signed-off-by: Colin Ian King
Reviewed-by: Stewart Smith
--
Stewart Smith
OPAL Architect, IBM.
On Sun, May 27, 2018 at 5:54 PM, Colin King wrote:
> From: Colin Ian King
>
> The constant values being shifted are 32 bit integers and may potentially
> overflow on the shift. Avoid this potential overflow by making them
> unsigned long long values before the shift.
>
> Detected by CoverityScan
Currently printing [hashed] pointers requires enough entropy to be
available. Early in the boot sequence this may not be the case
resulting in a dummy string '(ptrval)' being printed. This
makes debugging the early boot sequence difficult. We can relax the
requirement to use cryptographi
There are a couple of whitespace issues around the function
get_random_bytes_arch(). In preparation for patching this function
let's clean them up.
Signed-off-by: Tobin C. Harding
Acked-by: Theodore Ts'o
---
drivers/char/random.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --
Currently we must wait for enough entropy to become available before
hashed pointers can be printed. We can remove this wait by using the
hw RNG if available.
Use hw RNG to get keying material.
Cc: Steven Rostedt (VMware)
Suggested-by: Kees Cook
Signed-off-by: Tobin C. Harding
---
lib/vsprin
Currently the function get_random_bytes_arch() has return value 'void'.
If the hw RNG fails we currently fall back to using get_random_bytes().
This defeats the purpose of requesting random material from the hw RNG
in the first place.
There are currently no intree users of get_random_bytes_arch().
Currently printing pointers early in the boot sequence can result in a
dummy string '(ptrval)' being printed. While resolving this
issue it was noticed that we can use the hw RNG if available for hashing
pointers.
Patch one and two do the ground work to be able to use hw RNG removing
from
On 5/27/18 1:23 AM, Ming Lei wrote:
> On Fri, May 25, 2018 at 10:30:46AM -0600, Jens Axboe wrote:
>> On 5/24/18 10:53 PM, Kent Overstreet wrote:
>>> On Fri, May 25, 2018 at 11:45:48AM +0800, Ming Lei wrote:
Hi,
This patchset brings multipage bvec into block layer:
>>>
>>> patch serie
I was playing with cpusets and sched_load_balance flag and notice that
the fast-path (select_idle_sibling) can also be attempted for
exec-balance, not just wake-balance if the waker cpu's cpuset has
sched_load_balance = 0. This patch removes the obscure comment which was
saying this path can be ent
On Thu, May 24, 2018 at 05:29:36PM +0200, Juri Lelli wrote:
> When scheduler debug is enabled, building scheduling domains outputs
> information about how the domains are laid out and to which root domain
> each CPU (or sets of CPUs) belongs, e.g.:
>
> CPU0 attaching sched-domain(s):
> domain-0
Michael Ellerman writes:
> Akshay Adiga writes:
>
>> Init all present cpus for deep states instead of "all possible" cpus.
>> Init fails if the possible cpu is gaurded. Resulting in making only
>> non-deep states available for cpuidle/hotplug.
>
> This is basically the opposite of what we just di
Add support for Netgear Aircard 779S
Signed-off-by: Josh Hill
---
drivers/net/usb/qmi_wwan.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c
index 42565dd..0946808 100644
--- a/drivers/net/usb/qmi_wwan.c
+++ b/drivers/net/usb/qmi_wwan.
On Fri, May 25, 2018 at 10:16:24AM +0200, Michal Hocko wrote:
> On Fri 25-05-18 08:17:15, Dave Chinner wrote:
> > On Thu, May 24, 2018 at 01:43:41PM +0200, Michal Hocko wrote:
> [...]
> > > +FS/IO code then simply calls the appropriate save function right at the
> > > +layer where a lock taken from
Hi,
I have a few documentation comments below...
On 05/26/2018 02:19 PM, Marcus Folkesson wrote:
> Add documentation to give a brief description on how to use the
> CCID Gadget Device.
> This includes a description for all attributes followed by an example on
> how to setup the device with Config
On Fri, May 25, 2018 at 02:51:06PM +0200, Benjamin Tissoires wrote:
> When we receive a RMI4 report, we should not unconditionally send an
> input_sync event. Instead, we should let the rmi4 transport layer do it
> for us.
>
> This fixes a situation where we might receive X in a report and the res
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