On Saturday, July 14, 2018 12:20:43 AM CEST Prakash, Prashanth wrote:
> Hi George,
>
> This version looks good. Thanks!
>
> On 7/12/2018 12:07 AM, George Cherian wrote:
> > Per Section 8.4.7.1.3 of ACPI 6.2, The platform provides performance
> > feedback via set of performance counters. To determ
On Wednesday, July 18, 2018 6:44:22 AM CEST Viresh Kumar wrote:
> On 17-07-18, 22:48, Niklas Cassel wrote:
> > If of_nvmem_cell_get() fails due to probe deferal, we shouldn't print an
> > error message. Just be silent in this case.
> >
> > Signed-off-by: Niklas Cassel
> > ---
> > drivers/cpufreq
Hi Stephen and Mike,
On 17.7.2018 21:59, Jolly Shah wrote:
> From: Jolly Shah
>
> This patch adds CCF compliant clock driver for ZynqMP.
> Clock driver queries supported clock information from
> firmware and regiters pll and output clocks with CCF.
>
> Signed-off-by: Rajan Vaja
> Signed-off-by
[CC Andrew]
On Thu 19-07-18 18:06:47, Jing Xia wrote:
> It was reported that a kernel crash happened in mem_cgroup_iter(),
> which can be triggered if the legacy cgroup-v1 non-hierarchical
> mode is used.
>
> Unable to handle kernel paging request at virtual address 6b6b6b6b6b6b8f
> ..
> Call
On 07.07.2018 10:15, syzbot wrote:
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit: 526674536360 Add linux-next specific files for 20180706
> git tree: linux-next
> console output: https://syzkaller.appspot.com/x/log.txt?x=1703690c40
> kernel config: https://syzkal
Hi,
On Tue, Jul 17, 2018 at 03:58:19PM -0700, Laura Abbott wrote:
> On 07/03/2018 05:14 AM, Mark Rutland wrote:
> > > It might be cleaner just to use on_accessible_stack and then another
> > > function to get the top of stack. This also might just be
> > > reimplementing what x86 already has? (Mar
On Thursday, July 19, 2018 12:12:55 PM CEST Rafael J. Wysocki wrote:
> On Wednesday, July 18, 2018 12:11:06 PM CEST Rafael J. Wysocki wrote:
> > On Wednesday, June 20, 2018 7:22:09 PM CEST Ulf Hansson wrote:
> > > To allow CPUs being power managed by PM domains, let's deploy support for
> > > runti
Hello Laura,
Thanks again for your work.
Please see some comments below.
On 19.07.2018 00:10, Laura Abbott wrote:
> Implementation of stackleak based heavily on the x86 version
>
> Signed-off-by: Laura Abbott
> ---
> Since last time: Minor style cleanups. Re-wrote check_alloca to
> correctly ha
Hi Alan,
On 17/07/2018 21:42, Alan Douglas wrote:
> Hi Gustavo,
>
> On 17 July 2018 11:26, Gustavo Pimentel wrote:
>> Add MSI-X support and update driver documentation accordingly.
>>
>> Add 2 new IOCTL commands:
>> - Allow to reconfigure driver IRQ type in runtime.
>> - Allow to retrieve curre
On Thu, Jul 12, 2018 at 10:37:40AM +0530, Keerthy wrote:
> Add an interface function to set up the rtc for a power_off
> mode.
>
> Signed-off-by: Keerthy
> ---
> drivers/rtc/interface.c | 12
> drivers/rtc/rtc-omap.c | 1 +
> include/linux/rtc.h | 2 ++
> 3 files changed, 15
On Thu, Jul 19, 2018 at 11:01:10AM +0100, Russell King - ARM Linux wrote:
> On Thu, Jul 19, 2018 at 11:42:50AM +0200, Dietmar Eggemann wrote:
> > Hi,
> >
> > running v4.18-rc5 (plus still missing "power: vexpress: fix corruption in
> > notifier registration", otherwise I get this rcu_sched stall i
On Tue, Jul 17, 2018 at 10:22:10PM -0400, Pavel Tatashin wrote:
> diff --git a/kernel/sched/clock.c b/kernel/sched/clock.c
> index 0e9dbb2d9aea..7a8a63b940ee 100644
> --- a/kernel/sched/clock.c
> +++ b/kernel/sched/clock.c
> @@ -202,7 +202,15 @@ static void __sched_clock_gtod_offset(void)
>
> v
On Wednesday, June 20, 2018 7:22:08 PM CEST Ulf Hansson wrote:
> CPU devices and other regular devices may share the same PM domain and may
> also be hierarchically related via subdomains. In either case, all devices
> including CPUs, may be attached to a PM domain managed by genpd, that has
> an i
On 17.7.2018 21:58, Jolly Shah wrote:
> This patchset is adding communication layer with firmware and clock driver
> who uses
> those APIs to communicate with PMU.
> Firmware driver provides an interface to firmware APIs.Interface APIs can be
> used by any driver to communicate to
> PMUFW(Platfo
On Wednesday, June 20, 2018 7:22:07 PM CEST Ulf Hansson wrote:
> As it's now perfectly possible that a PM domain managed by genpd contains
> devices belonging to CPUs, we should start to take into account the
> residency values for the idle states during the state selection process.
> The residency
On Thu, Jul 12, 2018 at 10:37:39AM +0530, Keerthy wrote:
> Use of_device_is_system_power_controller instead of manually reading
> the system-power-controller property from the device tree node.
>
> Signed-off-by: Keerthy
> ---
> drivers/rtc/rtc-omap.c | 3 +--
> 1 file changed, 1 insertion(+), 2
Hi Lorenzo,
On Wednesday 18 July 2018 04:32 PM, Lorenzo Pieralisi wrote:
> On Wed, Jun 27, 2018 at 05:59:17PM +0530, Vignesh R wrote:
>> Errata i870 is applicable in both EP and RC mode. Therefore rename
>> function dra7xx_pcie_ep_unaligned_memaccess(), that implements errata
>> workaround, to dra
On Tue, Jul 17, 2018 at 10:22:06PM -0400, Pavel Tatashin wrote:
> During boot tsc is calibrated twice: once in tsc_early_delay_calibrate(),
> and the second time in tsc_init().
>
> Rename tsc_early_delay_calibrate() to tsc_early_init(), and rework it so
> the calibration is done only early, and ma
Commit-ID: d9f4426c73002957be5dd39936f44a09498f7560
Gitweb: https://git.kernel.org/tip/d9f4426c73002957be5dd39936f44a09498f7560
Author: Jiang Biao
AuthorDate: Wed, 18 Jul 2018 08:03:14 +0800
Committer: Thomas Gleixner
CommitDate: Thu, 19 Jul 2018 12:31:00 +0200
x86/speculation: Remove
On Thu 19-07-18 09:22:47, Naoya Horiguchi wrote:
> On Thu, Jul 19, 2018 at 10:27:43AM +0200, Michal Hocko wrote:
> > On Thu 19-07-18 08:08:05, Naoya Horiguchi wrote:
> > > On Thu, Jul 19, 2018 at 09:15:16AM +0200, Michal Hocko wrote:
> > > > On Thu 19-07-18 06:19:45, Naoya Horiguchi wrote:
> > > >
On Wed, 18 Jul 2018, Jiang Biao wrote:
> pti_user_pagetable_walk_p4d() may return NULL, we should check the
> return value to avoid NULL pointer dereference. And add warning
> for fail allocation where NULL returned.
>
> Signed-off-by: Jiang Biao
> ---
> arch/x86/mm/pti.c | 10 --
> 1 f
On Thu, Jul 12, 2018 at 10:37:38AM +0530, Keerthy wrote:
> Prepare rtc driver for rtc-only with DDR in self-refresh mode.
> omap_rtc_power_off now should cater to two features:
>
> 1) RTC plus DDR in self-refresh is power a saving mode where in the
> entire system including the different voltage r
On Wednesday, June 20, 2018 7:22:04 PM CEST Ulf Hansson wrote:
> To enable a device belonging to a CPU to be attached to a PM domain managed
> by genpd, let's do a few changes to genpd as to make it convenient to
> manage the specifics around CPUs.
>
> First, as to be able to quickly find out what
On Wednesday, June 20, 2018 7:22:05 PM CEST Ulf Hansson wrote:
> Introduce two new genpd helper functions, of_genpd_attach|detach_cpu(),
> which takes the CPU-number as an in-parameter.
>
> To attach a CPU to a genpd, of_genpd_attach_cpu() starts by fetching the
> struct device belonging to the CP
On 07/19/2018 09:20 AM, David Woodhouse wrote:
> On Thu, 2018-07-19 at 08:45 +0200, Christian Borntraeger wrote:
>>
>>> My thought would be something like this:
>>>
>>> if (context_tracking_cpu_is_enabled())
>>> rcu_kvm_enter();
>>> else
>>> rcu_virt
On Thu, Jul 12, 2018 at 10:37:37AM +0530, Keerthy wrote:
> Cut down the shutdown time from 2 seconds to 1 sec. In case of roll
> over try again.
>
> Signed-off-by: Keerthy
> @@ -435,17 +435,23 @@ static void omap_rtc_power_off(void)
> + /* set alarm one second from now */
> omap_rtc_r
On Wed, Jul 18, 2018 at 04:19:10PM -0700, Dave Hansen wrote:
> On 07/17/2018 04:20 AM, Kirill A. Shutemov wrote:
> > mktme_nr_keyids holds number of KeyIDs available for MKTME, excluding
> > KeyID zero which used by TME. MKTME KeyIDs start from 1.
> >
> > mktme_keyid_shift holds shift of KeyID wit
On Wednesday, June 20, 2018 7:22:06 PM CEST Ulf Hansson wrote:
> From: Lina Iyer
>
> Knowing the sleep duration of CPUs, is known to be needed while selecting
> the most energy efficient idle state for a CPU or a group of CPUs.
>
> However, to be able to compute the sleep duration, we need to kn
On Wednesday, July 18, 2018 12:11:06 PM CEST Rafael J. Wysocki wrote:
> On Wednesday, June 20, 2018 7:22:09 PM CEST Ulf Hansson wrote:
> > To allow CPUs being power managed by PM domains, let's deploy support for
> > runtime PM for the CPU's corresponding struct device.
> >
> > More precisely, at
Hi Boris:
see my comments, thanks for the quick response
On 07/19/18 17:57, Boris Brezillon wrote:
> On Thu, 19 Jul 2018 17:46:11 +0800
> Yixun Lan wrote:
>
>> From: Liang Yang
>>
>> Add Amlogic NAND controller dt-bindings for Meson SoC,
>> Current this driver support GXBB/GXL/AXG platform.
>>
It was reported that a kernel crash happened in mem_cgroup_iter(),
which can be triggered if the legacy cgroup-v1 non-hierarchical
mode is used.
Unable to handle kernel paging request at virtual address 6b6b6b6b6b6b8f
..
Call trace:
mem_cgroup_iter+0x2e0/0x6d4
shrink_zone+0x8c/0x324
bala
This patch adds platform specific structures, so that we can add
different IP support later using quirks.
Signed-off-by: Manish Narani
---
drivers/edac/synopsys_edac.c | 70
1 file changed, 58 insertions(+), 12 deletions(-)
diff --git a/drivers/edac/
This patch adds EDAC ECC support for ZynqMP DDRC IP. The patch also adds
support for ECC Error Injection in ZynqMP. The corrected and uncorrected
error interrupts support is added in this patch. The Row, Column, Bank,
Bank Group and Rank bits positions are determined via Address Map
registers of Sy
This patch adds ddrc memory controller node in dts. The size mentioned
in dts is 0x3, because we need to access DDR_QOS INTR registers
located at fd090208 from this driver.
Signed-off-by: Manish Narani
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++
1 file changed, 7 insertions(+)
d
This patch series enhances the current EDAC driver to support different
platforms.This series adds support for ZynqMP DDRC controller in synopsys
EDAC driver. This series also adds Device tree properties and relevant
binding documentation.
Manish Narani (4):
edac: synps: Add platform specific st
This patch documents Synopsys EDAC driver which reports the single bit
errors that are corrected and the double bit errors that are detected.
Signed-off-by: Manish Narani
---
.../bindings/memory-controllers/synopsys.txt | 25 ++
1 file changed, 21 insertions(+), 4 delet
On Thu, Jul 12, 2018 at 10:37:37AM +0530, Keerthy wrote:
> Cut down the shutdown time from 2 seconds to 1 sec. In case of roll
> over try again.
>
> Signed-off-by: Keerthy
> ---
>
> Changes in v4:
>
> * Fixed a compilation issue.
> * Extended the roll over check post interrupt programming.
On Thu, Jul 19, 2018 at 11:42:50AM +0200, Dietmar Eggemann wrote:
> Hi,
>
> running v4.18-rc5 (plus still missing "power: vexpress: fix corruption in
> notifier registration", otherwise I get this rcu_sched stall issue) on TC2
> (A7 boot) with vanilla multi_v7_defconfig plus
> CONFIG_ARM_BIG_LITTL
On Thu, 19 Jul 2018 17:46:11 +0800
Yixun Lan wrote:
> From: Liang Yang
>
> Add Amlogic NAND controller dt-bindings for Meson SoC,
> Current this driver support GXBB/GXL/AXG platform.
>
> Signed-off-by: Liang Yang
> Signed-off-by: Yixun Lan
> ---
> .../bindings/mtd/amlogic,meson-nand.txt
Hi Viresh,
On 2018/7/19 3:40, Viresh Kumar wrote:
> On 18-07-18, 16:34, Wei Xu wrote:
>> Hi Viresh,
>>
>> On 2018/7/5 6:09, Viresh Kumar wrote:
>>> Hi,
>>>
>>> This is an attempt to fix the broken or partially defined DT bindings
>>> for cooling-maps. We should list every device that participates
HI Boris
On 07/19/18 16:39, Boris Brezillon wrote:
> Hi Yixun,
>
> On Thu, 19 Jul 2018 16:13:47 +0800
> Yixun Lan wrote:
>
> You're doing DMA on those buffers, and devm_kzalloc() is not
> DMA-friendly (returned buffers are not aligned on a cache line). Also,
> you don't have to a
On Wed, Jul 18, 2018 at 04:13:20PM -0700, Dave Hansen wrote:
> On 07/17/2018 04:20 AM, Kirill A. Shutemov wrote:
> > + } else {
> > + /*
> > +* Reset __PHYSICAL_MASK.
> > +* Maybe needed if there's inconsistent configuation
> > +* between CPUs.
> > +
Hi Krzysztof,
On 18 July 2018 at 15:36, Krzysztof Kozlowski wrote:
> On 18 July 2018 at 11:24, Anand Moon wrote:
>> Hi Krzysztof
>>
>> On 18 July 2018 at 11:47, Krzysztof Kozlowski wrote:
>>> On 17 July 2018 at 22:23, Anand Moon wrote:
Hi Krzysztof
On 17 July 2018 at 17:50, Krzy
These two patches try to add initial NAND driver support for Amlogic Meson
SoCs, current it has been tested on GXL(p212) and AXG(s400) platform.
Note this patch series actually depend on the eMMC clkc patch[2] which
still not merged.
Changes since v1 at [1]:
- adopt property amlogic,nand-e
From: Liang Yang
Add Amlogic NAND controller dt-bindings for Meson SoC,
Current this driver support GXBB/GXL/AXG platform.
Signed-off-by: Liang Yang
Signed-off-by: Yixun Lan
---
.../bindings/mtd/amlogic,meson-nand.txt | 95 +++
1 file changed, 95 insertions(+)
create mo
Add initial support for the Amlogic NAND flash controller which found
in the Meson-GXBB/GXL/AXG SoCs.
Signed-off-by: Liang Yang
Signed-off-by: Yixun Lan
---
drivers/mtd/nand/raw/Kconfig | 10 +
drivers/mtd/nand/raw/Makefile |1 +
drivers/mtd/nand/raw/meson_nand.c | 1333 +
Hi,
running v4.18-rc5 (plus still missing "power: vexpress: fix corruption
in notifier registration", otherwise I get this rcu_sched stall issue)
on TC2 (A7 boot) with vanilla multi_v7_defconfig plus
CONFIG_ARM_BIG_LITTLE_CPUIDLE=y gives me continuous:
...
CPUX: Spectre v2: incorrect contex
On Wed, Jul 18, 2018 at 9:32 PM Srinivas Pandruvada
wrote:
>
> On Mehlow Xeon-E workstation, ISH PCI device is enabled but without ISH
> firmware. Here the ISH device PCI device id was reused for some non Linux
> storage drivers. So this was not done for enabling ISH. But this has a
> undesirable
On Tue, Jul 17, 2018 at 01:56:57PM -0700, Todd Poynor wrote:
> From: Todd Poynor
>
> For sparse checking.
Close, but you can do better :)
>
> Reported-by: Dmitry Torokhov
> Signed-off-by: Zhongze Hu
> Signed-off-by: Todd Poynor
> Reviewed-by: Dmitry Torokhov
> ---
> drivers/staging/gasket
On 7/19/2018 4:57 PM, Paolo Bonzini wrote:
> On 19/07/2018 10:39, Tianyu Lan wrote:
>> Hyper-V provides a para-virtualization hypercall
>> HvFlushGuestPhysicalAddressSpace
>> to flush nested VM address space mapping in l1 hypervisor and it's to reduce
>> overhead
>> of flushing ept tlb among vcpu
Hi all,
Changes since 20180718:
New tree: v9fs
The net-next tree gained a conflict against the net tree.
The mfd tree gained a conflict against the drm tree.
The akpm tree lost several patches that turned up elsewhere (mostly in
the new v9fs tree).
Non-merge commits (relative to Linus' tree):
On Tue, Jul 17, 2018 at 01:56:56PM -0700, Todd Poynor wrote:
> From: Todd Poynor
>
> Always allow root to open device for writing.
>
> Drop special-casing of ioctl permissions for root vs. owner.
>
> Reported-by: Dmitry Torokhov
> Signed-off-by: Zhongze Hu
> Signed-off-by: Todd Poynor
> ---
Hi Neil,
On Thu, Jul 19, 2018 at 10:59:47AM +0200, Neil Armstrong wrote:
> Hi Ludovic,
>
> On 19/07/2018 10:47, Ludovic Desroches wrote:
> > Hi,
> >
> > This patchset adds support for the ISO7816 standard. The USART devices in
> > Microchip SoCs have an ISO7816 mode. It allows to let the USART m
On Wed, Jul 18, 2018 at 02:03:18PM +0200, Peter Zijlstra wrote:
> Leaving us just 5 bytes short of needing a single cacheline :/
>
> struct ponies {
> unsigned int tasks[3];
>/* 012 */
> unsigned int
On Mon, Jul 16, 2018 at 07:08:55PM -0700, Todd Poynor wrote:
> From: Todd Poynor
>
> The gasket and apex drivers are to be used on other architectures
> besides X86.
>
> Signed-off-by: Todd Poynor
> ---
> drivers/staging/gasket/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
On Thu, Jul 19, 2018 at 10:27:43AM +0200, Michal Hocko wrote:
> On Thu 19-07-18 08:08:05, Naoya Horiguchi wrote:
> > On Thu, Jul 19, 2018 at 09:15:16AM +0200, Michal Hocko wrote:
> > > On Thu 19-07-18 06:19:45, Naoya Horiguchi wrote:
> > > > On Wed, Jul 18, 2018 at 10:50:32AM +0200, Michal Hocko wr
On Thu, 2018-07-19 at 15:18 +0900, Keiji Hayashibara wrote:
> From: Kunihiko Hayashi
>
> Add reset control for SPI controller on UniPhier SoCs.
>
> Signed-off-by: Kunihiko Hayashi
Thank you, applied to reset/next.
regards
Philipp
Hi Peter,
On 18-07-18, 13:06, Peter Ujfalusi wrote:
> >> +struct dma_async_tx_descriptor;
> >> +
> >> +struct dma_descriptor_metadata_ops {
> >> + int (*attach)(struct dma_async_tx_descriptor *desc, void *data,
> >> +size_t len);
> >
> > How does one detach?
>
> I have not thou
From: Lina Iyer
In addition to requests that are send to the remote processor, the
controller may allow certain data to be written to the controller for
use in specific cases like wakeup value when entering idle states.
Allow a pass through to write PDC data.
Signed-off-by: Lina Iyer
Signed-off
From: "Raju P.L.S.S.S.N"
For RSCs that have sleep & wake TCS but no dedicated active TCS, wake
TCS can be re-purposed to send active requests. Once the active requests
are sent and response is received, the active mode configuration needs
to be cleared so that controller can use wake TCS for send
From: Lina Iyer
The Power Domain Controller can be programmed to wakeup the RSC and
setup the resources back in the active state, before the processor is
woken up by a timer interrupt. The wakeup value from the timer hardware
can be copied to the PDC which has its own timer and is in an always-on
From: Lina Iyer
Controllers may be in 'solver' state, where they could be in autonomous
mode executing low power modes for their hardware and as such are not
available for sending active votes. Device driver may notify RPMH API
that the controller is in solver mode and when in such mode, disallow
From: "Raju P.L.S.S.S.N"
This set of patches add additional functionality to RPMH drivers[1].
PM drivers can choose to disallow idle modes when RSC controller is busy sending
or processing requests. The patches add necesary functions to query the
controller status.
The controllers may be in 's
From: Lina Iyer
Allow the controller state be read by platform drivers. This is useful
for PM drivers which can choose to disallow idle modes when the
controller is busy.
Signed-off-by: Lina Iyer
Signed-off-by: Raju P.L.S.S.S.N
---
drivers/soc/qcom/rpmh.c | 13 +
include/soc/qcom/
From: Lina Iyer
Allow the controller status be queried. The controller is busy if it is
actively processing request.
Signed-off-by: Lina Iyer
Signed-off-by: Raju P.L.S.S.S.N
---
drivers/soc/qcom/rpmh-internal.h | 1 +
drivers/soc/qcom/rpmh-rsc.c | 21 +
2 files chang
On Wed, Jul 18, 2018 at 02:51:45PM -0400, Rik van Riel wrote:
> > Ah, ok. I wasn't entirely sure the new lazy was purely for the idle
> > case. But yes, the KVM paravirt thing should get the idle case right.
> >
> Not just idle, but also running in kernel threads like ksoftirqd,
> kworker, kswapd
On Thu, 19 Jul 2018 08:42:14 +0200,
Takashi Iwai wrote:
>
> On Thu, 19 Jul 2018 08:08:06 +0200,
> Zhang, Jun wrote:
> >
> > Hello, Takashi
> >
> > I think use our patch, it's NOT possible that the returned size is over
> > sgbuf->tblsize.
> >
> > In function snd_malloc_sgbuf_pages,
> >
> > P
On Wed, Jul 18, 2018 at 11:48:19PM +0800, joeyli wrote:
> On Fri, Jul 13, 2018 at 03:34:25PM +0800, Yu Chen wrote:
> > Hi,
> > On Thu, Jul 12, 2018 at 06:10:37PM +0800, joeyli wrote:
> > > Hi Yu Chen,
> > >
> > > Sorry for my delay...
> > >
> > > On Fri, Jul 06, 2018 at 11:28:56PM +0800, Yu Chen
Add REGMAP_MMIO as dependency to avoid undefined
reference to regmap symbols.
Fixes: d85d20053e19 ("clk: actions: Add S900 SoC clock support")
Signed-off-by: Saravanan Sekar
Reviewed-by: Andreas Färber
Reviewed-by: Manivannan Sadhasivam
---
drivers/clk/actions/Kconfig | 1 +
1 file changed, 1
Add Actions Semi S700 SoC clock support
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan Sekar
Reviewed-by: Manivannan Sadhasivam
---
drivers/clk/actions/Kconfig| 6 +
drivers/clk/actions/Makefile | 1 +
drivers/clk/actions/owl-s700.c | 606 ++
Add Clock Management Unit for Actions Semi S700 SoC.
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan Sekar
---
arch/arm64/boot/dts/actions/s700.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s700.dtsi
b/arch/arm64/boot/dts/act
Add clock bindings constants for action S700
Maintain common clock dt-bindings for Actions Semi SoC's
S700 and S900.
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan Sekar
Reviewed-by: Rob Herring
---
.../{actions,s900-cmu.txt => actions,owl-cmu.txt} | 20 ++--
include/dt-bindin
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan Sekar
Reviewed-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s700-cubieboard7.dts | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
b/arch/arm64/b
This patchset adds clock support for Actions Semi Owl series S700 SoC
with relevant clock bindings and device tree info.
Changed the UART clock using CMU instance and changes are tested in
cubieboard7
Changelog v7:
- Moved cmu (clock controller) dts entry under soc node and
positioned based on a
From: Kunihiko Hayashi
Add pin-mux settings for spi controller.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
Changes since v1:
- Fix build error of "pinctrl-uniphier-sld8.c".
drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 10 ++
drivers/pinctrl/uniphier/
On 18/07/18 18:43, Manivannan Sadhasivam wrote:
> Hi Matthias,
>
> On Wed, Jul 18, 2018 at 05:07:38PM +0200, Matthias Brugger wrote:
>>
>>
>> On 17/07/18 16:04, Manivannan Sadhasivam wrote:
>>> Hi Matthias,
>>>
>>> On Mon, Jul 16, 2018 at 03:24:44PM +0200, Matthias Brugger wrote:
Hi Maniva
Hi,
Sorry.
I will fix this and send v2 patch.
Thank you.
Best Regards,
Keiji Hayashibara
> -Original Message-
> From: kbuild test robot [mailto:l...@intel.com]
> Sent: Thursday, July 19, 2018 5:02 PM
> To: Hayashibara, Keiji/林原 啓二
> Cc: kbuild-...@01.org; linus.wall...@linaro.org; Yama
On Wed, Jul 18, 2018 at 04:11:57PM -0700, Dave Hansen wrote:
> On 07/17/2018 04:20 AM, Kirill A. Shutemov wrote:
> > khugepaged allocates page in advance, before we found a VMA for
> > collapse. We don't yet know which KeyID to use for the allocation.
>
> That's not really true. We have the VMA a
Hi Ludovic,
On 19/07/2018 10:47, Ludovic Desroches wrote:
> Hi,
>
> This patchset adds support for the ISO7816 standard. The USART devices in
> Microchip SoCs have an ISO7816 mode. It allows to let the USART managing
> the CLK and I/O signals of a smart card.
Wow, I would have loved to have this
On Thu, 2018-07-19 at 10:44 +0200, Neil Armstrong wrote:
> We could even add ranges instead of table when we know the PLL supports a
> well-known continuous dividers range.
I was thinking about this too.
I did not went for it because it would mean yet another rework of the pll
driver, which I did
On Thu 19-07-18 16:17:26, Chengguang Xu wrote:
> When we try to truncate read count in generic_file_buffered_read(),
> should deliver (sb->s_maxbytes - offset) as maximum count not
> sb->s_maxbytes itself.
>
> Signed-off-by: Chengguang Xu
Looks good to me. You can add:
Reviewed-by: Jan Kara
B
On 19/07/2018 10:39, Tianyu Lan wrote:
> Hyper-V provides a para-virtualization hypercall
> HvFlushGuestPhysicalAddressSpace
> to flush nested VM address space mapping in l1 hypervisor and it's to reduce
> overhead
> of flushing ept tlb among vcpus. The tradition way is to send IPIs to all
> aff
Dear Thomas,
On 07/18/18 22:05, Paul Menzel wrote:
> Am 18.07.2018 um 21:00 schrieb Thomas Gleixner:
>
>> On Wed, 18 Jul 2018, Paul Menzel wrote:
>>> On 07/18/18 17:39, Thomas Gleixner wrote:
Bah. Could you please enable GENERIC_IRQ_DEBUGFS and after a successful
boot up provide me th
It seems contributors follow the style of Kconfig entries where explicit
'default n' is present. The default 'default' is 'n' already, thus, drop
these lines from Kconfig to make it more clear.
Cc: Coly Li
Signed-off-by: Andy Shevchenko
---
lib/Kconfig | 1 -
lib/Kconfig.debug | 17 -
From: Nicolas Ferre
Add the ISO7816 ioctl and associated accessors and data structure.
Drivers can then use this common implementation to handle ISO7816.
Signed-off-by: Nicolas Ferre
Signed-off-by: Ludovic Desroches
---
arch/alpha/include/uapi/asm/ioctls.h | 2 ++
arch/mips/include/uapi/as
Hi,
This patchset adds support for the ISO7816 standard. The USART devices in
Microchip SoCs have an ISO7816 mode. It allows to let the USART managing
the CLK and I/O signals of a smart card.
Changes:
- v2
- uart_get_iso7816_config: check there is an iso7816_config function
- use IOCTL macros
From: Nicolas Ferre
When mode is set in atmel_config_iso7816() we backup last RS232 mode
for coming back to this mode if requested.
Also allow setup of T=0 and T=1 parameter and basic support in set_termios
function as well.
Report NACK and ITER errors in irq handler.
Signed-off-by: Nicolas Ferr
On Thu, Jul 19, 2018 at 10:09 AM, David Howells wrote:
> Miklos Szeredi wrote:
>
>> Stacking file operations in overlay will store an extra open file for each
>> overlay file opened.
>>
>> The overhead is just that of "struct file" which is about 256bytes, because
>> overlay already pins an extra
On Thu, Jul 19, 2018 at 3:46 AM, Xiongfeng Wang
wrote:
> Hi,
>
> On 2018/7/19 1:17, Milan Broz wrote:
>> On 18/07/18 18:46, Mark Brown wrote:
>>> On Wed, Jul 18, 2018 at 10:16:05AM +0200, Milan Broz wrote:
>>>
So we are here again and moving INTERNAL dm-crypt functionality into
cryptoapi
In this patch, locking related code is shared between huge/normal code
path in put_swap_page() to reduce code duplication. And `free_entries
== 0` case is merged into more general `free_entries !=
SWAPFILE_CLUSTER` case, because the new locking method makes it easy.
The added lines is same as the
This patchset is based on 2018-07-13 head of mmotm tree.
Now the THP (Transparent Huge Page) swap optimizing is implemented in
the way like below,
#ifdef CONFIG_THP_SWAP
huge_function(...)
{
}
#else
normal_function(...)
{
}
#endif
general_function(...)
{
if (huge)
return
In swap_page_trans_huge_swapped(), to identify whether there's any
page table mapping for a 4k sized swap entry, "si->swap_map[i] !=
SWAP_HAS_CACHE" is used. This works correctly now, because all users
of the function will only call it after checking SWAP_HAS_CACHE. But
as pointed out by Daniel,
To improve the code readability.
Signed-off-by: "Huang, Ying"
Suggested-by: Dave Hansen
Reviewed-by: Daniel Jordan
Cc: Michal Hocko
Cc: Johannes Weiner
Cc: Shaohua Li
Cc: Hugh Dickins
Cc: Minchan Kim
Cc: Rik van Riel
Cc: Dan Williams
---
mm/swapfile.c | 6 ++
1 file changed, 6 inser
In this patch, the normal/huge code path in put_swap_page() and
several helper functions are unified to avoid duplicated code, bugs,
etc. and make it easier to review the code.
The removed lines are more than added lines. And the binary size is
kept exactly same when CONFIG_TRANSPARENT_HUGEPAGE=n
As suggested by Dave, we should unify the code path for normal and
huge swap support if possible to avoid duplicated code, bugs, etc. and
make it easier to review code.
In this patch, the normal/huge code path in swap_page_trans_huge_swapped()
is unified, the added and removed lines are same. And
The part of __swap_entry_free() with lock held is separated into a new
function __swap_entry_free_locked(). Because we want to reuse that
piece of code in some other places.
Just mechanical code refactoring, there is no any functional change in
this function.
Signed-off-by: "Huang, Ying"
Review
In mm/swapfile.c, THP (Transparent Huge Page) swap specific code is
enclosed by #ifdef CONFIG_THP_SWAP/#endif to avoid code dilating when
THP isn't enabled. But #ifdef/#endif in .c file hurt the code
readability, so Dave suggested to use IS_ENABLED(CONFIG_THP_SWAP)
instead and let compiler to do t
As suggested by Matthew Wilcox, it is better to use "int entry_size"
instead of "bool cluster" as parameter to specify whether to operate
for huge or normal swap entries. Because this improve the flexibility
to support other swap entry size. And Dave Hansen thinks that this
improves code readabil
On Thu, 2018-07-19 at 10:42 +0200, Neil Armstrong wrote:
> > +static struct clk_regmap gxl_hdmi_pll_od = {
> > + .data = &(struct clk_regmap_div_data){
> > + .offset = HHI_HDMI_PLL_CNTL + 8,
> > + .shift = 16,
> > + .width = 2,
> > + .flags = CLK_
On Wed, Jul 18, 2018 at 03:36:20PM +0200, Vlastimil Babka wrote:
> Kmalloc cache names can get quite long for large object sizes, when the sizes
> are expressed in bytes. Use 'k' and 'M' prefixes to make the names as short
> as possible e.g. in /proc/slabinfo. This works, as we mostly use power-of-
601 - 700 of 762 matches
Mail list logo
