Hi,
On 07/11/2018 01:34 AM, Evan Green wrote:
> On Mon, Jul 9, 2018 at 8:51 AM Georgi Djakov wrote:
>>
>> Add documentation for the interconnect consumer bindings, that will allow
>> to link a device node (consumer) to its interconnect controller hardware.
>>
>> Tha aim is to enable drivers to
Hi,
On 07/11/2018 01:34 AM, Evan Green wrote:
> On Mon, Jul 9, 2018 at 8:51 AM Georgi Djakov wrote:
>>
>> Add documentation for the interconnect consumer bindings, that will allow
>> to link a device node (consumer) to its interconnect controller hardware.
>>
>> Tha aim is to enable drivers to
Hi Alexandre,
On 07/11/2018 06:42 PM, Alexandre Bailon wrote:
> On 07/09/2018 05:51 PM, Georgi Djakov wrote:
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms.
>>
>> Signed-off-by: Georgi Djakov
>> ---
>> drivers/interconnect/Kconfig| 5 +
>>
Hi Alexandre,
On 07/11/2018 06:42 PM, Alexandre Bailon wrote:
> On 07/09/2018 05:51 PM, Georgi Djakov wrote:
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms.
>>
>> Signed-off-by: Georgi Djakov
>> ---
>> drivers/interconnect/Kconfig| 5 +
>>
Hi,
On 07/11/2018 01:34 AM, Evan Green wrote:
> On Mon, Jul 9, 2018 at 8:51 AM Georgi Djakov wrote:
>>
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms.
>>
>> Signed-off-by: Georgi Djakov
>> ---
>> drivers/interconnect/Kconfig| 5 +
>>
Hi,
On 07/11/2018 01:34 AM, Evan Green wrote:
> On Mon, Jul 9, 2018 at 8:51 AM Georgi Djakov wrote:
>>
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms.
>>
>> Signed-off-by: Georgi Djakov
>> ---
>> drivers/interconnect/Kconfig| 5 +
>>
On Thu, Jul 12, 2018 at 06:36:00PM +0300, Stefan Popa wrote:
> This patch adds support for the adxl372 FIFO. In order to accomplish this,
> triggered buffers were used.
>
> The number of FIFO samples which trigger the watermark interrupt can be
> configured by using the buffer watermark, while
On Thu, Jul 12, 2018 at 06:36:00PM +0300, Stefan Popa wrote:
> This patch adds support for the adxl372 FIFO. In order to accomplish this,
> triggered buffers were used.
>
> The number of FIFO samples which trigger the watermark interrupt can be
> configured by using the buffer watermark, while
Hi Matthias,
On 07/10/2018 02:56 AM, Matthias Kaehlcke wrote:
> Hi,
>
> On Mon, Jul 09, 2018 at 06:51:02PM +0300, Georgi Djakov wrote:
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms.
>>
>> Signed-off-by: Georgi Djakov
>> ---
>>
Hi Matthias,
On 07/10/2018 02:56 AM, Matthias Kaehlcke wrote:
> Hi,
>
> On Mon, Jul 09, 2018 at 06:51:02PM +0300, Georgi Djakov wrote:
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms.
>>
>> Signed-off-by: Georgi Djakov
>> ---
>>
On Thu, Jul 12, 2018 at 06:34:57PM +0300, Stefan Popa wrote:
> Add the device tree binding documentation for the ADXL372 3-axis digital
> accelerometer.
>
> Signed-off-by: Stefan Popa
> ---
> Documentation/devicetree/bindings/iio/accel/adxl372.txt | 16
> MAINTAINERS
On Thu, Jul 12, 2018 at 06:34:57PM +0300, Stefan Popa wrote:
> Add the device tree binding documentation for the ADXL372 3-axis digital
> accelerometer.
>
> Signed-off-by: Stefan Popa
> ---
> Documentation/devicetree/bindings/iio/accel/adxl372.txt | 16
> MAINTAINERS
Em Fri, Jul 20, 2018 at 12:17:40PM +0200, Jiri Olsa escreveu:
> On Fri, Jul 20, 2018 at 10:20:55AM +0900, Namhyung Kim wrote:
> > Hi Arnaldo,
> >
> > On Thu, Jul 19, 2018 at 03:31:14PM -0300, Arnaldo Carvalho de Melo wrote:
> > > Em Thu, Jul 19, 2018 at 03:28:43PM -0300, Arnaldo Carvalho de Melo
Em Fri, Jul 20, 2018 at 12:17:40PM +0200, Jiri Olsa escreveu:
> On Fri, Jul 20, 2018 at 10:20:55AM +0900, Namhyung Kim wrote:
> > Hi Arnaldo,
> >
> > On Thu, Jul 19, 2018 at 03:31:14PM -0300, Arnaldo Carvalho de Melo wrote:
> > > Em Thu, Jul 19, 2018 at 03:28:43PM -0300, Arnaldo Carvalho de Melo
Hi Evan,
On 07/11/2018 01:34 AM, Evan Green wrote:
> On Mon, Jul 9, 2018 at 8:51 AM Georgi Djakov wrote:
>>
>> On some Qualcomm SoCs, there is a remote processor, which controls some of
>> the Network-On-Chip interconnect resources. Other CPUs express their needs
>> by communicating with this
Hi Evan,
On 07/11/2018 01:34 AM, Evan Green wrote:
> On Mon, Jul 9, 2018 at 8:51 AM Georgi Djakov wrote:
>>
>> On some Qualcomm SoCs, there is a remote processor, which controls some of
>> the Network-On-Chip interconnect resources. Other CPUs express their needs
>> by communicating with this
Hi Greg,
On 15.07.18 г. 15:15, Greg KH wrote:
> On Mon, Jul 09, 2018 at 06:50:59PM +0300, Georgi Djakov wrote:
>> +static int __init icc_debugfs_init(void)
>> +{
>> +struct dentry *file;
>> +
>> +icc_debugfs_dir = debugfs_create_dir("interconnect", NULL);
>> +if (!icc_debugfs_dir) {
Hi Greg,
On 15.07.18 г. 15:15, Greg KH wrote:
> On Mon, Jul 09, 2018 at 06:50:59PM +0300, Georgi Djakov wrote:
>> +static int __init icc_debugfs_init(void)
>> +{
>> +struct dentry *file;
>> +
>> +icc_debugfs_dir = debugfs_create_dir("interconnect", NULL);
>> +if (!icc_debugfs_dir) {
Hi Alexandre,
On 07/11/2018 07:21 PM, Alexandre Bailon wrote:
> On 07/09/2018 05:50 PM, Georgi Djakov wrote:
>> This patch introduces a new API to get requirements and configure the
>> interconnect buses across the entire chipset to fit with the current
>> demand.
>>
>> The API is using a
Hi Alexandre,
On 07/11/2018 07:21 PM, Alexandre Bailon wrote:
> On 07/09/2018 05:50 PM, Georgi Djakov wrote:
>> This patch introduces a new API to get requirements and configure the
>> interconnect buses across the entire chipset to fit with the current
>> demand.
>>
>> The API is using a
From: Marcel Ziswiler
Dynamic debug is really helpful.
Signed-off-by: Marcel Ziswiler
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 4a47a9de6a5e..beacb02c734b
From: Marcel Ziswiler
Dynamic debug is really helpful.
Signed-off-by: Marcel Ziswiler
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 4a47a9de6a5e..beacb02c734b
Hi Evan,
Thanks for helping to improve this!
On 07/11/2018 01:34 AM, Evan Green wrote:
> Ahoy Georgi!
> On Mon, Jul 9, 2018 at 8:51 AM Georgi Djakov wrote:
>>
>> This patch introduces a new API to get requirements and configure the
>> interconnect buses across the entire chipset to fit with the
From: Marcel Ziswiler
Now with everything being merged actually enable it. Also enable
MTD_OF_PARTS, MTD_BLOCK, MTD_NAND, MTD_UBI and UBIFS without which
the former would not make much sense and is also in-line with
multi_v7_defconfig.
Signed-off-by: Marcel Ziswiler
---
Hi Evan,
Thanks for helping to improve this!
On 07/11/2018 01:34 AM, Evan Green wrote:
> Ahoy Georgi!
> On Mon, Jul 9, 2018 at 8:51 AM Georgi Djakov wrote:
>>
>> This patch introduces a new API to get requirements and configure the
>> interconnect buses across the entire chipset to fit with the
From: Marcel Ziswiler
Now with everything being merged actually enable it. Also enable
MTD_OF_PARTS, MTD_BLOCK, MTD_NAND, MTD_UBI and UBIFS without which
the former would not make much sense and is also in-line with
multi_v7_defconfig.
Signed-off-by: Marcel Ziswiler
---
From: Marcel Ziswiler
The order of some kernel configurations changed.
Signed-off-by: Marcel Ziswiler
---
arch/arm/configs/multi_v7_defconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
From: Marcel Ziswiler
Now with everything being merged actually enable it.
Signed-off-by: Marcel Ziswiler
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index
From: Marcel Ziswiler
The order of some kernel configurations changed.
Signed-off-by: Marcel Ziswiler
---
arch/arm/configs/multi_v7_defconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
From: Marcel Ziswiler
Now with everything being merged actually enable it.
Signed-off-by: Marcel Ziswiler
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index
From: Marcel Ziswiler
Dynamic debug is really helpful.
Signed-off-by: Marcel Ziswiler
---
arch/arm/configs/tegra_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index c7b99ebf5fcf..24e297659b55 100644
---
From: Marcel Ziswiler
Dynamic debug is really helpful.
Signed-off-by: Marcel Ziswiler
---
arch/arm/configs/tegra_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index c7b99ebf5fcf..24e297659b55 100644
---
From: Marcel Ziswiler
Dynamic debug is really helpful.
Signed-off-by: Marcel Ziswiler
---
arch/arm/configs/multi_v5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v5_defconfig
b/arch/arm/configs/multi_v5_defconfig
index 318b76fa26d1..b302ac68d587
From: Marcel Ziswiler
Dynamic debug is really helpful.
Signed-off-by: Marcel Ziswiler
---
arch/arm/configs/multi_v5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v5_defconfig
b/arch/arm/configs/multi_v5_defconfig
index 318b76fa26d1..b302ac68d587
On 2018-07-20 10:11, Mircea Caprioru wrote:
> This patch adds basic support for Analog Device ADGS1408/09 SPI mux
> controller.
>
> The device is probed and set to a disabled state. It uses the new mux
> controller framework.
>
> Signed-off-by: Mircea Caprioru
> ---
> Changelog V3 -> V4
> -
On 2018-07-20 10:11, Mircea Caprioru wrote:
> This patch adds basic support for Analog Device ADGS1408/09 SPI mux
> controller.
>
> The device is probed and set to a disabled state. It uses the new mux
> controller framework.
>
> Signed-off-by: Mircea Caprioru
> ---
> Changelog V3 -> V4
> -
On Sun, 2018-07-01 at 18:01 +0200, Greg Kroah-Hartman wrote:
> 4.4-stable review patch. If anyone has any objections, please let me know.
>
> --
>
> From: Dan Carpenter
>
> commit 18c9a99bce2a57dfd7e881658703b5d7469cc7b9 upstream.
>
> We read from the cdb[] buffer in
On Sun, 2018-07-01 at 18:01 +0200, Greg Kroah-Hartman wrote:
> 4.4-stable review patch. If anyone has any objections, please let me know.
>
> --
>
> From: Dan Carpenter
>
> commit 18c9a99bce2a57dfd7e881658703b5d7469cc7b9 upstream.
>
> We read from the cdb[] buffer in
On Tue, Jul 10, 2018 at 01:09:26PM +0800, Ryder Lee wrote:
> Cleanup binding document to get rid of unsupported reference boards
> for MT7623N.
>
> Cc: John Crispin
> Cc: Sean Wang
> Signed-off-by: Ryder Lee
> ---
> Documentation/devicetree/bindings/arm/mediatek.txt | 3 ---
> 1 file changed,
On Tue, Jul 10, 2018 at 01:09:26PM +0800, Ryder Lee wrote:
> Cleanup binding document to get rid of unsupported reference boards
> for MT7623N.
>
> Cc: John Crispin
> Cc: Sean Wang
> Signed-off-by: Ryder Lee
> ---
> Documentation/devicetree/bindings/arm/mediatek.txt | 3 ---
> 1 file changed,
At least one OMAP15xx based board - Amstrad Delta - makes other use
than simple GPIO of OMAP1 MPUIO port. Since the port is registered
unconditionally at postcore_initcall as "omap_gpio" platform device,
hence occupied by gpio-omap driver, other device driver has no chance
to request its I/O
At least one OMAP15xx based board - Amstrad Delta - makes other use
than simple GPIO of OMAP1 MPUIO port. Since the port is registered
unconditionally at postcore_initcall as "omap_gpio" platform device,
hence occupied by gpio-omap driver, other device driver has no chance
to request its I/O
On Wed, Jul 18, 2018 at 06:06:23PM -0400, Johannes Weiner wrote:
> On Tue, Jul 17, 2018 at 05:01:42PM +0200, Peter Zijlstra wrote:
> > On Thu, Jul 12, 2018 at 01:29:40PM -0400, Johannes Weiner wrote:
> > > +static bool psi_update_stats(struct psi_group *group)
> > > +{
> > > + u64
On Fri, Jul 06, 2018 at 04:31:42PM -0700, Douglas Anderson wrote:
> A few patches have landed for the qcom-qmp PHY that affect how you
> would write a device tree node. ...yet the bindings weren't updated.
> Let's remedy the situation and make the bindings refelect reality.
"dt-bindings: phy:
On Wed, Jul 18, 2018 at 06:06:23PM -0400, Johannes Weiner wrote:
> On Tue, Jul 17, 2018 at 05:01:42PM +0200, Peter Zijlstra wrote:
> > On Thu, Jul 12, 2018 at 01:29:40PM -0400, Johannes Weiner wrote:
> > > +static bool psi_update_stats(struct psi_group *group)
> > > +{
> > > + u64
On Fri, Jul 06, 2018 at 04:31:42PM -0700, Douglas Anderson wrote:
> A few patches have landed for the qcom-qmp PHY that affect how you
> would write a device tree node. ...yet the bindings weren't updated.
> Let's remedy the situation and make the bindings refelect reality.
"dt-bindings: phy:
From: Tetsuo Handa
> Sent: 20 July 2018 14:27
>
> On 2018/07/19 22:46, Peter Zijlstra wrote:
> > On Thu, Jul 19, 2018 at 10:37:23PM +0900, Tetsuo Handa wrote:
> >> This patch can be applied before proposing abovementioned changes.
> >> Since there are many kernel threads whose backtrace is boring
From: Tetsuo Handa
> Sent: 20 July 2018 14:27
>
> On 2018/07/19 22:46, Peter Zijlstra wrote:
> > On Thu, Jul 19, 2018 at 10:37:23PM +0900, Tetsuo Handa wrote:
> >> This patch can be applied before proposing abovementioned changes.
> >> Since there are many kernel threads whose backtrace is boring
On Thu, Jul 05, 2018 at 04:03:11PM +0100, Quentin Perret wrote:
> On Thursday 05 Jul 2018 at 15:13:49 (+0100), Morten Rasmussen wrote:
> > 3. Detecting the flag in generic kernel/sched/* code means that all
> > architectures will pay the for the overhead when building/rebuilding the
> >
On Thu, Jul 05, 2018 at 04:03:11PM +0100, Quentin Perret wrote:
> On Thursday 05 Jul 2018 at 15:13:49 (+0100), Morten Rasmussen wrote:
> > 3. Detecting the flag in generic kernel/sched/* code means that all
> > architectures will pay the for the overhead when building/rebuilding the
> >
On Fri, Jul 06, 2018 at 04:31:21PM +0200, Jerome Brunet wrote:
> Add dt-bindings for the audio memory arbitror found on Amlogic's
> A113 based SoCs
s/arbitror/arbiter/
>
> Signed-off-by: Jerome Brunet
> ---
> .../bindings/reset/amlogic,meson-axg-audio-arb.txt | 21
> +
>
On Fri, Jul 06, 2018 at 04:31:21PM +0200, Jerome Brunet wrote:
> Add dt-bindings for the audio memory arbitror found on Amlogic's
> A113 based SoCs
s/arbitror/arbiter/
>
> Signed-off-by: Jerome Brunet
> ---
> .../bindings/reset/amlogic,meson-axg-audio-arb.txt | 21
> +
>
One of the requirement for modern x86 system to enter lowest power mode
(SLP_S0) is SATA IP block to be off. This is true even during when
platform is suspended to idle and not only in opportunistic (runtime)
suspend.
Several of these system don't have traditional ACPI S3, so it is
important that
One of the requirement for modern x86 system to enter lowest power mode
(SLP_S0) is SATA IP block to be off. This is true even during when
platform is suspended to idle and not only in opportunistic (runtime)
suspend.
Several of these system don't have traditional ACPI S3, so it is
important that
Il 20/07/2018 15:43, Rob Herring ha scritto:
On Wed, Jul 18, 2018 at 04:09:43PM +0200, Giulio Benetti wrote:
The m41t11 variant is very similar to the already supported m41t00 and
m41t0, but it has also 56 bytes of NVRAM.
Add it to driver taking into account NVRAM section.
Signed-off-by:
Il 20/07/2018 15:43, Rob Herring ha scritto:
On Wed, Jul 18, 2018 at 04:09:43PM +0200, Giulio Benetti wrote:
The m41t11 variant is very similar to the already supported m41t00 and
m41t0, but it has also 56 bytes of NVRAM.
Add it to driver taking into account NVRAM section.
Signed-off-by:
Oleg, Srikar, Masami, Song,
Any feedback please? :)
Thanks,
Ravi
On 07/16/2018 02:17 PM, Ravi Bangoria wrote:
> Userspace Statically Defined Tracepoints[1] are dtrace style markers
> inside userspace applications. Applications like PostgreSQL, MySQL,
> Pthread, Perl, Python, Java, Ruby,
Oleg, Srikar, Masami, Song,
Any feedback please? :)
Thanks,
Ravi
On 07/16/2018 02:17 PM, Ravi Bangoria wrote:
> Userspace Statically Defined Tracepoints[1] are dtrace style markers
> inside userspace applications. Applications like PostgreSQL, MySQL,
> Pthread, Perl, Python, Java, Ruby,
The clocks vde, vi, epp, mpe, 2d and 3d are all fractional
divisors, and not integer divisors as setup in the current
kernel. This seems to be the same for tegra2 and tegra3.
Signed-off-by: Ben Dooks
---
drivers/clk/tegra/clk-tegra-periph.c | 12 ++--
1 file changed, 6 insertions(+), 6
The clocks vde, vi, epp, mpe, 2d and 3d are all fractional
divisors, and not integer divisors as setup in the current
kernel. This seems to be the same for tegra2 and tegra3.
Signed-off-by: Ben Dooks
---
drivers/clk/tegra/clk-tegra-periph.c | 12 ++--
1 file changed, 6 insertions(+), 6
The use of WARN_ON(1) is a bit extreme for something that is called from
very few places. Add a function to print the ID (and maybe more info if
people really want it).
This was done as during the development of the tegra-automotive branches
we got swamped with clock errors of not very useful
The use of WARN_ON(1) is a bit extreme for something that is called from
very few places. Add a function to print the ID (and maybe more info if
people really want it).
This was done as during the development of the tegra-automotive branches
we got swamped with clock errors of not very useful
The 2D and 3D clocks have an IDLE field in bits 15:8 so add these
clocks by making a 2D and 3D mux, and split the divider into the
standard 2D/3D ones and 2D/3D idle clocks.
Signed-off-by: Ben Dooks
---
drivers/clk/tegra/clk-id.h | 4
drivers/clk/tegra/clk-tegra-periph.c|
From: Thomas Preston
The i2s clock mux should take audio_2x as a parent, but the
current macro misses the _2x suffix off the audio input clock
which means the audio_2x cannot be selected as a parent of i2s.
Fix the issue by appending the _2x prefix in the name array.
Signed-off-by: Thomas
Hi, this is a set of clock updates and fixes we did when developing
the tegra20/tegra30 auto support. The audio change is due to using
the tegra in clock-slave mode (this hasn't been done before)
We have also implemented the clock reset status callback as it is
used by some of the driver work we
Add a the status callback for the reset controller part of the clock
code in the tegra to allow drivers to query the status of a reset line.
Signed-off-by: Ben Dooks
---
drivers/clk/tegra/clk.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/clk/tegra/clk.c
If both the TEGRA_PERIPH_NO_DIV and TEGRA_PERIPH_NO_GATE are set
as the clock is a mux only, then the clock code fails as it does
not handle both these at the same time. Add support for this by
adding new ops with just the parent get/set.
This is required to add the 2d and 3d idle clocks.
Hi, this is a set of clock updates and fixes we did when developing
the tegra20/tegra30 auto support. The audio change is due to using
the tegra in clock-slave mode (this hasn't been done before)
We have also implemented the clock reset status callback as it is
used by some of the driver work we
Add a the status callback for the reset controller part of the clock
code in the tegra to allow drivers to query the status of a reset line.
Signed-off-by: Ben Dooks
---
drivers/clk/tegra/clk.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/clk/tegra/clk.c
If both the TEGRA_PERIPH_NO_DIV and TEGRA_PERIPH_NO_GATE are set
as the clock is a mux only, then the clock code fails as it does
not handle both these at the same time. Add support for this by
adding new ops with just the parent get/set.
This is required to add the 2d and 3d idle clocks.
The 2D and 3D clocks have an IDLE field in bits 15:8 so add these
clocks by making a 2D and 3D mux, and split the divider into the
standard 2D/3D ones and 2D/3D idle clocks.
Signed-off-by: Ben Dooks
---
drivers/clk/tegra/clk-id.h | 4
drivers/clk/tegra/clk-tegra-periph.c|
From: Thomas Preston
The i2s clock mux should take audio_2x as a parent, but the
current macro misses the _2x suffix off the audio input clock
which means the audio_2x cannot be selected as a parent of i2s.
Fix the issue by appending the _2x prefix in the name array.
Signed-off-by: Thomas
If the _calc_rate() function fails in the tegra clock code, print
the name of the clock that failed to allow debugging.
Signed-off-by: Ben Dooks
---
drivers/clk/tegra/clk-pll.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/tegra/clk-pll.c
The host1x clock according to both tegra2 and tegra3 manuals is
an 8bit divider with lsb being fractional. This is running into
an issue where the host1x is being set on a tegra20a system to
266.4MHz but ends up at 222MHz instead.
Signed-off-by: Ben Dooks
---
If the _calc_rate() function fails in the tegra clock code, print
the name of the clock that failed to allow debugging.
Signed-off-by: Ben Dooks
---
drivers/clk/tegra/clk-pll.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/tegra/clk-pll.c
The host1x clock according to both tegra2 and tegra3 manuals is
an 8bit divider with lsb being fractional. This is running into
an issue where the host1x is being set on a tegra20a system to
266.4MHz but ends up at 222MHz instead.
Signed-off-by: Ben Dooks
---
On Wed, Jul 18, 2018 at 08:27:17PM +0200, Mylène Josserand wrote:
> Add the support of regulator to use it as VCC source.
>
> Signed-off-by: Mylène Josserand
> ---
> .../bindings/input/touchscreen/edt-ft5x06.txt | 1 +
Please add acks when posting new versions.
>
On Wed, Jul 18, 2018 at 08:27:17PM +0200, Mylène Josserand wrote:
> Add the support of regulator to use it as VCC source.
>
> Signed-off-by: Mylène Josserand
> ---
> .../bindings/input/touchscreen/edt-ft5x06.txt | 1 +
Please add acks when posting new versions.
>
On 2018-07-19 12:22, Vinod wrote:
> Hi Peter,
>
> On 18-07-18, 13:06, Peter Ujfalusi wrote:
>
+struct dma_async_tx_descriptor;
+
+struct dma_descriptor_metadata_ops {
+ int (*attach)(struct dma_async_tx_descriptor *desc, void *data,
+size_t len);
>>>
On Wed, Jul 18, 2018 at 04:09:43PM +0200, Giulio Benetti wrote:
> The m41t11 variant is very similar to the already supported m41t00 and
> m41t0, but it has also 56 bytes of NVRAM.
>
> Add it to driver taking into account NVRAM section.
>
> Signed-off-by: Giulio Benetti
> ---
>
On 2018-07-19 12:22, Vinod wrote:
> Hi Peter,
>
> On 18-07-18, 13:06, Peter Ujfalusi wrote:
>
+struct dma_async_tx_descriptor;
+
+struct dma_descriptor_metadata_ops {
+ int (*attach)(struct dma_async_tx_descriptor *desc, void *data,
+size_t len);
>>>
On Wed, Jul 18, 2018 at 04:09:43PM +0200, Giulio Benetti wrote:
> The m41t11 variant is very similar to the already supported m41t00 and
> m41t0, but it has also 56 bytes of NVRAM.
>
> Add it to driver taking into account NVRAM section.
>
> Signed-off-by: Giulio Benetti
> ---
>
On Fri, Jul 20, 2018 at 03:17:54PM +0200, Thomas Gleixner wrote:
> On Fri, 20 Jul 2018, Kirill A. Shutemov wrote:
> > On Thu, Jul 19, 2018 at 03:40:41PM +0200, Thomas Gleixner wrote:
> > > > > I still don't see how that's supposed to work.
> > > > >
> > > > > When the inconsistent CPU is brought
On Fri, Jul 20, 2018 at 03:17:54PM +0200, Thomas Gleixner wrote:
> On Fri, 20 Jul 2018, Kirill A. Shutemov wrote:
> > On Thu, Jul 19, 2018 at 03:40:41PM +0200, Thomas Gleixner wrote:
> > > > > I still don't see how that's supposed to work.
> > > > >
> > > > > When the inconsistent CPU is brought
On Fri, Jul 20, 2018 at 06:34:42AM -0700, Nathan Chancellor wrote:
> On Fri, Jul 20, 2018 at 02:13:17PM +0200, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 4.9.114 release.
> > There are 66 patches in this series, all will be posted as a response
> > to this
On Fri, Jul 20, 2018 at 06:34:42AM -0700, Nathan Chancellor wrote:
> On Fri, Jul 20, 2018 at 02:13:17PM +0200, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 4.9.114 release.
> > There are 66 patches in this series, all will be posted as a response
> > to this
On Fri, Jul 20, 2018 at 01:34:43PM +0100, Mark Brown wrote:
> On Fri, Jul 20, 2018 at 02:13:28PM +0200, Greg Kroah-Hartman wrote:
>
> > The bcm63xx SPI controller does not allow manual control of the CS
> > lines and will toggle it automatically before and after sending data,
> > so we are
On Fri, Jul 20, 2018 at 01:34:43PM +0100, Mark Brown wrote:
> On Fri, Jul 20, 2018 at 02:13:28PM +0200, Greg Kroah-Hartman wrote:
>
> > The bcm63xx SPI controller does not allow manual control of the CS
> > lines and will toggle it automatically before and after sending data,
> > so we are
Hi Leonard,
On Fri, Jul 20, 2018 at 9:47 AM, Leonard Crestez
wrote:
> +static int imx6_pcie_resume_noirq(struct device *dev)
> +{
> + int ret = 0;
There is no need for initializing 'ret' here.
> + struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
> + struct pcie_port *pp =
Hi Leonard,
On Fri, Jul 20, 2018 at 9:47 AM, Leonard Crestez
wrote:
> +static int imx6_pcie_resume_noirq(struct device *dev)
> +{
> + int ret = 0;
There is no need for initializing 'ret' here.
> + struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
> + struct pcie_port *pp =
On Fri, Jul 20, 2018 at 02:13:17PM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.114 release.
> There are 66 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
On Fri, Jul 20, 2018 at 02:13:17PM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.114 release.
> There are 66 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
In function qca_setup, we set initial and operating speeds for Qualcomm
Bluetooth SoC's. This block of code is common across different
Qualcomm Bluetooth SoC's. Instead of duplicating the code, created
a wrapper function to set the speeds. So that future coming SoC's
can use these wrapper
Add support to set voltage/current of various regulators
to power up/down Bluetooth chip wcn3990.
Signed-off-by: Balakrishna Godavarthi
---
changes in v10:
* added support to read regulator currents from dts.
* added support to try to connect with chip if it fails to respond to
initial
In function qca_setup, we set initial and operating speeds for Qualcomm
Bluetooth SoC's. This block of code is common across different
Qualcomm Bluetooth SoC's. Instead of duplicating the code, created
a wrapper function to set the speeds. So that future coming SoC's
can use these wrapper
Add support to set voltage/current of various regulators
to power up/down Bluetooth chip wcn3990.
Signed-off-by: Balakrishna Godavarthi
---
changes in v10:
* added support to read regulator currents from dts.
* added support to try to connect with chip if it fails to respond to
initial
On Fri, Jul 20, 2018 at 02:13:30PM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.4.143 release.
> There are 31 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
On Fri, Jul 20, 2018 at 02:13:30PM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.4.143 release.
> There are 31 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
The SD_ASYM_CPUCAPACITY sched_domain flag is supposed to mark the
sched_domain in the hierarchy where all cpu capacities are visible for
any cpu's point of view on asymmetric cpu capacity systems. The
scheduler can then take to take capacity asymmetry into account when
balancing at this level. It
Asymmetric cpu capacity can not necessarily be determined accurately at
the time the initial sched_domain hierarchy is built during boot. It is
therefore necessary to be able to force a full rebuild of the hierarchy
later triggered by the arch_topology driver. A full rebuild requires the
arch-code
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