Am Dienstag, den 24.07.2018, 19:14 +0300 schrieb Leonard Crestez:
> On imx7d the pcie-phy power domain is turned off in suspend and this can
> make the system hang after resume when attempting any read from PCI.
>
> Fix this by adding minimal suspend/resume code from the nxp internal
> tree. This
Am Dienstag, den 24.07.2018, 19:14 +0300 schrieb Leonard Crestez:
> On imx7d the pcie-phy power domain is turned off in suspend and this can
> make the system hang after resume when attempting any read from PCI.
>
> Fix this by adding minimal suspend/resume code from the nxp internal
> tree. This
Am Dienstag, den 24.07.2018, 19:14 +0300 schrieb Leonard Crestez:
> This reverts commit 1c86c9dd82f859b474474a7fee0d5195da2c9c1d.
>
> That commit followed the reference manual but unfortunately the imx7d
> manual is incorrect.
>
> Tested with ath9k pcie card and confirmed internally.
>
>
In the quest to remove all stack VLA usage from the kernel[1], this
uses the upper bounds on blocksize. Since this is always a cipher
blocksize, use the existing cipher max blocksize.
[1]
https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qpxydaacu1rq...@mail.gmail.com
Signed-off-by:
Am Dienstag, den 24.07.2018, 19:14 +0300 schrieb Leonard Crestez:
> This reverts commit 1c86c9dd82f859b474474a7fee0d5195da2c9c1d.
>
> That commit followed the reference manual but unfortunately the imx7d
> manual is incorrect.
>
> Tested with ath9k pcie card and confirmed internally.
>
>
In the quest to remove all stack VLA usage from the kernel[1], this
uses the upper bounds on blocksize. Since this is always a cipher
blocksize, use the existing cipher max blocksize.
[1]
https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qpxydaacu1rq...@mail.gmail.com
Signed-off-by:
On 07/24/2018 08:14 AM, Will Deacon wrote:
> On Tue, Jul 24, 2018 at 09:45:14AM -0400, Alexei Colin wrote:
>> ARM64 SoCs with a PCI bus present the RapiodIO options; SoCs with
>> RapidIO IP blocks but without a PCI bus, need to select HAS_RAPIDIO in
>> Kconfig.platforms.
>>
>> HAS_RAPIDIO was
On 07/24/2018 08:14 AM, Will Deacon wrote:
> On Tue, Jul 24, 2018 at 09:45:14AM -0400, Alexei Colin wrote:
>> ARM64 SoCs with a PCI bus present the RapiodIO options; SoCs with
>> RapidIO IP blocks but without a PCI bus, need to select HAS_RAPIDIO in
>> Kconfig.platforms.
>>
>> HAS_RAPIDIO was
On 07/19/2018 11:08 AM, Roman Gushchin wrote:
> On Wed, Jul 18, 2018 at 07:33:58PM +0200, Claudio wrote:
>> This commit adds tests for some of the core functionalities
>> of cgroups v2.
>>
>> The commit adds tests for some core principles of croup V2 API:
>>
>> -
On Tue, Jul 17, 2018 at 10:49:35AM +, Corentin Labbe wrote:
> Since ahci_platform_put_resources() use target_pwrs after "devm_" freed
> it, we cannot use devm_kcalloc for allocating target_pwrs.
>
> This reverts commit bd0038b1b4f499d814d8f33a55b1df5ea6cf3b85.
>
> Reported-by: Mikko
On 07/19/2018 11:08 AM, Roman Gushchin wrote:
> On Wed, Jul 18, 2018 at 07:33:58PM +0200, Claudio wrote:
>> This commit adds tests for some of the core functionalities
>> of cgroups v2.
>>
>> The commit adds tests for some core principles of croup V2 API:
>>
>> -
On Tue, Jul 17, 2018 at 10:49:35AM +, Corentin Labbe wrote:
> Since ahci_platform_put_resources() use target_pwrs after "devm_" freed
> it, we cannot use devm_kcalloc for allocating target_pwrs.
>
> This reverts commit bd0038b1b4f499d814d8f33a55b1df5ea6cf3b85.
>
> Reported-by: Mikko
Hi,
On Wednesday, July 18, 2018 10:02:50 PM Krzysztof Kozlowski wrote:
> Replace GPL license statement with SPDX license identifier (GPL-2.0+).
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> include/dt-bindings/thermal/thermal_exynos.h | 12 +---
> 1 file changed, 1 insertion(+), 11
Hi,
On Wednesday, July 18, 2018 10:02:50 PM Krzysztof Kozlowski wrote:
> Replace GPL license statement with SPDX license identifier (GPL-2.0+).
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> include/dt-bindings/thermal/thermal_exynos.h | 12 +---
> 1 file changed, 1 insertion(+), 11
Introduce driver for the External Memory Controller (EMC) found on Tegra20
chips, which controls the external DRAM on the board. The purpose of this
driver is to program memory timing for external memory on the EMC clock
rate change.
Signed-off-by: Dmitry Osipenko
Acked-by: Peter De Schrijver
Introduce driver for the External Memory Controller (EMC) found on Tegra20
chips, which controls the external DRAM on the board. The purpose of this
driver is to program memory timing for external memory on the EMC clock
rate change.
Signed-off-by: Dmitry Osipenko
Acked-by: Peter De Schrijver
Kernel should never gate the EMC clock as it causes immediate lockup, so
removing clk-gate functionality doesn't affect anything. Turning EMC clk
gate into divider allows to implement glitch-less EMC scaling, avoiding
reparenting to a backup clock.
Signed-off-by: Dmitry Osipenko
Acked-by: Peter
Kernel should never gate the EMC clock as it causes immediate lockup, so
removing clk-gate functionality doesn't affect anything. Turning EMC clk
gate into divider allows to implement glitch-less EMC scaling, avoiding
reparenting to a backup clock.
Signed-off-by: Dmitry Osipenko
Acked-by: Peter
Ensure that direct PLLM sourcing is turned off for EMC as we don't support
that configuration in the clk driver.
Signed-off-by: Dmitry Osipenko
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/clk-tegra20.c | 10 ++
1 file changed, 10 insertions(+)
diff --git
Ensure that direct PLLM sourcing is turned off for EMC as we don't support
that configuration in the clk driver.
Signed-off-by: Dmitry Osipenko
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/clk-tegra20.c | 10 ++
1 file changed, 10 insertions(+)
diff --git
Add interrupt entry into the EMC DT node.
Signed-off-by: Dmitry Osipenko
Acked-by: Peter De Schrijver
---
arch/arm/boot/dts/tegra20.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 15b73bd377f0..9eb4163a4390 100644
Add clock entry into the EMC DT node.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 9eb4163a4390..979f38293fe5 100644
---
Add interrupt entry into the EMC DT node.
Signed-off-by: Dmitry Osipenko
Acked-by: Peter De Schrijver
---
arch/arm/boot/dts/tegra20.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 15b73bd377f0..9eb4163a4390 100644
Add clock entry into the EMC DT node.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 9eb4163a4390..979f38293fe5 100644
---
EMC has a dedicated interrupt that is used to notify about completion of
HW operations. Document the interrupt property.
Signed-off-by: Dmitry Osipenko
Acked-by: Rob Herring
Acked-by: Peter De Schrijver
---
.../devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt| 2 ++
1 file
EMC has a dedicated interrupt that is used to notify about completion of
HW operations. Document the interrupt property.
Signed-off-by: Dmitry Osipenko
Acked-by: Rob Herring
Acked-by: Peter De Schrijver
---
.../devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt| 2 ++
1 file
Embedded memory controller has a corresponding clock, document the clock
property.
Signed-off-by: Dmitry Osipenko
Acked-by: Rob Herring
---
.../devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt| 2 ++
1 file changed, 2 insertions(+)
diff --git
Move tegra20-emc binding to the memory-controllers directory for
consistency with the other Tegra memory bindings.
Signed-off-by: Dmitry Osipenko
Acked-by: Rob Herring
---
.../{arm/tegra => memory-controllers}/nvidia,tegra20-emc.txt | 0
1 file changed, 0 insertions(+), 0 deletions(-)
Embedded memory controller has a corresponding clock, document the clock
property.
Signed-off-by: Dmitry Osipenko
Acked-by: Rob Herring
---
.../devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt| 2 ++
1 file changed, 2 insertions(+)
diff --git
Move tegra20-emc binding to the memory-controllers directory for
consistency with the other Tegra memory bindings.
Signed-off-by: Dmitry Osipenko
Acked-by: Rob Herring
---
.../{arm/tegra => memory-controllers}/nvidia,tegra20-emc.txt | 0
1 file changed, 0 insertions(+), 0 deletions(-)
On 21-Jul 21:04, Suren Baghdasaryan wrote:
> On Mon, Jul 16, 2018 at 1:29 AM, Patrick Bellasi
> wrote:
[...]
> > +static inline unsigned int scale_from_percent(unsigned int pct)
> > +{
> > + WARN_ON(pct > 100);
> > +
> > + return ((SCHED_FIXEDPOINT_SCALE * pct) / 100);
> > +}
> > +
On 21-Jul 21:04, Suren Baghdasaryan wrote:
> On Mon, Jul 16, 2018 at 1:29 AM, Patrick Bellasi
> wrote:
[...]
> > +static inline unsigned int scale_from_percent(unsigned int pct)
> > +{
> > + WARN_ON(pct > 100);
> > +
> > + return ((SCHED_FIXEDPOINT_SCALE * pct) / 100);
> > +}
> > +
Changelog:
v5:
- Fixed wrong EMC clock divider type in the "Turn EMC clock gate into
divider" patch. It is a Tegra's fractional 7.1 divider and not a
simple integer divider. Peter, please take a look at the change.
v4:
- Fixed "bad of_node_put()" error which
Changelog:
v5:
- Fixed wrong EMC clock divider type in the "Turn EMC clock gate into
divider" patch. It is a Tegra's fractional 7.1 divider and not a
simple integer divider. Peter, please take a look at the change.
v4:
- Fixed "bad of_node_put()" error which
Hi Laura,
On Fri, Jul 20, 2018 at 02:41:52PM -0700, Laura Abbott wrote:
> This is the version of stackleak for arm64, hopefully ready for queueing
Thanks. I'll push these into linux-next tomorrow, once I've had a chance
to test my conflict resolution in entry.S.
Will
Hi Laura,
On Fri, Jul 20, 2018 at 02:41:52PM -0700, Laura Abbott wrote:
> This is the version of stackleak for arm64, hopefully ready for queueing
Thanks. I'll push these into linux-next tomorrow, once I've had a chance
to test my conflict resolution in entry.S.
Will
On Tue, Jul 24, 2018 at 5:44 AM, Alexander Popov wrote:
> On 21.07.2018 00:41, Laura Abbott wrote:
>> This adds support for the STACKLEAK gcc plugin to arm64 by implementing
>> stackleak_check_alloca(), based heavily on the x86 version, and adding the
>> two helpers used by the stackleak common
On Tue, Jul 24, 2018 at 5:44 AM, Alexander Popov wrote:
> On 21.07.2018 00:41, Laura Abbott wrote:
>> This adds support for the STACKLEAK gcc plugin to arm64 by implementing
>> stackleak_check_alloca(), based heavily on the x86 version, and adding the
>> two helpers used by the stackleak common
On Mon, Jul 23, 2018 at 04:14:27PM +0200, Peter Zijlstra wrote:
> On Mon, Jul 23, 2018 at 08:30:06AM -0500, Josh Poimboeuf wrote:
> > On Thu, Jul 19, 2018 at 11:19:54PM +0200, Peter Zijlstra wrote:
> > > --- a/include/uapi/linux/perf_event.h
> > > +++ b/include/uapi/linux/perf_event.h
> > > @@
On Mon, Jul 23, 2018 at 04:14:27PM +0200, Peter Zijlstra wrote:
> On Mon, Jul 23, 2018 at 08:30:06AM -0500, Josh Poimboeuf wrote:
> > On Thu, Jul 19, 2018 at 11:19:54PM +0200, Peter Zijlstra wrote:
> > > --- a/include/uapi/linux/perf_event.h
> > > +++ b/include/uapi/linux/perf_event.h
> > > @@
Hi Appana,
On Tue, Jul 24, 2018 at 7:17 AM, Appana Durga Kedareswara rao
wrote:
> This patch does the below
> --> Adds support for readback of pl configuration data
> --> Adds support for readback of pl configuration registers
Can you please make the commit message such that you have full
Hi Appana,
On Tue, Jul 24, 2018 at 7:17 AM, Appana Durga Kedareswara rao
wrote:
> This patch does the below
> --> Adds support for readback of pl configuration data
> --> Adds support for readback of pl configuration registers
Can you please make the commit message such that you have full
On 07/12/2018 07:26 PM, Dominique Martinet wrote:
> Generated by scripts/coccinelle/misc/strncpy_truncation.cocci
>
> Signed-off-by: Dominique Martinet
> ---
>
> Please see https://marc.info/?l=linux-kernel=153144450722324=2 (the
> first patch of the serie) for the motivation behind this patch
On 07/12/2018 07:26 PM, Dominique Martinet wrote:
> Generated by scripts/coccinelle/misc/strncpy_truncation.cocci
>
> Signed-off-by: Dominique Martinet
> ---
>
> Please see https://marc.info/?l=linux-kernel=153144450722324=2 (the
> first patch of the serie) for the motivation behind this patch
at 7:26 AM, Ingo Molnar wrote:
>
> * Nadav Amit wrote:
>
>> Use assembly macros for jump-labels and call them from inline assembly.
>> This not only makes the code more readable, but also improves
>> compilation decision, specifically inline decisions which GCC base on
>> the number of new
On 2018/7/24 12:26 PM, Eric Biggers wrote:
> On Thu, Jul 19, 2018 at 12:55:43AM +0800, Coly Li wrote:
>> This patch adds the re-write crc64 calculation routines for Linux kernel.
>> The CRC64 polynomical arithmetic follows ECMA-182 specification, inspired
>
> "polynomical" => "polynomial". Same
at 7:26 AM, Ingo Molnar wrote:
>
> * Nadav Amit wrote:
>
>> Use assembly macros for jump-labels and call them from inline assembly.
>> This not only makes the code more readable, but also improves
>> compilation decision, specifically inline decisions which GCC base on
>> the number of new
On 2018/7/24 12:26 PM, Eric Biggers wrote:
> On Thu, Jul 19, 2018 at 12:55:43AM +0800, Coly Li wrote:
>> This patch adds the re-write crc64 calculation routines for Linux kernel.
>> The CRC64 polynomical arithmetic follows ECMA-182 specification, inspired
>
> "polynomical" => "polynomial". Same
This fixes irrelevant "tegra-mc 7000f000.memory-controller: no memory
timings for RAM code 0 registered" warning message during of kernels
boot-up on Tegra20.
Fixes: a8d502fd3348 ("memory: tegra: Squash tegra20-mc into common tegra-mc
driver")
Signed-off-by: Dmitry Osipenko
Acked-by: Jon Hunter
This fixes irrelevant "tegra-mc 7000f000.memory-controller: no memory
timings for RAM code 0 registered" warning message during of kernels
boot-up on Tegra20.
Fixes: a8d502fd3348 ("memory: tegra: Squash tegra20-mc into common tegra-mc
driver")
Signed-off-by: Dmitry Osipenko
Acked-by: Jon Hunter
On 19/07/2018 01:21, Yang Shi wrote:
> Introduces three new helper functions:
> * munmap_addr_sanity()
> * munmap_lookup_vma()
> * munmap_mlock_vma()
>
> They will be used by do_munmap() and the new do_munmap with zapping
> large mapping early in the later patch.
>
> There is no functional
On 19/07/2018 01:21, Yang Shi wrote:
> Introduces three new helper functions:
> * munmap_addr_sanity()
> * munmap_lookup_vma()
> * munmap_mlock_vma()
>
> They will be used by do_munmap() and the new do_munmap with zapping
> large mapping early in the later patch.
>
> There is no functional
On Tue, 24 Jul 2018 10:14:46 -0600
Alex Williamson wrote:
> Add a device specific reset for Intel DC P3700 NVMe device which
> exhibits a timeout failure in drivers waiting for the ready status to
> update after NVMe enable if the driver interacts with the device too
> quickly after FLR. As
On Tue, 24 Jul 2018 10:14:46 -0600
Alex Williamson wrote:
> Add a device specific reset for Intel DC P3700 NVMe device which
> exhibits a timeout failure in drivers waiting for the ready status to
> update after NVMe enable if the driver interacts with the device too
> quickly after FLR. As
On imx7d the pcie-phy power domain is turned off in suspend and this can
make the system hang after resume when attempting any read from PCI.
Fix this by adding minimal suspend/resume code from the nxp internal
tree. This will prepare for powering down on suspend and reset the block
on resume.
is a nightmare and unlikely to work.
* Drop "reset: imx7: Fix always writing bits as 0 (accepted by Philipp)
Series is against linux-next tag next-20180724 where the reset patch was
already accepted. The imx7d.dtsi patch is also useful standalone.
Link to v2: https://lkml.org/lkml/2018/7/2
This reverts commit 1c86c9dd82f859b474474a7fee0d5195da2c9c1d.
That commit followed the reference manual but unfortunately the imx7d
manual is incorrect.
Tested with ath9k pcie card and confirmed internally.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx7d.dtsi | 12
1
This reverts commit 1c86c9dd82f859b474474a7fee0d5195da2c9c1d.
That commit followed the reference manual but unfortunately the imx7d
manual is incorrect.
Tested with ath9k pcie card and confirmed internally.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx7d.dtsi | 12
1
On imx7d the pcie-phy power domain is turned off in suspend and this can
make the system hang after resume when attempting any read from PCI.
Fix this by adding minimal suspend/resume code from the nxp internal
tree. This will prepare for powering down on suspend and reset the block
on resume.
is a nightmare and unlikely to work.
* Drop "reset: imx7: Fix always writing bits as 0 (accepted by Philipp)
Series is against linux-next tag next-20180724 where the reset patch was
already accepted. The imx7d.dtsi patch is also useful standalone.
Link to v2: https://lkml.org/lkml/2018/7/2
v3: Separate quirks, only for the afflicted devices
v2: Add bug link, use Samsung vendor ID, add spec references
Fix two different NVMe device reset issues with device specific
quirks. The Samsung controller in patch 2 sometimes doesn't like
being reset while enabled, so disable the NVMe
v3: Separate quirks, only for the afflicted devices
v2: Add bug link, use Samsung vendor ID, add spec references
Fix two different NVMe device reset issues with device specific
quirks. The Samsung controller in patch 2 sometimes doesn't like
being reset while enabled, so disable the NVMe
The Samsung SM961/PM961 (960 EVO) sometimes fails to return from FLR
with the PCI config space reading back as -1. A reproducible instance
of this behavior is resolved by clearing the enable bit in the NVMe
configuration register and waiting for the ready status to clear
(disabling the NVMe
Add a device specific reset for Intel DC P3700 NVMe device which
exhibits a timeout failure in drivers waiting for the ready status to
update after NVMe enable if the driver interacts with the device too
quickly after FLR. As this has been observed in device assignment
scenarios, resolve this
pcie_flr() suggests pcie_has_flr() to ensure that PCIe FLR support is
present prior to calling. pcie_flr() is exported while pcie_has_flr()
is not. Resolve this.
Signed-off-by: Alex Williamson
---
drivers/pci/pci.c |3 ++-
include/linux/pci.h |1 +
2 files changed, 3 insertions(+),
The Samsung SM961/PM961 (960 EVO) sometimes fails to return from FLR
with the PCI config space reading back as -1. A reproducible instance
of this behavior is resolved by clearing the enable bit in the NVMe
configuration register and waiting for the ready status to clear
(disabling the NVMe
Add a device specific reset for Intel DC P3700 NVMe device which
exhibits a timeout failure in drivers waiting for the ready status to
update after NVMe enable if the driver interacts with the device too
quickly after FLR. As this has been observed in device assignment
scenarios, resolve this
pcie_flr() suggests pcie_has_flr() to ensure that PCIe FLR support is
present prior to calling. pcie_flr() is exported while pcie_has_flr()
is not. Resolve this.
Signed-off-by: Alex Williamson
---
drivers/pci/pci.c |3 ++-
include/linux/pci.h |1 +
2 files changed, 3 insertions(+),
Hi Rob
On 07/20/2018 06:35 PM, Rob Herring wrote:
On Mon, Jul 16, 2018 at 02:57:36PM +0200, Alexandre Torgue wrote:
In case the exti line is not in line with the bank number (that is the case
when there is an hole between two banks, for example GPIOK and then GPIOZ),
use "st,bank-ioport" DT
Hi Rob
On 07/20/2018 06:35 PM, Rob Herring wrote:
On Mon, Jul 16, 2018 at 02:57:36PM +0200, Alexandre Torgue wrote:
In case the exti line is not in line with the bank number (that is the case
when there is an hole between two banks, for example GPIOK and then GPIOZ),
use "st,bank-ioport" DT
The patch
regulator: Add sw2_sw4 voltage table to cpcap regulator.
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next
The patch
regulator: Add sw2_sw4 voltage table to cpcap regulator.
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next
The patch
regulator: Add support for CPCAP regulators on Motorola Xoom devices.
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime
The patch
regulator: Add support for CPCAP regulators on Motorola Xoom devices.
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime
On Tue, Jul 24, 2018 at 11:52:48AM -0400, Peter Geis wrote:
> On 07/24/2018 10:36 AM, Mark Brown wrote:
> > Please submit patches using subject lines reflecting the style for the
> > subsystem. This makes it easier for people to identify relevant
> > patches. Look at what existing commits in
On Tue, Jul 24, 2018 at 11:52:48AM -0400, Peter Geis wrote:
> On 07/24/2018 10:36 AM, Mark Brown wrote:
> > Please submit patches using subject lines reflecting the style for the
> > subsystem. This makes it easier for people to identify relevant
> > patches. Look at what existing commits in
On 24-07-18, 17:04, Paul Cercueil wrote:
> Hi Vinod,
>
> Le mar. 24 juil. 2018 à 15:32, Vinod a écrit :
> > On 21-07-18, 13:06, Paul Cercueil wrote:
> > > +static inline void jz4780_dma_chan_enable(struct jz4780_dma_dev
> > > *jzdma,
> > > +unsigned int chn)
> >
> > right justified
On 24-07-18, 17:04, Paul Cercueil wrote:
> Hi Vinod,
>
> Le mar. 24 juil. 2018 à 15:32, Vinod a écrit :
> > On 21-07-18, 13:06, Paul Cercueil wrote:
> > > +static inline void jz4780_dma_chan_enable(struct jz4780_dma_dev
> > > *jzdma,
> > > +unsigned int chn)
> >
> > right justified
Casey Schaufler wrote:
> > (1) Mount topology and reconfiguration change events.
>
> With the possibility of unprivileged mounting you're going to have to
> address access control on events. If root in a user namespace mounts a
> filesystem you may have a case where the "real" user wouldn't
On 24/07/18 16:02, Parthiban Nallathambi wrote:
> Actions Semi Owl family SoC's S500, S700 and S900 provides support
> for 3 external interrupt controllers through SIRQ pins.
>
> Each line can be independently configured as interrupt or wake-up source,
> and triggers either on rising, falling or
Casey Schaufler wrote:
> > (1) Mount topology and reconfiguration change events.
>
> With the possibility of unprivileged mounting you're going to have to
> address access control on events. If root in a user namespace mounts a
> filesystem you may have a case where the "real" user wouldn't
On 24/07/18 16:02, Parthiban Nallathambi wrote:
> Actions Semi Owl family SoC's S500, S700 and S900 provides support
> for 3 external interrupt controllers through SIRQ pins.
>
> Each line can be independently configured as interrupt or wake-up source,
> and triggers either on rising, falling or
On Mon, Jul 23, 2018 at 02:24:06PM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.17.10 release.
> There are 63 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
On Thu, Jul 19, 2018 at 10:31:15PM +0200, Peter Zijlstra wrote:
> On Thu, Jul 19, 2018 at 02:47:40PM -0400, Johannes Weiner wrote:
> > On Wed, Jul 18, 2018 at 02:03:18PM +0200, Peter Zijlstra wrote:
> > > On Thu, Jul 12, 2018 at 01:29:40PM -0400, Johannes Weiner wrote:
> > > > + /* Update
On Mon, Jul 23, 2018 at 02:24:06PM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.17.10 release.
> There are 63 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
On Thu, Jul 19, 2018 at 10:31:15PM +0200, Peter Zijlstra wrote:
> On Thu, Jul 19, 2018 at 02:47:40PM -0400, Johannes Weiner wrote:
> > On Wed, Jul 18, 2018 at 02:03:18PM +0200, Peter Zijlstra wrote:
> > > On Thu, Jul 12, 2018 at 01:29:40PM -0400, Johannes Weiner wrote:
> > > > + /* Update
On 07/23/2018 11:52 AM, Alexandru Gagniuc wrote:
When we don't own AER, we shouldn't touch the AER error bits. Clearing
error bits willy-nilly might cause firmware to miss some errors. In
theory, these bits get cleared by FFS, or via ACPI _HPX method. These
mechanisms are not subject to the
On 07/23/2018 11:52 AM, Alexandru Gagniuc wrote:
When we don't own AER, we shouldn't touch the AER error bits. Clearing
error bits willy-nilly might cause firmware to miss some errors. In
theory, these bits get cleared by FFS, or via ACPI _HPX method. These
mechanisms are not subject to the
On Mon, Jul 23, 2018 at 02:24:36PM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.58 release.
> There are 44 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
On Mon, Jul 23, 2018 at 02:25:00PM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.115 release.
> There are 28 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
On Mon, Jul 23, 2018 at 02:24:36PM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.58 release.
> There are 44 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
On Mon, Jul 23, 2018 at 02:25:00PM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.115 release.
> There are 28 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
On Mon, Jul 23, 2018 at 02:40:54PM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.4.144 release.
> There are 107 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
> > Renesas R-Car Gen2 has two I2C IP cores. One can do DMA and automatic
> > transfers to the PMIC, the other has I2C slave functionality. One cannot
> > do I2C_SMBUS_QUICK, the other can. And some more kind of quirks.
> > Sometimes you can mux the pins to GPIO, so you have a third option.
> >
>
On Mon, Jul 23, 2018 at 02:40:54PM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.4.144 release.
> There are 107 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
> > Renesas R-Car Gen2 has two I2C IP cores. One can do DMA and automatic
> > transfers to the PMIC, the other has I2C slave functionality. One cannot
> > do I2C_SMBUS_QUICK, the other can. And some more kind of quirks.
> > Sometimes you can mux the pins to GPIO, so you have a third option.
> >
>
On Tue, Jul 24, 2018 at 06:10:38PM +0300, Anton Vasilyev wrote:
> static struct ro_vpd and rw_vpd are initialized by vpd_sections_init()
> in vpd_probe() based on header's ro and rw sizes.
> In vpd_remove() vpd_section_destroy() performs deinitialization based
> on enabled flag, which is set to
On Tue, Jul 24, 2018 at 06:10:38PM +0300, Anton Vasilyev wrote:
> static struct ro_vpd and rw_vpd are initialized by vpd_sections_init()
> in vpd_probe() based on header's ro and rw sizes.
> In vpd_remove() vpd_section_destroy() performs deinitialization based
> on enabled flag, which is set to
Hi Matthias,
On 2018-07-24 01:24, Matthias Kaehlcke wrote:
On Fri, Jul 20, 2018 at 07:02:43PM +0530, Balakrishna Godavarthi wrote:
Add support to set voltage/current of various regulators
to power up/down Bluetooth chip wcn3990.
Signed-off-by: Balakrishna Godavarthi
---
changes in v10:
*
Hi Matthias,
On 2018-07-24 01:24, Matthias Kaehlcke wrote:
On Fri, Jul 20, 2018 at 07:02:43PM +0530, Balakrishna Godavarthi wrote:
Add support to set voltage/current of various regulators
to power up/down Bluetooth chip wcn3990.
Signed-off-by: Balakrishna Godavarthi
---
changes in v10:
*
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