Re: [PATCH v8 20/22] KVM: s390: Handling of Cypto control block in VSIE

2018-08-09 Thread Pierre Morel
On 09/08/2018 08:20, Janosch Frank wrote: On 08.08.2018 16:44, Tony Krowiak wrote: From: Pierre Morel +#define ECA_APIE 0x0008 That shouldn't be necessary, it's defined in kvm_host.h which vsie.c includes. Or is it not? This was forgotten here for a long long time! You are right I remove

Re: [PATCH v5 5/5] Auto-detect whether a FPU exists

2018-08-09 Thread Alan Kao
On Thu, Aug 09, 2018 at 12:02:58AM -0700, Christoph Hellwig wrote: > On Thu, Aug 09, 2018 at 02:43:36PM +0800, Alan Kao wrote: > > It does look a little bit weird. Should I send a v6 for this? > > Yes, please resend the series or just this patch. > > I think the hswap.h definition should go away

Re: FUSE: write operations trigger balance_dirty_pages when using writeback cache

2018-08-09 Thread 刘硕然
Thank you for the prompt reply. I tried this config, but still can get balance_dirty_pages triggered. [root@A01-R20-I31-77-8S5FKM2 example]# stat -c %d /mnt/fuse/ 42 [root@A01-R20-I31-77-8S5FKM2 example]# echo 20 > /sys/devices/virtual/bdi/0:`stat -c %d /mnt/fuse/`/max_ratio [root@A01-R20-I31-77

Re: [PATCH RFC 1/2] KVM: s390: vsie: simulate VCPU SIE entry/exit

2018-08-09 Thread David Hildenbrand
On 07.08.2018 14:51, David Hildenbrand wrote: > VCPU requests and VCPU blocking right now don't take care of the vSIE > (as it was not necessary until now). But we want to have VCPU requests > that will also be handled before running the vSIE again. > > So let's simulate a SIE entry when entering

Re: [PATCH 0/2] fs/lock: show locks info owned by dead/invisible processes

2018-08-09 Thread Murphy Zhou
Hi, Looks like this missed v4.18 ? Thanks, Murphy On Fri, Jun 8, 2018 at 10:27 PM, Konstantin Khorenko wrote: > The behavior has been changed after 9d5b86ac13c5 ("fs/locks: Remove fl_nspid > and use fs-specific l_pid for remote locks") > and now /proc/$PID/fdinfo/$FD does not show the info abou

Re: FUSE: write operations trigger balance_dirty_pages when using writeback cache

2018-08-09 Thread Miklos Szeredi
On Thu, Aug 9, 2018 at 5:37 AM, 刘硕然 wrote: > Dear Miklos, > > Recently I've been testing FUSE and libfuse example passthrough_ll with > writeback cache on, and found out that the performance drops significantly > compared to that in local filesystem. As I can see from trace, > balance_dirty_pag

Re: [PATCH RFC v2 02/10] mm: Make shrink_slab() lockless

2018-08-09 Thread Michal Hocko
On Wed 08-08-18 16:20:54, Kirill Tkhai wrote: > [Added two more places needed srcu_dereference(). All ->shrinker_map > dereferences must be under SRCU, and this v2 adds missed in previous] > > The patch makes shrinker list and shrinker_idr SRCU-safe > for readers. This requires synchronize_srcu()

[PATCH v4 3/3] clk: meson: add sub MMC clock controller driver

2018-08-09 Thread Yixun Lan
The patch will add a MMC clock controller driver which used by MMC or NAND, It provide a mux and divider clock, and three phase clocks - core, tx, tx. Two clocks are provided as the parent of MMC clock controller from upper layer clock controller - eg "amlogic,axg-clkc" in AXG platform. To specif

[PATCH v4 2/3] clk: meson: add DT documentation for emmc clock controller

2018-08-09 Thread Yixun Lan
Document the MMC sub clock controller driver, the potential consumer of this driver is MMC or NAND. Also add four clock bindings IDs which provided by this driver. Reviewed-by: Rob Herring Signed-off-by: Yixun Lan --- .../bindings/clock/amlogic,mmc-clkc.txt | 31 +++ inclu

[PATCH v4 1/3] clk: meson: add emmc sub clock phase delay driver

2018-08-09 Thread Yixun Lan
Export the emmc sub clock phase delay ops which will be used by the emmc sub clock driver itself. Signed-off-by: Yixun Lan --- drivers/clk/meson/Makefile | 2 +- drivers/clk/meson/clk-phase-delay.c | 96 + drivers/clk/meson/clkc.h| 13 3 fil

[PATCH v4 0/3] clk: meson: add a sub EMMC clock controller support

2018-08-09 Thread Yixun Lan
This driver will add a MMC clock controller driver support. The original idea about adding a clock controller is during the discussion in the NAND driver mainline effort[1]. This driver is tested in the S400 board (AXG platform) with NAND driver. Changes since v3 [4]: - separate clk-phase-delay

[PATCH v2] dmaengine: sprd: Support DMA link-list mode

2018-08-09 Thread Baolin Wang
From: Eric Long The Spreadtrum DMA can support the link-list transaction mode, which means DMA controller can do transaction one by one automatically once we linked these transaction by link-list register. Signed-off-by: Eric Long Signed-off-by: Baolin Wang --- Changes since v1: - Remove sprd

Re: [PATCH 2/3] microblaze: Added system call table generation support

2018-08-09 Thread Michal Simek
On 9.8.2018 07:27, Firoz Khan wrote: > The system call tables are in different format in all > architecture and it will be difficult to manually add or > modify the system calls in the respective files. To make > it easy by keeping a script and which'll generate the > header file and syscall table

Re: [PATCH v5 5/5] Auto-detect whether a FPU exists

2018-08-09 Thread Christoph Hellwig
On Thu, Aug 09, 2018 at 02:43:36PM +0800, Alan Kao wrote: > It does look a little bit weird. Should I send a v6 for this? Yes, please resend the series or just this patch. I think the hswap.h definition should go away and we should just keep the switch_to.h one, even if that means including the

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