Re: [PATCH v2 1/2] staging: iio: ad7780: check if ad778x before gain update

On Sun, 2018-11-11 at 12:58 +, Jonathan Cameron wrote: > On Thu, 8 Nov 2018 13:44:17 + > "Ardelean, Alexandru" wrote: > > > On Thu, 2018-11-08 at 11:03 -0200, Giuliano Belinassi wrote: > > > Only the ad778x have the 'gain' status bit. Check it before updating > > > through a new variable

Re: [PATCH v2 1/2] staging: iio: ad7780: check if ad778x before gain update

On Sun, 2018-11-11 at 12:58 +, Jonathan Cameron wrote: > On Thu, 8 Nov 2018 13:44:17 + > "Ardelean, Alexandru" wrote: > > > On Thu, 2018-11-08 at 11:03 -0200, Giuliano Belinassi wrote: > > > Only the ad778x have the 'gain' status bit. Check it before updating > > > through a new variable

Re: [PATCH v4 1/2] staging: iio: ad7780: update voltage on read

On Sun, 2018-11-11 at 14:30 +, Jonathan Cameron wrote: > On Tue, 6 Nov 2018 09:24:44 + > "Ardelean, Alexandru" wrote: > > > On Mon, 2018-11-05 at 17:14 -0200, Renato Lui Geh wrote: > > > The ad7780 driver previously did not read the correct device output, > > > as > > > it read an

Re: [PATCH v4 1/2] staging: iio: ad7780: update voltage on read

On Sun, 2018-11-11 at 14:30 +, Jonathan Cameron wrote: > On Tue, 6 Nov 2018 09:24:44 + > "Ardelean, Alexandru" wrote: > > > On Mon, 2018-11-05 at 17:14 -0200, Renato Lui Geh wrote: > > > The ad7780 driver previously did not read the correct device output, > > > as > > > it read an

Re: [RFC PATCH v1 2/2] proc: add /proc//thread_state

On 2018/11/12 13:31, Ingo Molnar wrote: > > * Peter Zijlstra wrote: > >> On Thu, Nov 08, 2018 at 07:32:46AM +0100, Ingo Molnar wrote: >>> >>> * Aubrey Li wrote: >>> Expose the per-task cpu specific thread state value, it's helpful for userland to classify and schedule the tasks by

Re: [RFC PATCH v1 2/2] proc: add /proc//thread_state

On 2018/11/12 13:31, Ingo Molnar wrote: > > * Peter Zijlstra wrote: > >> On Thu, Nov 08, 2018 at 07:32:46AM +0100, Ingo Molnar wrote: >>> >>> * Aubrey Li wrote: >>> Expose the per-task cpu specific thread state value, it's helpful for userland to classify and schedule the tasks by

[RFC PATCH RESEND] tools/perf: Add Hygon Dhyana support

The tool perf is useful for the performance analysis on the Hygon Dhyana platform. But right now there is no Hygon support for it to analyze the KVM guest os data. So add Hygon Dhyana support to it by checking vendor string to share the code path of AMD. Signed-off-by: Pu Wen ---

[RFC PATCH RESEND] tools/perf: Add Hygon Dhyana support

The tool perf is useful for the performance analysis on the Hygon Dhyana platform. But right now there is no Hygon support for it to analyze the KVM guest os data. So add Hygon Dhyana support to it by checking vendor string to share the code path of AMD. Signed-off-by: Pu Wen ---

RE: [PATCH] arm64: disable KASAN for save_trace()

> -Original Message- > From: Mark Rutland [mailto:mark.rutl...@arm.com] > Sent: Monday, November 12, 2018 1:24 AM > To: Zhang Zhizhou(张治洲) > Cc: catalin.mari...@arm.com; will.dea...@arm.com; > mpato...@redhat.com; alex.po...@linux.com; labb...@redhat.com; > pan...@redhat.com;

RE: [PATCH] arm64: disable KASAN for save_trace()

> -Original Message- > From: Mark Rutland [mailto:mark.rutl...@arm.com] > Sent: Monday, November 12, 2018 1:24 AM > To: Zhang Zhizhou(张治洲) > Cc: catalin.mari...@arm.com; will.dea...@arm.com; > mpato...@redhat.com; alex.po...@linux.com; labb...@redhat.com; > pan...@redhat.com;

[PATCH v1 3/3] dt-bindings: pwm: update bindings for MT7629 SoC

This updates bindings for MT7629 pwm controller. Signed-off-by: Ryder Lee --- Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt

[PATCH v1 1/3] pwm: mediatek: drop flag 'has_clks'

The flag 'has_clks' and related checks are superfluous as the CCF subsystem does this for you. Cc: John Crispin Signed-off-by: Ryder Lee --- drivers/pwm/pwm-mediatek.c | 20 +--- 1 file changed, 5 insertions(+), 15 deletions(-) diff --git a/drivers/pwm/pwm-mediatek.c

[PATCH v1 3/3] dt-bindings: pwm: update bindings for MT7629 SoC

This updates bindings for MT7629 pwm controller. Signed-off-by: Ryder Lee --- Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt

[PATCH v1 1/3] pwm: mediatek: drop flag 'has_clks'

The flag 'has_clks' and related checks are superfluous as the CCF subsystem does this for you. Cc: John Crispin Signed-off-by: Ryder Lee --- drivers/pwm/pwm-mediatek.c | 20 +--- 1 file changed, 5 insertions(+), 15 deletions(-) diff --git a/drivers/pwm/pwm-mediatek.c

[PATCH v1 2/3] pwm: mediatek: add pwm support for MT7629 SoC

This adds pwm controller support for MT7629 SoC. Signed-off-by: Ryder Lee --- drivers/pwm/pwm-mediatek.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c index 9400c41..4ed95e5 100644 --- a/drivers/pwm/pwm-mediatek.c +++

[PATCH v1 2/3] pwm: mediatek: add pwm support for MT7629 SoC

This adds pwm controller support for MT7629 SoC. Signed-off-by: Ryder Lee --- drivers/pwm/pwm-mediatek.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c index 9400c41..4ed95e5 100644 --- a/drivers/pwm/pwm-mediatek.c +++

[PATCH v2 2/3] mmc: sdhci-omap: Add using external dma

sdhci-omap can support both external dma controller via dmaengine framework as well as ADMA which standard SD host controller provides. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci-omap.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/mmc/host/sdhci-omap.c

[PATCH v2 2/3] mmc: sdhci-omap: Add using external dma

sdhci-omap can support both external dma controller via dmaengine framework as well as ADMA which standard SD host controller provides. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci-omap.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/mmc/host/sdhci-omap.c

[PATCH v2 3/3] dt-bindings: sdhci-omap: Add example for using external dma

sdhci-omap can support both external dma controller via dmaengine framework as well as ADMA which standard SD host controller provides. Signed-off-by: Chunyan Zhang --- Documentation/devicetree/bindings/mmc/sdhci-omap.txt | 7 +++ 1 file changed, 7 insertions(+) diff --git

[PATCH v2 3/3] dt-bindings: sdhci-omap: Add example for using external dma

sdhci-omap can support both external dma controller via dmaengine framework as well as ADMA which standard SD host controller provides. Signed-off-by: Chunyan Zhang --- Documentation/devicetree/bindings/mmc/sdhci-omap.txt | 7 +++ 1 file changed, 7 insertions(+) diff --git

[PATCH v2 1/3] mmc: sdhci: add support for using external DMA devices

Some standard SD host controllers can support both external dma controllers as well as ADMA/SDMA in which the SD host controller acts as DMA master. TI's omap controller is the case as an example. Currently the generic SDHCI code supports ADMA/SDMA integrated in the host controller but does not

[PATCH v2 0/3] Add support for using external dma in SDHCI

Currently the generic SDHCI code in the Linux kernel supports the SD standard DMA integrated into the host controller but does not have any support for external DMA controllers implemented using dmaengine meaning that custom code is needed for any systems that use a generic DMA controller with

[PATCH v2 1/3] mmc: sdhci: add support for using external DMA devices

Some standard SD host controllers can support both external dma controllers as well as ADMA/SDMA in which the SD host controller acts as DMA master. TI's omap controller is the case as an example. Currently the generic SDHCI code supports ADMA/SDMA integrated in the host controller but does not

[PATCH v2 0/3] Add support for using external dma in SDHCI

Currently the generic SDHCI code in the Linux kernel supports the SD standard DMA integrated into the host controller but does not have any support for external DMA controllers implemented using dmaengine meaning that custom code is needed for any systems that use a generic DMA controller with

Re: [PATCH 0/5] Add Pinctrl and GPIO support for HI3670 SoC

On Wed, Oct 31, 2018 at 10:43:00AM +0100, Linus Walleij wrote: > On Tue, Oct 23, 2018 at 9:07 PM Manivannan Sadhasivam > wrote: > > > This patchset adds Pinctrl and GPIO support for HI3670 SoC from HiSilicon > > found in the HiKey970 developement board. Also, the remaining UARTs are > > enabled

Re: [PATCH 0/5] Add Pinctrl and GPIO support for HI3670 SoC

On Wed, Oct 31, 2018 at 10:43:00AM +0100, Linus Walleij wrote: > On Tue, Oct 23, 2018 at 9:07 PM Manivannan Sadhasivam > wrote: > > > This patchset adds Pinctrl and GPIO support for HI3670 SoC from HiSilicon > > found in the HiKey970 developement board. Also, the remaining UARTs are > > enabled

[PATCH v2 3/3] ASoC: pcm3060: Rename output widgets

In the initial commit [1], I added differential output of the codec as separate `+` and `-` widgets: OUTL+ OUTR+ OUTL- OUTR- Later, in the commit [2], I added a device tree property to configure the output as single-ended or differential. Having this property, the `+` and `-` separation in

[PATCH v2 3/3] ASoC: pcm3060: Rename output widgets

In the initial commit [1], I added differential output of the codec as separate `+` and `-` widgets: OUTL+ OUTR+ OUTL- OUTR- Later, in the commit [2], I added a device tree property to configure the output as single-ended or differential. Having this property, the `+` and `-` separation in

[PATCH v2 1/3] dt-bindings: sound: Add documentation for pcm3060 property out-single-ended

Output of pcm3060 codec may be configured as single-ended or differential Signed-off-by: Kirill Marinushkin Cc: devicet...@vger.kernel.org --- Documentation/devicetree/bindings/sound/pcm3060.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git

[PATCH v2 2/3] ASoC: pcm3060: Add DT property for single-ended output

DAC output may be differential (default) or single-ended. Signed-off-by: Kirill Marinushkin --- sound/soc/codecs/pcm3060.c | 14 ++ sound/soc/codecs/pcm3060.h | 1 + 2 files changed, 15 insertions(+) diff --git a/sound/soc/codecs/pcm3060.c b/sound/soc/codecs/pcm3060.c index

[PATCH v2 1/3] dt-bindings: sound: Add documentation for pcm3060 property out-single-ended

Output of pcm3060 codec may be configured as single-ended or differential Signed-off-by: Kirill Marinushkin Cc: devicet...@vger.kernel.org --- Documentation/devicetree/bindings/sound/pcm3060.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git

[PATCH v2 2/3] ASoC: pcm3060: Add DT property for single-ended output

DAC output may be differential (default) or single-ended. Signed-off-by: Kirill Marinushkin --- sound/soc/codecs/pcm3060.c | 14 ++ sound/soc/codecs/pcm3060.h | 1 + 2 files changed, 15 insertions(+) diff --git a/sound/soc/codecs/pcm3060.c b/sound/soc/codecs/pcm3060.c index

Re: [PATCH V4 2/2] mmc: sdhci-msm: Re-initialize DLL if MCLK is gated dynamically

Please ignore this patch set. Right patch-set is V5. https://patchwork.kernel.org/project/linux-mmc/list/?series=41661 Sorry for the inconvenience. Thanks Veera On 11/12/2018 11:52 AM, Veerabhadrarao Badiganti wrote: On few SDHCI-MSM controllers, the host controller's clock tuning

Re: [PATCH V4 2/2] mmc: sdhci-msm: Re-initialize DLL if MCLK is gated dynamically

Please ignore this patch set. Right patch-set is V5. https://patchwork.kernel.org/project/linux-mmc/list/?series=41661 Sorry for the inconvenience. Thanks Veera On 11/12/2018 11:52 AM, Veerabhadrarao Badiganti wrote: On few SDHCI-MSM controllers, the host controller's clock tuning

Re: [PATCH V4 1/2] dt-bindings: mmc: sdhci-msm: Add SoC-specific compatible strings

Please ignore this patch set. Right patch-set is V5. https://patchwork.kernel.org/project/linux-mmc/list/?series=41661 Sorry for the inconvenience. Thanks Veera On 11/12/2018 11:26 AM, Veerabhadrarao Badiganti wrote: Add SoC-specific compatible strings for qcom-sdhci controller.

Re: [PATCH V4 1/2] dt-bindings: mmc: sdhci-msm: Add SoC-specific compatible strings

Please ignore this patch set. Right patch-set is V5. https://patchwork.kernel.org/project/linux-mmc/list/?series=41661 Sorry for the inconvenience. Thanks Veera On 11/12/2018 11:26 AM, Veerabhadrarao Badiganti wrote: Add SoC-specific compatible strings for qcom-sdhci controller.

Re: [PATCH V2 2/2] mmc: sdhci-msm: Re-initialize DLL if MCLK is gated dynamically

Please ignore this patch set. Right patch-set is V5. https://patchwork.kernel.org/project/linux-mmc/list/?series=41661 Sorry for the inconvenience. Thanks Veera On 11/12/2018 12:08 PM, Veerabhadrarao Badiganti wrote: On few SDHCI-MSM controllers, the host controller's clock tuning

Re: [PATCH] sched/rt: Introduce prio_{higher,lower}() helper for comparing RT task prority

* Peter Zijlstra wrote: > I think you only need the less thing, because: > > static inline bool prio_lower(int a, int b) > { > return a > b; > } I'd say that should be named rt_prio_lower(), even if it's local to sched/rt.c, right? Thanks, Ingo

Re: [PATCH] sched/rt: Introduce prio_{higher,lower}() helper for comparing RT task prority

* Peter Zijlstra wrote: > I think you only need the less thing, because: > > static inline bool prio_lower(int a, int b) > { > return a > b; > } I'd say that should be named rt_prio_lower(), even if it's local to sched/rt.c, right? Thanks, Ingo

Re: [PATCH V2 2/2] mmc: sdhci-msm: Re-initialize DLL if MCLK is gated dynamically

Please ignore this patch set. Right patch-set is V5. https://patchwork.kernel.org/project/linux-mmc/list/?series=41661 Sorry for the inconvenience. Thanks Veera On 11/12/2018 12:08 PM, Veerabhadrarao Badiganti wrote: On few SDHCI-MSM controllers, the host controller's clock tuning

Re: [PATCH 05/17] clocksource: bcm2835: Switch to SPDX identifier

On 10/11/2018 16:28, Stefan Wahren wrote: > Adopt the SPDX license identifier headers to ease license compliance > management. Also drop the FSF address. > > Cc: Simon Arlott > Signed-off-by: Stefan Wahren > --- Acked-by: Daniel Lezcano -- Linaro.org │ Open source

Re: [PATCH 05/17] clocksource: bcm2835: Switch to SPDX identifier

On 10/11/2018 16:28, Stefan Wahren wrote: > Adopt the SPDX license identifier headers to ease license compliance > management. Also drop the FSF address. > > Cc: Simon Arlott > Signed-off-by: Stefan Wahren > --- Acked-by: Daniel Lezcano -- Linaro.org │ Open source

Re: [PATCH V2 1/2] dt-bindings: mmc: sdhci-msm: Add SoC-specific compatible strings

Please ignore this patch set. Right patch-set is V5. https://patchwork.kernel.org/project/linux-mmc/list/?series=41661 Sorry for the inconvenience. Thanks Veera On 11/12/2018 12:08 PM, Veerabhadrarao Badiganti wrote: Add SoC-specific compatible strings for qcom-sdhci controller.

Re: [PATCH V2 1/2] dt-bindings: mmc: sdhci-msm: Add SoC-specific compatible strings

Please ignore this patch set. Right patch-set is V5. https://patchwork.kernel.org/project/linux-mmc/list/?series=41661 Sorry for the inconvenience. Thanks Veera On 11/12/2018 12:08 PM, Veerabhadrarao Badiganti wrote: Add SoC-specific compatible strings for qcom-sdhci controller.

[PATCH V5 2/2] mmc: sdhci-msm: Re-initialize DLL if MCLK is gated dynamically

On few SDHCI-MSM controllers, the host controller's clock tuning circuit may go out of sync if controller clocks are gated which eventually will result in data CRC, command CRC/timeout errors. To overcome this h/w limitation, the DLL needs to be re-initialized and restored with its old settings

[PATCH V5 0/2] Re-initialize DLL when MCLK is gated dynamically

On few SDHCI-MSM controllers, the host controller's clock tuning circuit may go out of sync if controller clocks are gated which eventually, result in data CRC and command CRC/timeout errors. To fix this issue, the DLL needs to be re-initialized and restored with its old settings once clocks are

[PATCH V5 1/2] dt-bindings: mmc: sdhci-msm: Add SoC-specific compatible strings

Add SoC-specific compatible strings for qcom-sdhci controller. Signed-off-by: Veerabhadrarao Badiganti --- Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 21 + 1 file changed, 17 insertions(+), 4 deletions(-) diff --git

[PATCH V5 2/2] mmc: sdhci-msm: Re-initialize DLL if MCLK is gated dynamically

On few SDHCI-MSM controllers, the host controller's clock tuning circuit may go out of sync if controller clocks are gated which eventually will result in data CRC, command CRC/timeout errors. To overcome this h/w limitation, the DLL needs to be re-initialized and restored with its old settings

[PATCH V5 0/2] Re-initialize DLL when MCLK is gated dynamically

On few SDHCI-MSM controllers, the host controller's clock tuning circuit may go out of sync if controller clocks are gated which eventually, result in data CRC and command CRC/timeout errors. To fix this issue, the DLL needs to be re-initialized and restored with its old settings once clocks are

[PATCH V5 1/2] dt-bindings: mmc: sdhci-msm: Add SoC-specific compatible strings

Add SoC-specific compatible strings for qcom-sdhci controller. Signed-off-by: Veerabhadrarao Badiganti --- Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 21 + 1 file changed, 17 insertions(+), 4 deletions(-) diff --git

[PATCH] spi: lpspi: Add Slave Mode support for LPSPI

i.MX LPSPI controller only works in Master mode previously. This patch adds SPI slave mode support for i.MX7ulp and i.MX8qm/qxp in PIO mode. Currently SPI Slave mode support patch has the following limitations: 1. The stale data in RXFIFO will be dropped when the Slave does any new transfer.

[PATCH] spi: lpspi: Add Slave Mode support for LPSPI

i.MX LPSPI controller only works in Master mode previously. This patch adds SPI slave mode support for i.MX7ulp and i.MX8qm/qxp in PIO mode. Currently SPI Slave mode support patch has the following limitations: 1. The stale data in RXFIFO will be dropped when the Slave does any new transfer.

[PATCH V2 2/2] mmc: sdhci-msm: Re-initialize DLL if MCLK is gated dynamically

On few SDHCI-MSM controllers, the host controller's clock tuning circuit may go out of sync if controller clocks are gated which eventually will result in data CRC, command CRC/timeout errors. To overcome this h/w limitation, the DLL needs to be re-initialized and restored with its old settings

[PATCH V2 2/2] mmc: sdhci-msm: Re-initialize DLL if MCLK is gated dynamically

On few SDHCI-MSM controllers, the host controller's clock tuning circuit may go out of sync if controller clocks are gated which eventually will result in data CRC, command CRC/timeout errors. To overcome this h/w limitation, the DLL needs to be re-initialized and restored with its old settings

[PATCH V2 1/2] dt-bindings: mmc: sdhci-msm: Add SoC-specific compatible strings

Add SoC-specific compatible strings for qcom-sdhci controller. Signed-off-by: Veerabhadrarao Badiganti --- Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 21 + 1 file changed, 17 insertions(+), 4 deletions(-) diff --git

[PATCH V2 1/2] dt-bindings: mmc: sdhci-msm: Add SoC-specific compatible strings

Add SoC-specific compatible strings for qcom-sdhci controller. Signed-off-by: Veerabhadrarao Badiganti --- Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 21 + 1 file changed, 17 insertions(+), 4 deletions(-) diff --git

[PATCH V2 0/2] Re-initialize DLL when MCLK is gated dynamically

On few SDHCI-MSM controllers, the host controller's clock tuning circuit may go out of sync if controller clocks are gated which eventually, result in data CRC and command CRC/timeout errors. To fix this issue, the DLL needs to be re-initialized and restored with its old settings once clocks are

[PATCH V2 0/2] Re-initialize DLL when MCLK is gated dynamically

On few SDHCI-MSM controllers, the host controller's clock tuning circuit may go out of sync if controller clocks are gated which eventually, result in data CRC and command CRC/timeout errors. To fix this issue, the DLL needs to be re-initialized and restored with its old settings once clocks are

Re: [RFC PATCH 00/12] locking/lockdep: Add a new class of terminal locks

* Josh Poimboeuf wrote: > On Mon, Nov 12, 2018 at 06:10:33AM +0100, Ingo Molnar wrote: > > > > * Waiman Long wrote: > > > > > On 11/10/2018 09:10 AM, Peter Zijlstra wrote: > > > > On Fri, Nov 09, 2018 at 09:04:12AM +0100, Ingo Molnar wrote: > > > >> BTW., if you are interested in more

Re: [RFC PATCH 00/12] locking/lockdep: Add a new class of terminal locks

* Josh Poimboeuf wrote: > On Mon, Nov 12, 2018 at 06:10:33AM +0100, Ingo Molnar wrote: > > > > * Waiman Long wrote: > > > > > On 11/10/2018 09:10 AM, Peter Zijlstra wrote: > > > > On Fri, Nov 09, 2018 at 09:04:12AM +0100, Ingo Molnar wrote: > > > >> BTW., if you are interested in more

Re: [PATCH] riscv: add S and U modes to ISA string

On Sun, Nov 11, 2018 at 11:14 PM Palmer Dabbelt wrote: > > On Sat, 10 Nov 2018 00:35:15 PST (-0800), m...@packi.ch wrote: > > On 10.11.18 07:45, David Abdurachmanov wrote: > >> > >> The patch adds the missing S and U modes. > > > > This is the same patch I submitted earlier (see v2 here [1],

Re: [PATCH] riscv: add S and U modes to ISA string

On Sun, Nov 11, 2018 at 11:14 PM Palmer Dabbelt wrote: > > On Sat, 10 Nov 2018 00:35:15 PST (-0800), m...@packi.ch wrote: > > On 10.11.18 07:45, David Abdurachmanov wrote: > >> > >> The patch adds the missing S and U modes. > > > > This is the same patch I submitted earlier (see v2 here [1],

Re: [PATCH v4 1/4] mm: reference totalram_pages and managed_pages once per function

Hello Matthew, Thanks for reviewing. On 2018-11-12 11:43, Matthew Wilcox wrote: On Mon, Nov 12, 2018 at 11:37:46AM +0530, Arun KS wrote: +++ b/arch/um/kernel/mem.c @@ -51,8 +51,7 @@ void __init mem_init(void) /* this will put all low memory onto the freelists */

Re: [PATCH v4 1/4] mm: reference totalram_pages and managed_pages once per function

Hello Matthew, Thanks for reviewing. On 2018-11-12 11:43, Matthew Wilcox wrote: On Mon, Nov 12, 2018 at 11:37:46AM +0530, Arun KS wrote: +++ b/arch/um/kernel/mem.c @@ -51,8 +51,7 @@ void __init mem_init(void) /* this will put all low memory onto the freelists */

[PATCH V4 2/2] mmc: sdhci-msm: Re-initialize DLL if MCLK is gated dynamically

On few SDHCI-MSM controllers, the host controller's clock tuning circuit may go out of sync if controller clocks are gated which eventually will result in data CRC, command CRC/timeout errors. To overcome this h/w limitation, the DLL needs to be re-initialized and restored with its old settings

[PATCH V4 2/2] mmc: sdhci-msm: Re-initialize DLL if MCLK is gated dynamically

On few SDHCI-MSM controllers, the host controller's clock tuning circuit may go out of sync if controller clocks are gated which eventually will result in data CRC, command CRC/timeout errors. To overcome this h/w limitation, the DLL needs to be re-initialized and restored with its old settings

Re: [PATCH 1/2] RISC-V: Request stat64 on RV32

On Mon, Nov 12, 2018 at 5:10 AM Zong Li wrote: > > The stat64 family that is used on 32-bit architectures to replace > newstat. > > Since commit 67314ec7b0250290cc85eaa7a2f88a8ddb9e8547 ("RISC-V: Request > newstat syscalls"), the RV32 build fail with undeclared 'sys_fstatat64' > > Signed-off-by:

Re: [PATCH 1/2] RISC-V: Request stat64 on RV32

On Mon, Nov 12, 2018 at 5:10 AM Zong Li wrote: > > The stat64 family that is used on 32-bit architectures to replace > newstat. > > Since commit 67314ec7b0250290cc85eaa7a2f88a8ddb9e8547 ("RISC-V: Request > newstat syscalls"), the RV32 build fail with undeclared 'sys_fstatat64' > > Signed-off-by:

Re: [PATCH v4 1/4] mm: reference totalram_pages and managed_pages once per function

On Mon, Nov 12, 2018 at 11:37:46AM +0530, Arun KS wrote: > +++ b/arch/um/kernel/mem.c > @@ -51,8 +51,7 @@ void __init mem_init(void) > > /* this will put all low memory onto the freelists */ > memblock_free_all(); > - max_low_pfn = totalram_pages; > - max_pfn =

Re: [PATCH v4 1/4] mm: reference totalram_pages and managed_pages once per function

On Mon, Nov 12, 2018 at 11:37:46AM +0530, Arun KS wrote: > +++ b/arch/um/kernel/mem.c > @@ -51,8 +51,7 @@ void __init mem_init(void) > > /* this will put all low memory onto the freelists */ > memblock_free_all(); > - max_low_pfn = totalram_pages; > - max_pfn =

Re: [GIT PULL] ARM: SoC fixes

On Sat, Nov 10, 2018 at 10:09:19AM -0800, Olof Johansson wrote: > On Thu, Nov 8, 2018 at 7:49 AM Tony Lindgren wrote: > > > > * Olof Johansson [181107 09:28]: > > > On Wed, Nov 7, 2018 at 9:17 AM Linus Torvalds > > > wrote: > > > > > > > > On Wed, Nov 7, 2018 at 9:10 AM Olof Johansson wrote: >

Re: [GIT PULL] ARM: SoC fixes

On Sat, Nov 10, 2018 at 10:09:19AM -0800, Olof Johansson wrote: > On Thu, Nov 8, 2018 at 7:49 AM Tony Lindgren wrote: > > > > * Olof Johansson [181107 09:28]: > > > On Wed, Nov 7, 2018 at 9:17 AM Linus Torvalds > > > wrote: > > > > > > > > On Wed, Nov 7, 2018 at 9:10 AM Olof Johansson wrote: >

[PATCH v4 3/4] mm: convert totalram_pages and totalhigh_pages variables to atomic

totalram_pages and totalhigh_pages are made static inline function. Main motivation was that managed_page_count_lock handling was complicating things. It was discussed in lenght here, https://lore.kernel.org/patchwork/patch/995739/#1181785 So it seemes better to remove the lock and convert

[PATCH v4 1/4] mm: reference totalram_pages and managed_pages once per function

This patch is in preparation to a later patch which converts totalram_pages and zone->managed_pages to atomic variables. Please note that re-reading the value might lead to a different value and as such it could lead to unexpected behavior. There are no known bugs as a result of the current code

[PATCH v4 1/4] mm: reference totalram_pages and managed_pages once per function

This patch is in preparation to a later patch which converts totalram_pages and zone->managed_pages to atomic variables. Please note that re-reading the value might lead to a different value and as such it could lead to unexpected behavior. There are no known bugs as a result of the current code

[PATCH v4 3/4] mm: convert totalram_pages and totalhigh_pages variables to atomic

totalram_pages and totalhigh_pages are made static inline function. Main motivation was that managed_page_count_lock handling was complicating things. It was discussed in lenght here, https://lore.kernel.org/patchwork/patch/995739/#1181785 So it seemes better to remove the lock and convert

[PATCH v4 2/4] mm: convert zone->managed_pages to atomic variable

totalram_pages, zone->managed_pages and totalhigh_pages updates are protected by managed_page_count_lock, but readers never care about it. Convert these variables to atomic to avoid readers potentially seeing a store tear. This patch converts zone->managed_pages. Subsequent patches will convert

[PATCH v4 4/4] mm: Remove managed_page_count spinlock

Now that totalram_pages and managed_pages are atomic varibles, no need of managed_page_count spinlock. The lock had really a weak consistency guarantee. It hasn't been used for anything but the update but no reader actually cares about all the values being updated to be in sync. Signed-off-by:

[PATCH v4 0/4] mm: convert totalram_pages, totalhigh_pages and managed pages to atomic

This series convert totalram_pages, totalhigh_pages and zone->managed_pages to atomic variables. The patch was comiple tested on x86(x86_64_defconfig & i386_defconfig) on 4.20-rc2. And memory hotplug tested on arm64, but on an older version of kernel. totalram_pages, zone->managed_pages and

[PATCH v4 2/4] mm: convert zone->managed_pages to atomic variable

totalram_pages, zone->managed_pages and totalhigh_pages updates are protected by managed_page_count_lock, but readers never care about it. Convert these variables to atomic to avoid readers potentially seeing a store tear. This patch converts zone->managed_pages. Subsequent patches will convert

[PATCH v4 4/4] mm: Remove managed_page_count spinlock

Now that totalram_pages and managed_pages are atomic varibles, no need of managed_page_count spinlock. The lock had really a weak consistency guarantee. It hasn't been used for anything but the update but no reader actually cares about all the values being updated to be in sync. Signed-off-by:

[PATCH v4 0/4] mm: convert totalram_pages, totalhigh_pages and managed pages to atomic

This series convert totalram_pages, totalhigh_pages and zone->managed_pages to atomic variables. The patch was comiple tested on x86(x86_64_defconfig & i386_defconfig) on 4.20-rc2. And memory hotplug tested on arm64, but on an older version of kernel. totalram_pages, zone->managed_pages and

Re: [PATCH] PCI: assign bus numbers present in EA capability for bridges

Hi, Any comments? Thanks, Sundeep On Thu, Nov 1, 2018 at 3:01 PM wrote: > > From: Subbaraya Sundeep > > As per the spec, bridges with EA capability work > with fixed secondary and subordinate bus numbers. > Hence assign bus numbers to bridges from EA if the > capability exists. > >

Re: [PATCH] PCI: assign bus numbers present in EA capability for bridges

Hi, Any comments? Thanks, Sundeep On Thu, Nov 1, 2018 at 3:01 PM wrote: > > From: Subbaraya Sundeep > > As per the spec, bridges with EA capability work > with fixed secondary and subordinate bus numbers. > Hence assign bus numbers to bridges from EA if the > capability exists. > >

[tip:sched/core] sched/fair: Make some variables static

Commit-ID: ed8885a14433aec04067463493051eaaeef3255f Gitweb: https://git.kernel.org/tip/ed8885a14433aec04067463493051eaaeef3255f Author: Muchun Song AuthorDate: Sat, 10 Nov 2018 15:52:02 +0800 Committer: Ingo Molnar CommitDate: Mon, 12 Nov 2018 06:18:15 +0100 sched/fair: Make some

[tip:sched/core] sched/core: Create task_has_idle_policy() helper

Commit-ID: 1da1843f9f0334e2428308945d396ffecc2acfe1 Gitweb: https://git.kernel.org/tip/1da1843f9f0334e2428308945d396ffecc2acfe1 Author: Viresh Kumar AuthorDate: Mon, 5 Nov 2018 16:51:55 +0530 Committer: Ingo Molnar CommitDate: Mon, 12 Nov 2018 06:17:52 +0100 sched/core: Create

[tip:sched/core] sched/fair: Make some variables static

Commit-ID: ed8885a14433aec04067463493051eaaeef3255f Gitweb: https://git.kernel.org/tip/ed8885a14433aec04067463493051eaaeef3255f Author: Muchun Song AuthorDate: Sat, 10 Nov 2018 15:52:02 +0800 Committer: Ingo Molnar CommitDate: Mon, 12 Nov 2018 06:18:15 +0100 sched/fair: Make some

[tip:sched/core] sched/core: Create task_has_idle_policy() helper

Commit-ID: 1da1843f9f0334e2428308945d396ffecc2acfe1 Gitweb: https://git.kernel.org/tip/1da1843f9f0334e2428308945d396ffecc2acfe1 Author: Viresh Kumar AuthorDate: Mon, 5 Nov 2018 16:51:55 +0530 Committer: Ingo Molnar CommitDate: Mon, 12 Nov 2018 06:17:52 +0100 sched/core: Create

[tip:sched/core] sched/fair: Mask UTIL_AVG_UNCHANGED usages

Commit-ID: 92a801e5d5b7a893881c1676b15dd246727ccd16 Gitweb: https://git.kernel.org/tip/92a801e5d5b7a893881c1676b15dd246727ccd16 Author: Patrick Bellasi AuthorDate: Mon, 5 Nov 2018 14:53:59 + Committer: Ingo Molnar CommitDate: Mon, 12 Nov 2018 06:17:52 +0100 sched/fair: Mask

[tip:sched/core] sched/fair: Mask UTIL_AVG_UNCHANGED usages

Commit-ID: 92a801e5d5b7a893881c1676b15dd246727ccd16 Gitweb: https://git.kernel.org/tip/92a801e5d5b7a893881c1676b15dd246727ccd16 Author: Patrick Bellasi AuthorDate: Mon, 5 Nov 2018 14:53:59 + Committer: Ingo Molnar CommitDate: Mon, 12 Nov 2018 06:17:52 +0100 sched/fair: Mask

[tip:perf/urgent] perf/x86/intel/uncore: Support CoffeeLake 8th CBOX

Commit-ID: 4d47d6407ac7b4b442a4e717488a3bb137398b6c Gitweb: https://git.kernel.org/tip/4d47d6407ac7b4b442a4e717488a3bb137398b6c Author: Kan Liang AuthorDate: Fri, 19 Oct 2018 10:04:19 -0700 Committer: Ingo Molnar CommitDate: Mon, 12 Nov 2018 05:03:26 +0100 perf/x86/intel/uncore:

[tip:perf/urgent] perf/x86/intel/uncore: Support CoffeeLake 8th CBOX

Commit-ID: 4d47d6407ac7b4b442a4e717488a3bb137398b6c Gitweb: https://git.kernel.org/tip/4d47d6407ac7b4b442a4e717488a3bb137398b6c Author: Kan Liang AuthorDate: Fri, 19 Oct 2018 10:04:19 -0700 Committer: Ingo Molnar CommitDate: Mon, 12 Nov 2018 05:03:26 +0100 perf/x86/intel/uncore:

[tip:perf/urgent] perf/x86/intel/uncore: Add more IMC PCI IDs for KabyLake and CoffeeLake CPUs

Commit-ID: c10a8de0d32e95b0b8c7c17b6dc09baea5a5a899 Gitweb: https://git.kernel.org/tip/c10a8de0d32e95b0b8c7c17b6dc09baea5a5a899 Author: Kan Liang AuthorDate: Fri, 19 Oct 2018 10:04:18 -0700 Committer: Ingo Molnar CommitDate: Mon, 12 Nov 2018 05:03:24 +0100 perf/x86/intel/uncore: Add

Re: crashkernel=512M is no longer working on this aarch64 server

On Sun, 11 Nov 2018 08:36:09 -0500 Qian Cai wrote: > > On Nov 11, 2018, at 6:35 AM, Martin Schwidefsky > > wrote: > > > > On Sat, 10 Nov 2018 23:41:34 -0500 > > Qian Cai wrote: > > > >> It was broken somewhere between b00d209241ff and 3541833fd1f2. > >> > >> [0.00] cannot

[tip:perf/urgent] perf/x86/intel/uncore: Add more IMC PCI IDs for KabyLake and CoffeeLake CPUs

Commit-ID: c10a8de0d32e95b0b8c7c17b6dc09baea5a5a899 Gitweb: https://git.kernel.org/tip/c10a8de0d32e95b0b8c7c17b6dc09baea5a5a899 Author: Kan Liang AuthorDate: Fri, 19 Oct 2018 10:04:18 -0700 Committer: Ingo Molnar CommitDate: Mon, 12 Nov 2018 05:03:24 +0100 perf/x86/intel/uncore: Add

Re: crashkernel=512M is no longer working on this aarch64 server

On Sun, 11 Nov 2018 08:36:09 -0500 Qian Cai wrote: > > On Nov 11, 2018, at 6:35 AM, Martin Schwidefsky > > wrote: > > > > On Sat, 10 Nov 2018 23:41:34 -0500 > > Qian Cai wrote: > > > >> It was broken somewhere between b00d209241ff and 3541833fd1f2. > >> > >> [0.00] cannot

[PATCH 3/4] dt-bindings: rtc: sd3078: add device tree documentation

The devicetree documentation for the SD3078 device tree binding is added with a short example. Signed-off-by: zoro --- .../devicetree/bindings/rtc/rtc-sd3078.txt | 15 +++ MAINTAINERS|1 + 2 files changed, 16 insertions(+)

[PATCH 2/4] rtc: sd3078: new driver.

The sd3078 is a combination RTC and SRAM device with I2C interface. Signed-off-by: zoro --- MAINTAINERS |6 ++ drivers/rtc/Kconfig |9 ++ drivers/rtc/Makefile |1 + drivers/rtc/rtc-sd3078.c | 235 ++ 4 files changed,

[PATCH 3/4] dt-bindings: rtc: sd3078: add device tree documentation

The devicetree documentation for the SD3078 device tree binding is added with a short example. Signed-off-by: zoro --- .../devicetree/bindings/rtc/rtc-sd3078.txt | 15 +++ MAINTAINERS|1 + 2 files changed, 16 insertions(+)

[PATCH 2/4] rtc: sd3078: new driver.

The sd3078 is a combination RTC and SRAM device with I2C interface. Signed-off-by: zoro --- MAINTAINERS |6 ++ drivers/rtc/Kconfig |9 ++ drivers/rtc/Makefile |1 + drivers/rtc/rtc-sd3078.c | 235 ++ 4 files changed,

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