A double pointer is used in map__find() where a single pointer is enough
because the function doesn't affect the rbtree and the rbtree is locked.
Signed-off-by: Eric Saint-Etienne
---
tools/perf/util/map.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git
A double pointer is used in map__find() where a single pointer is enough
because the function doesn't affect the rbtree and the rbtree is locked.
Signed-off-by: Eric Saint-Etienne
---
tools/perf/util/map.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git
On 23/11/18 09:57, h...@zytor.com wrote:
On November 23, 2018 1:27:02 AM PST, Julien Thierry
wrote:
Hi,
I made an attempt at implementing the
user_access_begin()/user_access_end() macros along with the
get/put_user_unsafe() for arm64 by toggling the status of PAN (more or
less similar to
On 23/11/18 09:57, h...@zytor.com wrote:
On November 23, 2018 1:27:02 AM PST, Julien Thierry
wrote:
Hi,
I made an attempt at implementing the
user_access_begin()/user_access_end() macros along with the
get/put_user_unsafe() for arm64 by toggling the status of PAN (more or
less similar to
The devicetree documentation for the SD3078 device tree
binding is added with a short example.
Signed-off-by: zoro
---
.../devicetree/bindings/rtc/rtc-sd3078.txt | 13 +
1 file changed, 13 insertions(+)
create mode 100644
The devicetree documentation for the SD3078 device tree
binding is added with a short example.
Signed-off-by: zoro
---
.../devicetree/bindings/rtc/rtc-sd3078.txt | 13 +
1 file changed, 13 insertions(+)
create mode 100644
Introduce vendor prefix for whwave, Inc.
for SD3078 rtc device.
Signed-off-by: zoro
---
.../devicetree/bindings/vendor-prefixes.txt|1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
The sd3078 is a combination RTC and SRAM device with I2C interface.
Signed-off-by: zoro
---
MAINTAINERS |6 ++
drivers/rtc/Kconfig |9 ++
drivers/rtc/Makefile |1 +
drivers/rtc/rtc-sd3078.c | 232 ++
4 files changed,
Introduce vendor prefix for whwave, Inc.
for SD3078 rtc device.
Signed-off-by: zoro
---
.../devicetree/bindings/vendor-prefixes.txt|1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
The sd3078 is a combination RTC and SRAM device with I2C interface.
Signed-off-by: zoro
---
MAINTAINERS |6 ++
drivers/rtc/Kconfig |9 ++
drivers/rtc/Makefile |1 +
drivers/rtc/rtc-sd3078.c | 232 ++
4 files changed,
From: David Laight
> Sent: 23 November 2018 09:35
> From: Linus Torvalds
> > Sent: 22 November 2018 18:58
> ...
> > Oh, and I just noticed that on x86 we expressly use our old "safe and
> > sane" functions: see __inline_memcpy(), and its use in
> > __memcpy_{from,to}io().
> >
> > So the "falls
From: David Laight
> Sent: 23 November 2018 09:35
> From: Linus Torvalds
> > Sent: 22 November 2018 18:58
> ...
> > Oh, and I just noticed that on x86 we expressly use our old "safe and
> > sane" functions: see __inline_memcpy(), and its use in
> > __memcpy_{from,to}io().
> >
> > So the "falls
Hi Linus,
Please pull from the tag
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
acpi-4.20-rc4
with top-most commit 2bbb5fa37475d7aa5fa62f34db1623f3da2dfdfa
ACPI / platform: Add SMB0001 HID to forbidden_id_list
on top of commit 9ff01193a20d391e8dbce4403dd5ef87c7eaaca6
Hi Linus,
Please pull from the tag
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
acpi-4.20-rc4
with top-most commit 2bbb5fa37475d7aa5fa62f34db1623f3da2dfdfa
ACPI / platform: Add SMB0001 HID to forbidden_id_list
on top of commit 9ff01193a20d391e8dbce4403dd5ef87c7eaaca6
Hi Linus,
Please pull from the tag
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
pm-4.20-rc4
with top-most commit 1d50088ca3956e5dcd2751a658e7869b9af10bb4
Merge branches 'pm-cpufreq' and 'pm-sleep'
on top of commit 9ff01193a20d391e8dbce4403dd5ef87c7eaaca6
Linux
Hi Linus,
Please pull from the tag
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
pm-4.20-rc4
with top-most commit 1d50088ca3956e5dcd2751a658e7869b9af10bb4
Merge branches 'pm-cpufreq' and 'pm-sleep'
on top of commit 9ff01193a20d391e8dbce4403dd5ef87c7eaaca6
Linux
On 22-11-18, 13:36, Daniel Lezcano wrote:
> In the case of asymmetric SoC with the same micro-architecture, we
> have a group of CPUs with smaller OPPs than the other group. One
> example is the 96boards dragonboard 820c. There is no dmips/MHz
> difference between both groups, so no need to
On 22-11-18, 13:36, Daniel Lezcano wrote:
> In the case of asymmetric SoC with the same micro-architecture, we
> have a group of CPUs with smaller OPPs than the other group. One
> example is the 96boards dragonboard 820c. There is no dmips/MHz
> difference between both groups, so no need to
Hi Chanwoo Choi,
On 11/23/18 12:54 AM, Chanwoo Choi wrote:
> Hi Lukasz,
>
> I add one more comment about devfreq_resume_device().
>
> On 2018년 11월 22일 20:00, Lukasz Luba wrote:
>>
>>
>> On 11/22/18 3:58 AM, Chanwoo Choi wrote:
>>> On 2018년 11월 22일 03:01, Lukasz Luba wrote:
The patch adds
Hi Chanwoo Choi,
On 11/23/18 12:54 AM, Chanwoo Choi wrote:
> Hi Lukasz,
>
> I add one more comment about devfreq_resume_device().
>
> On 2018년 11월 22일 20:00, Lukasz Luba wrote:
>>
>>
>> On 11/22/18 3:58 AM, Chanwoo Choi wrote:
>>> On 2018년 11월 22일 03:01, Lukasz Luba wrote:
The patch adds
Hi Geert,
On 23 November 2018 09:41 Geert Uytterhoeven wrote:
> Subject: Re: [PATCH] pinctrl: rzn1: Fix check for used MDIO bus
> On Mon, Nov 19, 2018 at 5:18 PM Phil Edworthy wrote:
> > This fixes the check for unused mdio bus setting and the following
> > static checker warning:
> >
Hi Geert,
On 23 November 2018 09:41 Geert Uytterhoeven wrote:
> Subject: Re: [PATCH] pinctrl: rzn1: Fix check for used MDIO bus
> On Mon, Nov 19, 2018 at 5:18 PM Phil Edworthy wrote:
> > This fixes the check for unused mdio bus setting and the following
> > static checker warning:
> >
When the kernel is compiled with -ffunction-sections and perf uses the
kernel debuginfo, perf fails the very first symbol lookup and ends up with
an hex offset inside [kernel.vmlinux]. It's due to how perf loads the maps.
Indeed only .text gets loaded by map_groups__find() into al->map.
When the kernel is compiled with -ffunction-sections and perf uses the
kernel debuginfo, perf fails the very first symbol lookup and ends up with
an hex offset inside [kernel.vmlinux]. It's due to how perf loads the maps.
Indeed only .text gets loaded by map_groups__find() into al->map.
The interrupt handler contains a workaround for RX hang applicable
to Zynq and AT91 only. Subsequent versions do not need this
workaround. This workaround unecessarily reset RX whenever RX used
bit read is observed, which can be often under heavy traffic.Hence
introduce an errata field and a check
The interrupt handler contains a workaround for RX hang applicable
to Zynq and AT91 only. Subsequent versions do not need this
workaround. This workaround unecessarily reset RX whenever RX used
bit read is observed, which can be often under heavy traffic.Hence
introduce an errata field and a check
On 21/11/2018 19:06, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.83 release.
> There are 21 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
On 21/11/2018 19:06, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.83 release.
> There are 21 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
Hi Chanwoo Choi,
On 11/23/18 12:45 AM, Chanwoo Choi wrote:
> Hi Lukasz,
>
> On 2018년 11월 22일 19:40, Lukasz Luba wrote:
>> Hi Chanwoo Choi
>>
>> On 11/22/18 3:52 AM, Chanwoo Choi wrote:
>>> On 2018년 11월 22일 03:01, Lukasz Luba wrote:
The refactoring is needed for the new client in devfreq:
Hi Chanwoo Choi,
On 11/23/18 12:45 AM, Chanwoo Choi wrote:
> Hi Lukasz,
>
> On 2018년 11월 22일 19:40, Lukasz Luba wrote:
>> Hi Chanwoo Choi
>>
>> On 11/22/18 3:52 AM, Chanwoo Choi wrote:
>>> On 2018년 11월 22일 03:01, Lukasz Luba wrote:
The refactoring is needed for the new client in devfreq:
On November 23, 2018 1:27:02 AM PST, Julien Thierry
wrote:
>Hi,
>
>I made an attempt at implementing the
>user_access_begin()/user_access_end() macros along with the
>get/put_user_unsafe() for arm64 by toggling the status of PAN (more or
>less similar to x86's STAC/CTAC).
>
>With a small
On November 23, 2018 1:27:02 AM PST, Julien Thierry
wrote:
>Hi,
>
>I made an attempt at implementing the
>user_access_begin()/user_access_end() macros along with the
>get/put_user_unsafe() for arm64 by toggling the status of PAN (more or
>less similar to x86's STAC/CTAC).
>
>With a small
On Thu, Nov 22, 2018 at 9:38 PM Alexey Dobriyan wrote:
>
> On Thu, Nov 22, 2018 at 09:29:52PM +0800, Yafang Shao wrote:
> > On Thu, Nov 22, 2018 at 7:40 PM Alexey Dobriyan wrote:
> > >
> > > On Wed, Nov 21, 2018 at 07:28:44PM -0800, Andrew Morton wrote:
> > > > On Mon, 19 Nov 2018 19:17:52 +0800
On Thu, Nov 22, 2018 at 9:38 PM Alexey Dobriyan wrote:
>
> On Thu, Nov 22, 2018 at 09:29:52PM +0800, Yafang Shao wrote:
> > On Thu, Nov 22, 2018 at 7:40 PM Alexey Dobriyan wrote:
> > >
> > > On Wed, Nov 21, 2018 at 07:28:44PM -0800, Andrew Morton wrote:
> > > > On Mon, 19 Nov 2018 19:17:52 +0800
On 21/11/2018 19:06, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.139 release.
> There are 59 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
On 21/11/2018 19:06, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.139 release.
> There are 59 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
On 23-11-18, 14:41, Viresh Kumar wrote:
> On 22-11-18, 11:38, Viresh Kumar wrote:
> > So there are few complexities in the case where an OPP table points to
> > itself in
> > the required-opp field. I looked at solving it up in the opp core but that
> > gets
> > more and more messy.
> >
> > Now
On 23-11-18, 14:41, Viresh Kumar wrote:
> On 22-11-18, 11:38, Viresh Kumar wrote:
> > So there are few complexities in the case where an OPP table points to
> > itself in
> > the required-opp field. I looked at solving it up in the opp core but that
> > gets
> > more and more messy.
> >
> > Now
Hi,
On 19/11/18 4:38 PM, Shawn Guo wrote:
> It adds Synopsys 28nm Femto High-Speed USB PHY driver support, which
> is usually paired with Synopsys DWC3 USB controllers on Qualcomm SoCs.
>
> Signed-off-by: Shawn Guo
> ---
> drivers/phy/qualcomm/Kconfig | 10 +
>
Hi,
On 19/11/18 4:38 PM, Shawn Guo wrote:
> It adds Synopsys 28nm Femto High-Speed USB PHY driver support, which
> is usually paired with Synopsys DWC3 USB controllers on Qualcomm SoCs.
>
> Signed-off-by: Shawn Guo
> ---
> drivers/phy/qualcomm/Kconfig | 10 +
>
On 2018-11-22 17:04:19 [+0800], zhe...@windriver.com wrote:
> From: He Zhe
>
> kmemleak_lock, as a rwlock on RT, can possibly be held in atomic context and
> causes the follow BUG.
>
> BUG: scheduling while atomic: migration/15/132/0x0002
…
> Preemption disabled at:
> []
On 2018-11-22 17:04:19 [+0800], zhe...@windriver.com wrote:
> From: He Zhe
>
> kmemleak_lock, as a rwlock on RT, can possibly be held in atomic context and
> causes the follow BUG.
>
> BUG: scheduling while atomic: migration/15/132/0x0002
…
> Preemption disabled at:
> []
Add missing Netwwork on chip for g3d bus node using VDD_INI
for Exynos542x SoC.
- CLK_DOUT_ACLK_G3D for G3D's AXI
Cc: Chanwoo Choi
Signed-off-by: Anand Moon
---
arch/arm/boot/dts/exynos5420.dtsi | 57 +--
arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 5 ++
2
This allows changing the VPLL output frequency through the g3d subsystem
clock tree leaf clocks.
Cc: Andrzej Hajda
Cc: Chanwoo Choi
Signed-off-by: Anand Moon
---
drivers/clk/samsung/clk-exynos5420.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
From: Marian Mihailescu
A specific clock rate table is added for VPLL so it is possible
to set frequency of the VPLL output clock that used by the g3d clock.
Cc: Andrzej Hajda
Cc: Chanwoo Choi
Signed-off-by: Marian Mihailescu
Signed-off-by: Anand Moon
---
Add missing Netwwork on chip for g3d bus node using VDD_INI
for Exynos542x SoC.
- CLK_DOUT_ACLK_G3D for G3D's AXI
Cc: Chanwoo Choi
Signed-off-by: Anand Moon
---
arch/arm/boot/dts/exynos5420.dtsi | 57 +--
arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 5 ++
2
This allows changing the VPLL output frequency through the g3d subsystem
clock tree leaf clocks.
Cc: Andrzej Hajda
Cc: Chanwoo Choi
Signed-off-by: Anand Moon
---
drivers/clk/samsung/clk-exynos5420.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
From: Marian Mihailescu
A specific clock rate table is added for VPLL so it is possible
to set frequency of the VPLL output clock that used by the g3d clock.
Cc: Andrzej Hajda
Cc: Chanwoo Choi
Signed-off-by: Marian Mihailescu
Signed-off-by: Anand Moon
---
Hello Tudor,
On 22/11/2018 13:36, tudor.amba...@microchip.com wrote:
> From: Tudor Ambarus
>
> Bug reported for the out-of-tree S25FS128S flash memory.
>
> BFPT table advertises all the erase types supported by all the
> possible map configurations. Update the erase_type array to indicate
>
Hello Tudor,
On 22/11/2018 13:36, tudor.amba...@microchip.com wrote:
> From: Tudor Ambarus
>
> Bug reported for the out-of-tree S25FS128S flash memory.
>
> BFPT table advertises all the erase types supported by all the
> possible map configurations. Update the erase_type array to indicate
>
te to
> help improve the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Roger-Quadros/Add-support-for-TI-PRU-ICSS/20181123-083903
> base:
> https://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
> next
> config: arm-allmodconfig (attac
te to
> help improve the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Roger-Quadros/Add-support-for-TI-PRU-ICSS/20181123-083903
> base:
> https://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
> next
> config: arm-allmodconfig (attac
On Thu, Nov 22, 2018 at 6:30 PM Charles Keepax
wrote:
> Currently, a GPIO can be requested multiple times when the
> NONEXCLUSIVE flag is set, however it must still be freed a single
> time. This makes client code rather complex, since multiple drivers
> may request the GPIO but only a single
Hi Phil,
Thanks for your patch!
On Mon, Nov 19, 2018 at 5:18 PM Phil Edworthy wrote:
> This fixes the check for unused mdio bus setting and the following static
> checker warning:
> drivers/pinctrl/pinctrl-rzn1.c:198 rzn1_pinctrl_mdio_select()
> warn: always true condition
On Thu, Nov 22, 2018 at 6:30 PM Charles Keepax
wrote:
> Currently, a GPIO can be requested multiple times when the
> NONEXCLUSIVE flag is set, however it must still be freed a single
> time. This makes client code rather complex, since multiple drivers
> may request the GPIO but only a single
Hi Phil,
Thanks for your patch!
On Mon, Nov 19, 2018 at 5:18 PM Phil Edworthy wrote:
> This fixes the check for unused mdio bus setting and the following static
> checker warning:
> drivers/pinctrl/pinctrl-rzn1.c:198 rzn1_pinctrl_mdio_select()
> warn: always true condition
On 23/11/18 10:20, Arnd Bergmann wrote:
> On Thu, Nov 22, 2018 at 12:41 PM Roger Quadros wrote:
>
>> +
>> + if (IS_ERR_OR_NULL(rproc))
>> + return ERR_PTR(-EINVAL);
>
>
> Any usage of IS_ERR_OR_NULL() tends to be an indication of a badly
> designed API. Please change this
On 23/11/18 10:20, Arnd Bergmann wrote:
> On Thu, Nov 22, 2018 at 12:41 PM Roger Quadros wrote:
>
>> +
>> + if (IS_ERR_OR_NULL(rproc))
>> + return ERR_PTR(-EINVAL);
>
>
> Any usage of IS_ERR_OR_NULL() tends to be an indication of a badly
> designed API. Please change this
The Cygnus architecture use a Kona PWM. This is already present
in the device tree but can't be built actually. Hence, allow the
Kona PWM to be built for Cygnus arch.
Signed-off-by: Clément Péron
Reviewed-by: Florian Fainelli
Reviewed-by: Scott Branden
Acked-by: Uwe Kleine-König
---
With Micrel KSZ8061 PHY, the link may occasionally not come up after
Ethernet cable connect. The vendor's (Microchip, former Micrel) errata
sheet 8688A.pdf describes the problem and possible workarounds in
detail, see below.
The patch implements workaround 1, which permanently fixes the issue.
The Cygnus architecture use a Kona PWM. This is already present
in the device tree but can't be built actually. Hence, allow the
Kona PWM to be built for Cygnus arch.
Signed-off-by: Clément Péron
Reviewed-by: Florian Fainelli
Reviewed-by: Scott Branden
Acked-by: Uwe Kleine-König
---
With Micrel KSZ8061 PHY, the link may occasionally not come up after
Ethernet cable connect. The vendor's (Microchip, former Micrel) errata
sheet 8688A.pdf describes the problem and possible workarounds in
detail, see below.
The patch implements workaround 1, which permanently fixes the issue.
From: Linus Torvalds
> Sent: 22 November 2018 18:58
...
> Oh, and I just noticed that on x86 we expressly use our old "safe and
> sane" functions: see __inline_memcpy(), and its use in
> __memcpy_{from,to}io().
>
> So the "falls back to memcpy" was always a red herring. We don't
> actually do
From: Linus Torvalds
> Sent: 22 November 2018 18:58
...
> Oh, and I just noticed that on x86 we expressly use our old "safe and
> sane" functions: see __inline_memcpy(), and its use in
> __memcpy_{from,to}io().
>
> So the "falls back to memcpy" was always a red herring. We don't
> actually do
Hi Miquel,
On Fri, Nov 23, 2018 at 10:21:15AM +0100, Miquel Raynal wrote:
> Rename the mvebu_comhy_conf structure to be mvebu_comphy_conf, which is
> probably what the original author meant.
>
> Signed-off-by: Miquel Raynal
Acked-by: Antoine Tenart
Thanks!
Antoine
> ---
>
> Changes since
Hi Miquel,
On Fri, Nov 23, 2018 at 10:21:15AM +0100, Miquel Raynal wrote:
> Rename the mvebu_comhy_conf structure to be mvebu_comphy_conf, which is
> probably what the original author meant.
>
> Signed-off-by: Miquel Raynal
Acked-by: Antoine Tenart
Thanks!
Antoine
> ---
>
> Changes since
This adds a new helper to check whether the format described by its
fourcc code uses a YUV colorspace, by returning the is_yuv entry for
the DRM info entry matching that format.
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/drm_fourcc.c | 19 +++
include/drm/drm_fourcc.h
This adds a new helper to check whether the format described by its
fourcc code uses a YUV colorspace, by returning the is_yuv entry for
the DRM info entry matching that format.
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/drm_fourcc.c | 19 +++
include/drm/drm_fourcc.h
Hi,
On Thu, 22 Nov 2018 at 21:05, Uwe Kleine-König
wrote:
>
> Hello Clément,
>
> On Wed, Nov 21, 2018 at 01:35:08PM +0100, Clément Péron wrote:
> > The Cygnus architecture use a Kona PWM. This is already present
> > in the device tree but can't be built actually. Hence, allow the
> > Kona PWM to
This series implements support for YUV formats using the display engine
frontend in the sun4i DRM driver, with various fixes along the way.
Scaling is supported for every format handled by the frontend.
The tiling mode used by the VPU on Allwinner platforms is also supported
by this series and a
Hi,
On Thu, 22 Nov 2018 at 21:05, Uwe Kleine-König
wrote:
>
> Hello Clément,
>
> On Wed, Nov 21, 2018 at 01:35:08PM +0100, Clément Péron wrote:
> > The Cygnus architecture use a Kona PWM. This is already present
> > in the device tree but can't be built actually. Hence, allow the
> > Kona PWM to
This series implements support for YUV formats using the display engine
frontend in the sun4i DRM driver, with various fixes along the way.
Scaling is supported for every format handled by the frontend.
The tiling mode used by the VPU on Allwinner platforms is also supported
by this series and a
Hi Vivek, Will,
On Fri, Nov 23, 2018 at 6:13 PM Vivek Gautam
wrote:
>
> Hi Will,
>
> On Wed, Nov 21, 2018 at 11:09 PM Will Deacon wrote:
> >
> > [+Thor]
> >
> > On Fri, Nov 16, 2018 at 04:54:30PM +0530, Vivek Gautam wrote:
> > > qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
> > >
Hi Vivek, Will,
On Fri, Nov 23, 2018 at 6:13 PM Vivek Gautam
wrote:
>
> Hi Will,
>
> On Wed, Nov 21, 2018 at 11:09 PM Will Deacon wrote:
> >
> > [+Thor]
> >
> > On Fri, Nov 16, 2018 at 04:54:30PM +0530, Vivek Gautam wrote:
> > > qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
> > >
Hi,
I made an attempt at implementing the
user_access_begin()/user_access_end() macros along with the
get/put_user_unsafe() for arm64 by toggling the status of PAN (more or
less similar to x86's STAC/CTAC).
With a small mistake in my patch, we realized that directly calling
function that
From: Maxime Ripard
The COEF_RDY bit isn't found in all the SoCs featuring some variant of the
frontend.
Add it to our quirks structure.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun4i_frontend.c | 9 +
drivers/gpu/drm/sun4i/sun4i_frontend.h | 1 +
2 files changed, 6
This introduces support for packed YUV formats with 4:2:2 sampling using
the frontend. Definitions are introduced for the data format and pixel
sequence input format register values.
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/sun4i/sun4i_frontend.c | 22 ++
Hi,
I made an attempt at implementing the
user_access_begin()/user_access_end() macros along with the
get/put_user_unsafe() for arm64 by toggling the status of PAN (more or
less similar to x86's STAC/CTAC).
With a small mistake in my patch, we realized that directly calling
function that
From: Maxime Ripard
The COEF_RDY bit isn't found in all the SoCs featuring some variant of the
frontend.
Add it to our quirks structure.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun4i_frontend.c | 9 +
drivers/gpu/drm/sun4i/sun4i_frontend.h | 1 +
2 files changed, 6
This introduces support for packed YUV formats with 4:2:2 sampling using
the frontend. Definitions are introduced for the data format and pixel
sequence input format register values.
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/sun4i/sun4i_frontend.c | 22 ++
This adds the appropriate device-tree compatible and quirk data for
hooking frontend support for the A20. It supports the FIR coefficients
ready bit but not the access control bit. It also takes different phase
values than the A33 for these coefficients.
The compatible is already used in the A20
This adds the appropriate device-tree compatible and quirk data for
hooking frontend support for the A20. It supports the FIR coefficients
ready bit but not the access control bit. It also takes different phase
values than the A33 for these coefficients.
The compatible is already used in the A20
Hi Charles,
On 2018-11-22 18:30, Charles Keepax wrote:
> Currently, a GPIO can be requested multiple times when the
> NONEXCLUSIVE flag is set, however it must still be freed a single
> time. This makes client code rather complex, since multiple drivers
> may request the GPIO but only a single
Hi Charles,
On 2018-11-22 18:30, Charles Keepax wrote:
> Currently, a GPIO can be requested multiple times when the
> NONEXCLUSIVE flag is set, however it must still be freed a single
> time. This makes client code rather complex, since multiple drivers
> may request the GPIO but only a single
Hi Charles,
On 2018-11-22 18:30, Charles Keepax wrote:
> Currently, the regulator core will take ownership of any GPIO passed
> into it. Makes end driver code fairly error prone as the normal devm_
> patterns of allocation don't work. Update the regulator core to only
> free the GPIO if it
Hi Charles,
On 2018-11-22 18:30, Charles Keepax wrote:
> Currently, the regulator core will take ownership of any GPIO passed
> into it. Makes end driver code fairly error prone as the normal devm_
> patterns of allocation don't work. Update the regulator core to only
> free the GPIO if it
Hi Charles,
On 2018-11-22 18:30, Charles Keepax wrote:
> This reverts commit 466affa06703 ("regulator: wm8994: Don't
> use devres for enable GPIOs"). Whilst that did work around the
> issue in question there are complications on the error paths of
> regulator_register. In the success case clearly
Hi Charles,
On 2018-11-22 18:30, Charles Keepax wrote:
> This reverts commit 466affa06703 ("regulator: wm8994: Don't
> use devres for enable GPIOs"). Whilst that did work around the
> issue in question there are complications on the error paths of
> regulator_register. In the success case clearly
On Fri, Nov 23, 2018 at 09:55:47AM +0100, Rainer Fiebig wrote:
> Am Freitag, 23. November 2018, 08:47:31 schrieb Greg KH:
> > I'm announcing the release of the 4.9.139 kernel.
> >
> > All users of the 4.9 kernel series must upgrade.
> >
> > The updated 4.9.y git tree can be found at:
> >
On Fri, Nov 23, 2018 at 09:55:47AM +0100, Rainer Fiebig wrote:
> Am Freitag, 23. November 2018, 08:47:31 schrieb Greg KH:
> > I'm announcing the release of the 4.9.139 kernel.
> >
> > All users of the 4.9 kernel series must upgrade.
> >
> > The updated 4.9.y git tree can be found at:
> >
Rename the mvebu_comhy_conf structure to be mvebu_comphy_conf, which is
probably what the original author meant.
Signed-off-by: Miquel Raynal
---
Changes since v1
* Removed the Fixes: tag after Antoine's request.
drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 4 ++--
1 file
Rename the mvebu_comhy_conf structure to be mvebu_comphy_conf, which is
probably what the original author meant.
Signed-off-by: Miquel Raynal
---
Changes since v1
* Removed the Fixes: tag after Antoine's request.
drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 4 ++--
1 file
On Fri, Nov 23, 2018 at 05:00:57PM +0800, kbuild test robot wrote:
> Hi Charles,
>
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on ljones-mfd/for-mfd-next]
> [also build test ERROR on v4.20-rc3]
> [cannot apply to next-20181122]
> [if your patch is applied to the
On Fri, Nov 23, 2018 at 05:00:57PM +0800, kbuild test robot wrote:
> Hi Charles,
>
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on ljones-mfd/for-mfd-next]
> [also build test ERROR on v4.20-rc3]
> [cannot apply to next-20181122]
> [if your patch is applied to the
tree, please drop us a note to
> help improve the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Miquel-Raynal/Link-consumer-with-clock-driver/20181123-113833
> base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
> config: sh-titan_def
tree, please drop us a note to
> help improve the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Miquel-Raynal/Link-consumer-with-clock-driver/20181123-113833
> base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
> config: sh-titan_def
On 22-11-18, 11:38, Viresh Kumar wrote:
> So there are few complexities in the case where an OPP table points to itself
> in
> the required-opp field. I looked at solving it up in the opp core but that
> gets
> more and more messy.
>
> Now there is actually a assumption within the OPP core.
On 22-11-18, 11:38, Viresh Kumar wrote:
> So there are few complexities in the case where an OPP table points to itself
> in
> the required-opp field. I looked at solving it up in the opp core but that
> gets
> more and more messy.
>
> Now there is actually a assumption within the OPP core.
The i.MX GPT timer driver binding doc is out of date,
the "interrupts", "clocks" and "clock-names" do NOT match
current GPT driver implementation, update it and use i.MX6SX
as example.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/timer/fsl,imxgpt.txt | 22 +-
The i.MX GPT timer driver binding doc is out of date,
the "interrupts", "clocks" and "clock-names" do NOT match
current GPT driver implementation, update it and use i.MX6SX
as example.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/timer/fsl,imxgpt.txt | 22 +-
701 - 800 of 840 matches
Mail list logo
