On Tue, Jan 08, 2019 at 01:59:10PM -0800, Sowjanya Komatineni wrote:
> Tegra194 supports maximum 64K Bytes transfer per packet.
> Tegra186 and prior supports maximum 4K Bytes transfer per packet.
>
> This patch fixes this payload difference between Tegra194 and prior
> tegra chipsets using separat
Hi Dan, Wolfgang,
On 1/10/2019 1:14 PM, Wolfgang Grandegger wrote:
Hello Dan,
sorry for my late response on that topic...
Am 09.01.19 um 21:58 schrieb Dan Murphy:
Wolfgang
On 11/3/18 5:45 AM, Wolfgang Grandegger wrote:
Hello Dan,
Am 31.10.2018 um 21:15 schrieb Dan Murphy:
Wolfgang
Thanks
Hi Pingfan,
On Wed, Jan 09, 2019 at 09:02:41PM +0800, Pingfan Liu wrote:
> On Tue, Jan 8, 2019 at 11:49 PM Mike Rapoport wrote:
> >
> > On Tue, Jan 08, 2019 at 05:01:38PM +0800, Baoquan He wrote:
> > > Hi Mike,
> > >
> > > On 01/08/19 at 10:05am, Mike Rapoport wrote:
> > > > I'm not thrilled by d
czw., 10 sty 2019 o 08:02 Viresh Kumar napisał(a):
>
> On 08-01-19, 21:05, Paweł Chmiel wrote:
> > This commit enables cpufreq support for all s5pv210 devices.
> >
> > Signed-off-by: Paweł Chmiel
> > ---
> > arch/arm/configs/s5pv210_defconfig | 6 ++
> > 1 file changed, 6 insertions(+)
> >
>
There are 2 code paths leading to mce_amd_feature_init() as below.
1) S5 -> S0: (boot)
secondary_startup_64 -> start_kernel -> identify_boot_cpu ->
identify_cpu ->
mcheck_cpu_init (calls __mcheck_cpu_apply_quirks before) ->
mce_amd_feature_init
2) S3 -> S0: (resume)
syscore_resume -> mce_syscore_
Below patch series applies to family 15 CPU's of AMD platform, to address a
consistent warning of:
"[Firmware Bug]: cpu 0, invalid threshold interrupt offset ..."
at every boot and every resume, which is misguiding as the reason is not a
Firmware Bug but "MC4_MISC thresholding quirk" not being a
On Thu, Jan 10, 2019 at 08:50:14AM +0100, Vincent Guittot wrote:
> On Thu, 10 Jan 2019 at 08:46, Ladislav Michl wrote:
> >
> > On Wed, Jan 09, 2019 at 11:06:34PM +0100, Rafael J. Wysocki wrote:
> > > On Wed, Jan 9, 2019 at 7:05 PM Vincent Guittot
> > > wrote:
> > > >
> > > > On Wed, 9 Jan 2019 at
Its evident from various forums and logs that MC4_MISC thresholding is not
supported for the family 15 processors, hence skip the x86_model check
while applying quirk.
Changelog[v2]:
- reword commit message to adhere to coding standards
- remove check of model range
Signed-off-by: Shirish S
--
MC4_MISC thresholding quirk needs to be applied during S5 -> S0 and
S3 -> S0 state transitions, which follow different code paths, hence
carve it out so as to facilitate its application in both scenarios.
Signed-off-by: Shirish S
---
arch/x86/include/asm/mce.h | 1 +
arch/x86/kernel/cpu/mce
On Thu, 10 Jan 2019, Dave Chinner wrote:
> > Yeah, preadv2(RWF_NOWAIT) is in the same teritory as mincore(), it has
> > "just" been overlooked. I can't speak for Daniel, but I believe he might
> > be ok with rephrasing the above as "Restricting mincore() and RWF_NOWAIT
> > is sufficient ...".
>
On 9/01/19 5:38 PM, Jiri Olsa wrote:
> On Wed, Jan 09, 2019 at 11:18:35AM +0200, Adrian Hunter wrote:
>> x86 retpoline functions pollute the call graph by showing up everywhere
>> there is an indirect branch, but they do not really mean anything. Make
>> changes so that the default retpoline functi
Hello Dan,
sorry for my late response on that topic...
Am 09.01.19 um 21:58 schrieb Dan Murphy:
> Wolfgang
>
> On 11/3/18 5:45 AM, Wolfgang Grandegger wrote:
>> Hello Dan,
>>
>> Am 31.10.2018 um 21:15 schrieb Dan Murphy:
>>> Wolfgang
>>>
>>> Thanks for the review
>>>
>>> On 10/27/2018 09:19 AM,
On Thu, 10 Jan 2019 at 08:46, Ladislav Michl wrote:
>
> On Wed, Jan 09, 2019 at 11:06:34PM +0100, Rafael J. Wysocki wrote:
> > On Wed, Jan 9, 2019 at 7:05 PM Vincent Guittot
> > wrote:
> > >
> > > On Wed, 9 Jan 2019 at 18:26, Ladislav Michl wrote:
> > > >
> > > > On Wed, Jan 09, 2019 at 05:32:31
On Wed, Jan 09, 2019 at 11:06:34PM +0100, Rafael J. Wysocki wrote:
> On Wed, Jan 9, 2019 at 7:05 PM Vincent Guittot
> wrote:
> >
> > On Wed, 9 Jan 2019 at 18:26, Ladislav Michl wrote:
> > >
> > > On Wed, Jan 09, 2019 at 05:32:31PM +0100, Vincent Guittot wrote:
> > > > On Wed, 9 Jan 2019 at 17:07,
On Thu, Jan 10, 2019 at 02:05:46AM -0500, Sasha Levin wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA512
>
> Hi Greg,
>
> Three bug fixes for different parts of the hyper-v code:
>
> - Fix for a lockup when changing NIC's MTU from Dexuan.
> - Fix of use of uninitialized memory from Dex
On Do, 2019-01-10 at 13:03 +0530, Sabyasachi Gupta wrote:
> Remove unusual_jumpshot.h which is included more than once.
>
> Signed-off-by: Sabyasachi Gupta
> ---
> drivers/usb/storage/jumpshot.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/usb/storage/jumpshot.c b/drivers/usb
Remove unusual_sddr55.h which is included more than once
Signed-off-by: Sabyasachi Gupta
---
drivers/usb/storage/sddr55.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/usb/storage/sddr55.c b/drivers/usb/storage/sddr55.c
index b8527c5..96bf7ee 100644
--- a/drivers/usb/storage/sddr55.
Remove unusual_jumpshot.h which is included more than once.
Signed-off-by: Sabyasachi Gupta
---
drivers/usb/storage/jumpshot.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/usb/storage/jumpshot.c b/drivers/usb/storage/jumpshot.c
index 917f170..06e46c6 100644
--- a/drivers/usb/storag
Add support for the Secure Digital Host Controller Interface (SDHCI)
present on TI's AM654 SOCs. It is compatible with eMMC5.1 Host
Specifications and SDHC Standard Specification 4.10.
Enable only upto HS200 speed mode.
Signed-off-by: Faiz Abbas
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 13
On the am654x-evm, the sdhci0 node is connected to an eMMC. Add node and
pinmux for the same.
Signed-off-by: Faiz Abbas
---
.../arm64/boot/dts/ti/k3-am654-base-board.dts | 25 +++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
b/arc
The following patches add eMMC support on TI's AM65x-evm.
v2:
1. The SD card node is under debug for some usecases.
Only upstreaming eMMC support for now.
2. Rebased to latest mainline.
3. Removed status = "disabled" from dtsi patch
4. Fixed node name to not include '_'s
Faiz Abbas (2):
Hi Rohit
> > I got below WARNING by this patch.
> > I guess we need mutex_lock() on snd_soc_register_card() ?
>
> Right, we should have client_mutex lock before calling
> soc_find_component().
>
> We will post fix.
Thanks !!
Best regards
---
Kuninori Morimoto
ARM systems do not permit the use of anything other than cached
mappings for system memory, since that memory may be mapped in the
linear region as well, and the architecture does not permit aliases
with mismatched attributes.
So short-circuit the evaluation in ttm_io_prot() if the flags include
T
Hi Bin,
On Wed, 2019-01-09 at 08:01 -0600, Bin Liu wrote:
> Hi Min,
>
> On Wed, Jan 09, 2019 at 08:31:08PM +0800, Min Guo wrote:
> > Hi Bin,
> > On Tue, 2019-01-08 at 09:44 -0600, Bin Liu wrote:
> > > Hi,
> > >
> > > On Thu, Dec 27, 2018 at 03:34:26PM +0800, min@mediatek.com wrote:
> > > > F
Hi,
On 10-01-19 02:43, Wei Yongjun wrote:
The snd_byt_cht_es8316_mc_remove() use the platform drvdata as a type
of 'struct byt_cht_es8316_private', but snd_byt_cht_es8316_mc_probe()
set it to 'struct snd_soc_card', as suggested by Dan Carpenter, fix
the usage in snd_byt_cht_es8316_mc_remove().
Hi,
>On Thu, Jan 10, 2019 at 09:30:41AM +0800, Peter Chen wrote:
>> On Mon, Dec 24, 2018 at 12:44 AM Pawel Laszczak wrote:
>> - debugfs is nice to have feature, I suggest removing it at this
>> initial version. Besides, role switch
>> through /sys is normal feature, the end user may use it at re
Hi Hedi,
Thanks for the patchset.
I will give this a go on my sgi-uv300 machine and come back with more
detailed inputs, but I wanted to ask about the hang/panic you mentioned
in the cover letter when efi_scratch gets clobbered. Can you describe
the same (for e.g. how to reproduce this).
Ni
Remove duplicate headers which are included more than once.
Signed-off-by: Sabyasachi Gupta
---
drivers/usb/storage/datafab.c| 1 -
drivers/usb/storage/ene_ub6250.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/drivers/usb/storage/datafab.c b/drivers/usb/storage/datafab.c
index 09353b
Thanks Kuninori for reporting the issue.
On 1/10/2019 8:02 AM, Kuninori Morimoto wrote:
Hi Mark, Ajit
From: Ajit Pandey
Date: Wed, 9 Jan 2019 14:17:07 +0530
Subject: [PATCH] ASoC: soc-core: defer card probe until all component is added
to list
DAI component probe is not called if it is not
On Wed, Jan 09, 2019 at 12:12:40PM -0800, Kees Cook wrote:
> Hi Greg,
>
> Please pull these lkdtm changes for next (into, I assume, your
> drivers-misc tree).
Now merged, thanks.
greg k-h
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA512
Hi Greg,
Three bug fixes for different parts of the hyper-v code:
- Fix for a lockup when changing NIC's MTU from Dexuan.
- Fix of use of uninitialized memory from Dexuan.
- Fix for memory corruption caused by ballooning from Vitaly.
All 3 were
On Tue, Dec 11, 2018 at 04:48:34PM +0100, Patrick Havelange wrote:
> The LS1021A has a memory controller that supports EDAC. This commit
> adds an entry for it.
>
> Signed-off-by: Patrick Havelange
Applied, thanks.
On Wed, Jan 09, 2019 at 05:18:21PM -0800, Linus Torvalds wrote:
> On Wed, Jan 9, 2019 at 4:44 PM Dave Chinner wrote:
> >
> > I wouldn't look at ext4 as an example of a reliable, problem free
> > direct IO implementation because, historically speaking, it's been a
> > series of nasty hacks (*cough*
On Wed, Jan 09, 2019 at 07:16:04PM +0100, Jernej Skrabec wrote:
> Currently, AXP803 driver assumes that reg_drivevbus is input which is
> wrong. Unfortunate consequence of that is that none of the USB ports
> work on the board, even USB HOST port, because USB PHY driver probing
> fails due to missi
On 08-01-19, 21:05, Paweł Chmiel wrote:
> This commit enables cpufreq support for all s5pv210 devices.
>
> Signed-off-by: Paweł Chmiel
> ---
> arch/arm/configs/s5pv210_defconfig | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/configs/s5pv210_defconfig
> b/arch/arm/confi
On 08-01-19, 21:05, Paweł Chmiel wrote:
> There is possibility, that when probing driver, regulators are not yet
> initialized. In this case we should return EPROBE_DEFER and wait till
> they're initialized, since they're required currently for cpufreq driver
> to work. Also move regulator initiali
On Wed, Jan 09, 2019 at 04:19:30PM -0800, Nick Desaulniers wrote:
> Digging up an old thread to point out I was wrong:
>
> On Thu, Sep 27, 2018 at 1:08 PM Nick Desaulniers
> wrote:
> > > This is not a million-little-commits problem; more like 2 drivers in
> > > the whole tree have this problem.
>
On Thu, Jan 10, 2019 at 02:22:07PM +0800, Chen-Yu Tsai wrote:
> If the clock tree is not fully populated when the timer-sun5i init code
> is called, attempts to get the clock rate for the timer would fail and
> return 0.
>
> Make the init code for both clock events and clocksource check the
> retu
On Wed, Jan 09, 2019 at 11:35:41AM -0600, Gustavo A. R. Silva wrote:
> One of the more common cases of allocation size calculations is finding the
> size of a structure that has a zero-sized array at the end, along with memory
> for some number of elements for that array. For example:
>
> struct f
On Thu, Jan 10, 2019 at 09:30:41AM +0800, Peter Chen wrote:
> On Mon, Dec 24, 2018 at 12:44 AM Pawel Laszczak wrote:
> - debugfs is nice to have feature, I suggest removing it at this
> initial version. Besides, role switch
> through /sys is normal feature, the end user may use it at real
> produc
On Fri, Dec 07, 2018 at 10:03:39AM +, Anson Huang wrote:
> i.MX7ULP can switch CPU between RUN mode and HSRUN mode
> by programming SMC1 register, different clock sources
> will be used for CPU in different modes, so SMC1 can be
> abstracted as a clock controller for CPU clock switch,
> this pa
On Wed, Jan 09, 2019 at 09:56:12PM -0500, Sasha Levin wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA512
>
> The following changes since commit bfeffd155283772bbe78c6a05dec7c0128ee500c:
>
> Linux 5.0-rc1 (2019-01-06 17:08:20 -0800)
>
> are available in the Git repository at:
>
> git
On Wed, Jan 09, 2019 at 11:40:48AM -0800, Guenter Roeck wrote:
> On Wed, Jan 09, 2019 at 03:38:11PM +0100, Greg Kroah-Hartman wrote:
> > On Tue, Jan 08, 2019 at 03:07:31PM -0800, Guenter Roeck wrote:
> > > On Mon, Jan 07, 2019 at 01:30:27PM +0100, Greg Kroah-Hartman wrote:
> > > > This is the start
Remove unusual_cypress.h which is included more than once.
Signed-off-by: Sabyasachi Gupta
---
drivers/usb/storage/cypress_atacb.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/usb/storage/cypress_atacb.c
b/drivers/usb/storage/cypress_atacb.c
index 4825902..be2e346 100644
--- a/dri
On 10-01-19, 05:30, Amit Kucheria wrote:
> subsys_initcall causes problems registering the driver as a thermal
> cooling device.
>
> If "faster boot" is the main reason for doing subsys_initcall, this
> should be handled in the bootloader or another boot constraint
> framework.
>
> Signed-off-by:
On Sat, Dec 08, 2018 at 09:58:37AM +0800, Shawn Guo wrote:
> On Thu, Dec 06, 2018 at 05:33:13PM -0600, Rob Herring wrote:
> > On Wed, Dec 5, 2018 at 8:32 PM Shawn Guo wrote:
> > >
> > > On Mon, Dec 03, 2018 at 03:32:07PM -0600, Rob Herring wrote:
> > > > Convert Freescale SoC bindings to DT schema
Hello all,
Sorry I forgot to answer this email.
On Wed, 26 Dec 2018 18:09:04 +0100
Heinrich Schuchardt wrote:
> On 12/26/18 5:16 PM, Gregory CLEMENT wrote:
> > Hi Heinrich,
> >
> > On ven., déc. 21 2018, Heinrich Schuchardt wrote:
> >
> >> The memory area [0x400-0x420[ is occup
On Wed, Jan 09, 2019 at 02:13:02PM +0800, Chao Yu wrote:
> On 2019/1/9 12:38, Jaegeuk Kim wrote:
> > On 01/07, Chao Yu wrote:
> >> On 2019/1/5 4:33, Jaegeuk Kim wrote:
> >>> On 01/04, Sahitya Tummala wrote:
> On Mon, Nov 26, 2018 at 10:17:20AM +0530, Sahitya Tummala wrote:
> > When there i
Signed-off-by: Jongsung Kim
---
Documentation/devicetree/bindings/net/stmmac.txt | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/stmmac.txt
b/Documentation/devicetree/bindings/net/stmmac.txt
index cb694062afff..988e56781fbd 100644
+Rafael
On 10-01-19, 09:32, Rajendra Nayak wrote:
> Changes in v11:
> * Updated opp-level binding description based on feedback
> from Viresh
> * Other minor fixups in 'PATCH 2/9'
> Documentation/devicetree/bindings/opp/opp.txt | 3 +
> .../devicetree/bindings/power/qcom,rpmpd.txt | 145 +
On 2018/12/22 15:51, Zhou Wang wrote:
> This series adds HiSilicon QM and ZIP controller driver in crypto subsystem.
>
> A simple QM/ZIP driver which helps to provide an example for a general
> accelerator framework is under review in community[1]. Based on this simple
> driver, this series adds H
- On Jan 9, 2019, at 8:13 PM, paulmck paul...@linux.ibm.com wrote:
> On Wed, Jan 09, 2019 at 08:38:51PM -0500, Mathieu Desnoyers wrote:
>> Hi Paul,
>>
>> I've had a user report that trace_sched_waking() appears to be
>> invoked while !rcu_is_watching() in some situation, so I started
>> diggi
On 10-01-19, 09:32, Rajendra Nayak wrote:
> Now that the OPP bindings are updated to include an optional
> 'opp-level' property, add support to parse it from device tree
> and store it as part of dev_pm_opp structure.
> Also add and export an helper 'dev_pm_opp_get_level()' that can be
> used to ge
On 10-01-19, 09:32, Rajendra Nayak wrote:
> Add opp-level as an additional property in the OPP node to describe
> the performance level of the device.
>
> On some SoCs (especially from Qualcomm and MediaTek) this value
> is communicated to a remote microprocessor by the CPU, which
> then takes som
If cma_acquire_dev_by_src_ip() returns error in addr_handler(), the
device state changes back to RDMA_CM_ADDR_BOUND but the resolved source
IP address is still left. After that, if rdma_destroy_id() is called
after rdma_listen(), the device is freed without removed from
listen_any_list in cma_cance
On 09-01-19, 18:22, Matthias Kaehlcke wrote:
> Hi Amit,
>
> On Thu, Jan 10, 2019 at 05:30:56AM +0530, Amit Kucheria wrote:
> > Since the big and little cpus are in the same frequency domain, use all
> > of them for mitigation in the cooling-map. At the lower trip points we
> > restrict ourselves t
If the clock tree is not fully populated when the timer-sun5i init code
is called, attempts to get the clock rate for the timer would fail and
return 0.
Make the init code for both clock events and clocksource check the
returned clock rate and fail gracefully if the result is 0, instead of
causing
On 10-01-19, 05:30, Amit Kucheria wrote:
> All cpufreq drivers do similar things to register as a cooling device.
> Provide a generic call back so we can get rid of duplicated code in the
> drivers.
>
> Signed-off-by: Amit Kucheria
> Suggested-by: Stephen Boyd
> ---
> drivers/thermal/cpu_coolin
Removed unnecessary local variable in have_hgsmi_mode_hints.
The result of hgsmi_query_conf should be directly compared without
assigning to local variable.
Signed-off-by: Sidong Yang
---
drivers/staging/vboxvideo/vbox_main.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
On 10-01-19, 05:30, Amit Kucheria wrote:
> Signed-off-by: Amit Kucheria
> ---
> drivers/cpufreq/qcom-cpufreq-hw.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c
> b/drivers/cpufreq/qcom-cpufreq-hw.c
> index 64972749..1c01311e5927 100644
> ---
On Thu, Jan 10, 2019 at 11:54:30AM +0900, Masami Hiramatsu wrote:
> Prohibit probing on optprobe template code, since it is not
> a code but a template instruction sequence. If we modify
> this template, copied template must be broken.
>
> Signed-off-by: Masami Hiramatsu
> Fixes: 9326638cbee2 ("k
On Wed, Jan 09, 2019 at 01:28:34PM +, Parav Pandit wrote:
>
>
> > -Original Message-
> > From: linux-rdma-ow...@vger.kernel.org > ow...@vger.kernel.org> On Behalf Of Myungho Jung
> > Sent: Friday, January 4, 2019 12:46 AM
> > To: Doug Ledford ; Jason Gunthorpe
> > Cc: linux-r...@vge
On the GTA04, current consumption rose by about 30mA when the omap3_isp
module was loaded and the v4l device was not accessed and even no
camera attached.
Module removal fixed it again. Slowing down the removal process reveals
that calling isp_detach_iommu() is required to have low
current. So isp_
On Wed, Jan 9, 2019 at 4:48 PM Ian Kumlien wrote:
>
> Hi,
>
> Just been trough ~5+ hours of bisecting and eventually actually found
> the culprit =)
>
> commit fb420d5d91c1274d5966917725e71f27ed092a85 (refs/bisect/bad)
> Author: Eric Dumazet
> Date: Fri Sep 28 10:28:44 2018 -0700
>
> tcp/fq
> The conversion to use a structure for mmu_notifier_invalidate_range_*()
> unintentionally changed the usage in try_to_unmap_one() to init the
> 'struct mmu_notifier_range' with vma->vm_start instead of @address,
> i.e. it invalidates the wrong address range. Revert to the correct
> address ran
On Thursday 10 January 2019 10:36 AM, Keerthy wrote:
>
>
> On Thursday 10 January 2019 03:06 AM, Tony Lindgren wrote:
>> Hi,
>>
>> * Heiner Kallweit [190109 19:28]:
>>> On 09.01.2019 20:06, Tony Lindgren wrote:
Commit 6e2d85ec0559 ("net: phy: Stop with excessive soft reset") caused
A recent commit in Clang expanded the -Wstring-plus-int warning, showing
some odd behavior in this file.
drivers/isdn/hardware/avm/b1.c:426:30: warning: adding 'int' to a string does
not append to the string [-Wstring-plus-int]
cinfo->version[j] = "\0\0" + 1;
c3ff2a519 "powerpc/32: add stack protector support" addes stack protector
support so now powerpc's "prepare" target depends on prepare0 (via
stack_protector_prepare target).
It works fine until we try build an external module where it fails with:
Run: 'make -j128 SYSSRC=/home/aik/p/kernel
SYSOUT=
When freeing pages are done with higher order, time spent on coalescing
pages by buddy allocator can be reduced. With section size of 256MB, hot
add latency of a single section shows improvement from 50-60 ms to less
than 1 ms, hence improving the hot add latency by 60 times. Modify
external prov
> Am 09.01.2019 um 22:39 schrieb Tony Lindgren :
>
> * Rob Herring [190109 19:38]:
>> On Wed, Jan 9, 2019 at 1:02 PM H. Nikolaus Schaller
>> wrote:
>>>
>>> From: Tony Lindgren
>>>
>>> We're currently getting a warning with make dtbs:
>>>
>>> arch/arm/boot/dts/omap3-gta04.dtsi:720.7-727.4:
On Wed, Jan 9, 2019 at 5:18 PM Linus Torvalds
wrote:
>
> On Wed, Jan 9, 2019 at 4:44 PM Dave Chinner wrote:
> >
> > I wouldn't look at ext4 as an example of a reliable, problem free
> > direct IO implementation because, historically speaking, it's been a
> > series of nasty hacks (*cough* mount -
Hi Frieder,
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Wednesday, January 9, 2019 7:49 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; marek.va...@gmail.com;
> broo...@kernel.org; linux-...@vger.
The copyright owner can rescind. Those saying you cannot are wrong.
Explained. In american vernacular:
Video: http://www.veoh.com/watch/v141917696RbH96XaD
https://openload.co/f/mT_AH3xmIUM/TruthAboutLinuxandGPLv2__.mp4
Audio: http://ufile.io/sdhpl
If you hit a video about a speedrunner: th
On 2019-01-10 00:26, Andrew Morton wrote:
On Wed, 09 Jan 2019 16:36:36 +0530 Arun KS
wrote:
On 2019-01-09 16:27, Michal Hocko wrote:
> On Wed 09-01-19 16:12:48, Arun KS wrote:
> [...]
>> It will be called once per online of a section and the arg value is
>> always
>> set to 0 while entering o
Hi Heiko,
On 07/01/19 8:05 PM, Heiko Stuebner wrote:
> Am Montag, 7. Januar 2019, 07:41:33 CET schrieb Kishon Vijay Abraham I:
>> Hi Lorenzo,
>>
>> The Endpoint controller driver uses features member in 'struct pci_epc'
>> to advertise the list of supported features to the endpoint function
>> dri
Presently C99 style comments are removed unconditionally before actual
patch validity check happens. This is a problem for some third party
projects which use checkpatch.pl but do not allow C99 style comments.
This patch adds yet another variable, named C99_COMMENT_TOLERANCE. If
it is included in
Hi Bjorn,
On 1/6/2019 1:39 PM, Bjorn Andersson wrote:
The AOSS QMP genpd provider implements control over power-related
resources related to low-power state associated with the remoteprocs in
the system as well as control over a set of clocks related to debug
hardware in the SoC.
Signed-off-by:
Hi Doug,
On 1/10/2019 4:27 AM, Doug Anderson wrote:
This was on my TODO list, but you beat me to it. This could land any
time and is completely separate from the other patches in this series.
Reviewed-by: Douglas Anderson
Thanks for the review. Sorry I missed keeping you and Bjorn in CC.
On 2019-01-09 21:47, Alexander Duyck wrote:
On Wed, 2019-01-09 at 16:43 +0530, Arun KS wrote:
When freeing pages are done with higher order, time spent on
coalescing
pages by buddy allocator can be reduced. With section size of 256MB,
hot
add latency of a single section shows improvement from
On 2019-01-09 21:39, Alexander Duyck wrote:
On Wed, 2019-01-09 at 11:51 +0530, Arun KS wrote:
On 2019-01-09 03:47, Alexander Duyck wrote:
> On Fri, 2019-01-04 at 10:31 +0530, Arun KS wrote:
> > When freeing pages are done with higher order, time spent on
> > coalescing
> > pages by buddy allocat
Add cros_ec_readmem() helpers for I2C/SPI based ECs.
Unlike the LPC based ECs the I2C/SPI based ones cannot just directly
read the mapped region, but have to resort to EC_CMD_READ_MEMMAP.
This is useful for things like accessing fan speeds or temperatures.
Signed-off-by: Moritz Fischer
---
Hi a
Clang warns:
In file included from drivers/net/ethernet/intel/iavf/iavf_main.c:4:
In file included from drivers/net/ethernet/intel/iavf/iavf.h:37:
In file included from drivers/net/ethernet/intel/iavf/iavf_type.h:8:
drivers/net/ethernet/intel/iavf/iavf_osdep.h:49:18: warning: 'format' attribute
a
On Thu, Jan 10, 2019 at 01:39:52AM +0100, Andrea Parri wrote:
> On Wed, Jan 09, 2019 at 03:40:43PM -0800, Paul E. McKenney wrote:
> > On Thu, Jan 10, 2019 at 12:18:53AM +0100, Andrea Parri wrote:
> > > On Wed, Jan 09, 2019 at 01:07:06PM -0800, Paul E. McKenney wrote:
> > > > Hello!
> > > >
> > > >
On 1/9/19 5:02 PM, Andrew Morton wrote:
>> --- a/arch/x86/include/asm/page_64_types.h
>> +++ b/arch/x86/include/asm/page_64_types.h
>> @@ -7,7 +7,11 @@
>> #endif
>>
>> #ifdef CONFIG_KASAN
>> +#ifdef CONFIG_KASAN_EXTRA
>> +#define KASAN_STACK_ORDER 2
>> +#else
>> #define KASAN_STACK_ORDER 1
Hou Tao wrote on Thu, Jan 10, 2019:
> > Hmm, I'm not familiar with the read/write seqcount code for 32 bit but I
> > don't understand how locking here helps besides slowing things down (so
> > if the value is constantly updated, the read thread might have a chance
> > to be scheduled between two up
Hi all,
Changes since 20190109:
The vfs tree still had its build failure for which I applied a patch.
The drm-misc tree lost its build failure.
Non-merge commits (relative to Linus' tree): 1367
1384 files changed, 42473 insertions(+), 21762 dele
On Wed, Jan 09, 2019 at 08:38:51PM -0500, Mathieu Desnoyers wrote:
> Hi Paul,
>
> I've had a user report that trace_sched_waking() appears to be
> invoked while !rcu_is_watching() in some situation, so I started
> digging into the scheduler idle code.
>
> It appears that interrupts are re-enabled
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If regulator DT node doesn't exist, its of_parse_cb callback
function isn't called. Then all values for DT properties are
filled with zero. This leads to wrong register update for
FPS and POK settings.
Signed-off-by: Jinyoung Park
Signed-off-by: Mark Zhang
---
drivers/regulator/max77620-regulat
Disabling regulator notifier events if regulator is
configured part of flexible power sequencer(FPS),
there is no SW control to enable/disable if regulator
is configured part of FPS, so disabling notifier events
if client driver try to enable/disable FPS rails.
Signed-off-by: Venkat Reddy Talla
S
Add rpmpd device node and its OPP table
Signed-off-by: Rajendra Nayak
Signed-off-by: Viresh Kumar
Reviewed-by: Ulf Hansson
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 34 +++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/q
Specify the active + sleep and active-only MX power domains as
the parents of the corresponding CX power domains. This will ensure that
performance state requests on CX automatically generate equivalent requests
on MX power domains.
This is used to enforce a requirement that exists for various
har
Add the DT node for the rpmhpd powercontroller.
Signed-off-by: Rajendra Nayak
Acked-by: Viresh Kumar
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 51
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch
The RPMh power domain driver aggregates the corner votes from various
consumers for the ARC resources and communicates it to RPMh.
With RPMh we use 2 different numbering space for corners, one used
by the clients to express their performance needs, and another used
to communicate to RPMh hardware.
Add support for the .set_performace_state() and .opp_to_performance_state()
callbacks in the rpmpd driver.
Signed-off-by: Rajendra Nayak
Signed-off-by: Viresh Kumar
Reviewed-by: Ulf Hansson
Reviewed-by: Stephen Boyd
---
drivers/soc/qcom/rpmpd.c | 35 +++
1 file
Tetsuo Handa had reported he saw an incorrect "downgrading a read lock"
warning right after a previous lockdep warning. It is likely that the
previous warning turned off lock debugging causing the lockdep to have
inconsistency states leading to the lock downgrade warning.
Fix that by add a check f
Add DT bindings to describe the rpm/rpmh power domains found on Qualcomm
Technologies, Inc. SoCs. These power domains communicate a performance
state to RPM/RPMh, which then translates it into corresponding voltage on a
PMIC rail.
Signed-off-by: Rajendra Nayak
Signed-off-by: Viresh Kumar
Reviewe
Now that the OPP bindings are updated to include an optional
'opp-level' property, add support to parse it from device tree
and store it as part of dev_pm_opp structure.
Also add and export an helper 'dev_pm_opp_get_level()' that can be
used to get the level value read from device tree when present
Changes in v11:
* Updated opp-level binding description based on feedback
from Viresh
* Other minor fixups in 'PATCH 2/9'
Changes in v10:
* Updated level bindings to include opp-level as an
optional property using operating-points-v2, no new
compatible for the OPP table
* Updated the dev_pm_opp_ge
Add opp-level as an additional property in the OPP node to describe
the performance level of the device.
On some SoCs (especially from Qualcomm and MediaTek) this value
is communicated to a remote microprocessor by the CPU, which
then takes some actions (like adjusting voltage values across variou
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