Document the support for rcar_canfd on R8A774C0 SoC devices.
Signed-off-by: Fabrizio Castro
Reviewed-by: Chris Paterson
---
This patch depends on:
https://patchwork.kernel.org/patch/10687999/
https://patchwork.kernel.org/patch/10688001/
Documentation/devicetree/bindings/net/can/rcar_canfd.txt
According to the latest information, the clock options for CAN on RZ/G2
are the same as the ones available on R-Car Gen3
Fixes: 868b7c0f43e6 ("dt-bindings: can: rcar_can: Add r8a774a1 support")
Signed-off-by: Fabrizio Castro
Reviewed-by: Chris Paterson
---
From: Biju Das
Add Silicon Linux to the list of devicetree vendor prefixes.
Website: http://www.si-linux.co.jp
Signed-off-by: Biju Das
Signed-off-by: Fabrizio Castro
Reviewed-by: Chris Paterson
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
.
This applies onto next-20190116
Thanks,
Fab
Biju Das (6):
dt-bindings: Add vendor prefix for Silicon Linux.
arm64: dts: renesas: Add Si-Linux CAT874 board support
arm64: dts: renesas: Add Si-Linux EK874 board support
arm64: dts: renesas: r8a774c0-cat874: Add pincontrol support to scif2
From: Samir Virmani
We were experiencing a crash similar to the one reported as part of
commit:a5ba1d95e46e ("uart: fix race between uart_put_char() and
uart_shutdown()") in our testbed as well. We continue to observe the same
crash after integrating the commit a5ba1d95e46e ("uart: fix race
Hi Jean,
On 1/16/19 4:52 PM, Jean-Philippe Brucker wrote:
> On 14/01/2019 22:32, Jacob Pan wrote:
>>> [...]
> +/**
> + * struct iommu_fault - Generic fault data
> + *
> + * @type contains fault type
> + * @reason fault reasons if relevant outside IOMMU driver.
> + * IOMMU
On 1/16/19 10:29 AM, Juergen Gross wrote:
> On 16/01/2019 16:07, Boris Ostrovsky wrote:
>> On 1/16/19 9:33 AM, Juergen Gross wrote:
>>> On 16/01/2019 14:17, Boris Ostrovsky wrote:
On Wed, Jan 16, 2019 at 08:50:13AM +0100, Juergen Gross wrote:
> @@ -1650,13 +1650,14 @@ void
It's possible that a pid has died before we take the rcu lock, in which
case we can't walk the ancestry list as it may be detached. Instead, check
for death first before doing the walk.
Reported-by: syzbot+a9ac39bf55329e206...@syzkaller.appspotmail.com
Fixes: 2d514487faf1 ("security: Yama LSM")
On 2019-01-16 2:37 a.m., Jarkko Nikula wrote:
> So this doesn't happen if you revert c5eb1190074c?
Yes, but the bug was fully mine in the disable_acs_redir code. That
patch only just made it noticable to me.
> I guess this is due dev->state_saved being true set by
> pci_pm_runtime_suspend()
On 27/12/2018 06:13, Lokesh Vutla wrote:
> Previously all msi for a device are allocated in one go
> by calling msi_domain_alloc_irq() from a bus layer. This might
> not be the case when a device is trying to allocate interrupts
> dynamically based on a request to it.
>
> So introduce
David,
On Wed, Jan 16, 2019 at 05:12:20PM +, David Howells wrote:
> Umm... What do I apply this patch to?
This should go over "crypto: testmgr - split akcipher tests by a key type"
which I sent at 20190107 to linux-crypto. Sorry for the mess.
> In your modified
On Tue, 15 Jan 2019 12:40:53 +
Srinivas Kandagatla wrote:
> On 06/01/2019 19:28, Alban Bedel wrote:
> > Add helper functions to make the driver code simpler when a cell is
> > optional. Using these functions just return NULL when the cell doesn't
> > exists or if nvmem is disabled.
> >
> >
Clean up the ifdefs which conditionally defined the io{read|write}64
functions in favour of the new common io-64-nonatomic-lo-hi header.
Per a nit from Andy Shevchenko, the include list is also made
alphabetical.
Signed-off-by: Logan Gunthorpe
Reviewed-by: Andy Shevchenko
Cc: Jon Mason
---
Add support for io{read|write}64() functions in parisc architecture.
These are pretty straightforward copies of similar functions which
make use of readq and writeq.
Also, indicate that the lo_hi and hi_lo variants of these functions
are not provided by this architecture.
Signed-off-by: Logan
This patch adds generic io{read|write}64[be]{_lo_hi|_hi_lo} macros if
they are not already defined by the architecture. (As they are provided
by the generic iomap library).
The patch also points io{read|write}64[be] to the variant specified by the
header name.
This is because new drivers are
On 1/16/19 11:13 AM, Kees Cook wrote:
On Wed, Jan 16, 2019 at 9:44 AM Daniel Díaz wrote:
From: Fathi Boudra
seccomp_bpf fails to build due to undefined reference errors:
aarch64-linaro-linux-gcc --sysroot=/build/tmp-rpb-glibc/sysroots/hikey
-O2 -pipe -g -feliminate-unused-debug-types
Fix an asymmetry in the io{read|write}XXbe functions in that the
big-endian variants make use of the raw io accessors while the
little-endian variants use the regular accessors. Some architectures
implement barriers to order against both spinlocks and DMA accesses
and for these case, the
From: Dave Hansen
The mm/resource.c code is used to manage the physical address
space. We can view the current resource configuration in
/proc/iomem. An example of this is at the bottom of this
description.
The nvdimm subsystem "owns" the physical address resources which
map to persistent
In order to provide non-atomic functions for io{read|write}64 that will
use readq and writeq when appropriate. We define a number of variants
of these functions in the generic iomap that will do non-atomic
operations on pio but atomic operations on mmio.
These functions are only defined if readq
From: Dave Hansen
walk_system_ram_range() can return an error code either becuase *it*
failed, or because the 'func' that it calls returned an error. The
memory hotplug does the following:
ret = walk_system_ram_range(..., func);
if (ret)
return ret;
and 'ret'
I would like to get this queued up to get merged. Since most of the
churn is in the nvdimm code, and it also depends on some refactoring
that only exists in the nvdimm tree, it seems like putting it in *via*
the nvdimm tree is the best path.
But, this series makes non-trivial changes to the
From: Dave Hansen
Currently, a persistent memory region is "owned" by a device driver,
either the "Direct DAX" or "Filesystem DAX" drivers. These drivers
allow applications to explicitly use persistent memory, generally
by being modified to use special, new libraries.
However, this limits
This is resend number 6 since the last change to this series.
This cleanup was requested by Greg KH back in June of 2017. I've resent the
series
a couple times a cycle since then, updating and fixing as feedback was slowly
recieved some patches were alread accepted by specific arches. In June
From: Dave Hansen
In the process of onlining memory, we use walk_system_ram_range()
to find the actual RAM areas inside of the area being onlined.
However, it currently only finds memory resources which are
"top-level" iomem_resources. Children are not currently
searched which causes it to
Now that ioread64 and iowrite64 are available in io-64-nonatomic,
we can remove the hack at the top of ntb_hw_intel.c and replace it
with an include.
Signed-off-by: Logan Gunthorpe
Reviewed-by: Andy Shevchenko
Acked-by: Dave Jiang
Acked-by: Allen Hubbe
Acked-by: Jon Mason
---
On 2019-01-15 10:44 a.m., Florian Fainelli wrote:
Add support for resetting blocks through the Linux reset controller
subsystem when reset lines are provided through a SW_INIT-style reset
controller on Broadcom STB SoCs.
Signed-off-by: Florian Fainelli
---
drivers/reset/Kconfig |
On Wed, Jan 16, 2019 at 9:44 AM Daniel Díaz wrote:
>
> From: Fathi Boudra
>
> seccomp_bpf fails to build due to undefined reference errors:
>
> aarch64-linaro-linux-gcc --sysroot=/build/tmp-rpb-glibc/sysroots/hikey
> -O2 -pipe -g -feliminate-unused-debug-types -Wl,-no-as-needed -Wall
>
Dear Sir/Madam.
Assalamu`Alaikum.
I am Dr mohammad ouattara, I have ($14.6 Million us dollars) to
transfer into your account,
I will send you more details about this deal and the procedures to
follow when I receive a positive response from you,
Have a great day,
Dr mohammad ouattara.
On 16/01/2019 13:44, Corentin Labbe wrote:
While debugging a DMA mapping leak, I needed to access
debug_dma_dump_mappings() but easily from user space.
This patch adds a /sys/kernel/debug/dma-api/dump file which contain all
current DMA mapping.
Signed-off-by: Corentin Labbe
---
The patch
ASoC: qcom: Kconfig: select max98927 for sdm845
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
The patch
ASoC: sdm845: Set DAI format for dmic codec
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to
Looks good.
On 2019-01-15 9:44 p.m., Wei Yongjun wrote:
Fixes the following sparse warning:
drivers/soc/bcm/bcm2835-power.c:556:32: warning:
symbol 'bcm2835_reset_ops' was not declared. Should it be static?
Fixes: 670c672608a1 ("soc: bcm: bcm2835-pm: Add support for power domains under a
Add the nodes to describe the Adreno GPU and GMU devices for sdm845.
Signed-off-by: Jordan Crouse
Reviewed-by: Douglas Anderson
Tested-by: Douglas Anderson
---
This has the following dependencies:
[v11,1/9] dt-bindings: opp: Introduce opp-level bindings
On 16/01/2019 15:56, Julien Thierry wrote:
> On 14/01/2019 12:26, Mark Rutland wrote:
>> On Mon, Jan 14, 2019 at 11:13:59PM +1100, Balbir Singh wrote:
>>> On Fri, Jan 04, 2019 at 05:50:18PM +, Mark Rutland wrote:
Hi Torsten,
On Fri, Jan 04, 2019 at 03:10:53PM +0100, Torsten
Heterogeneous memory systems provide memory nodes with different latency
and bandwidth performance attributes. Provide a new kernel interface for
subsystems to register the attributes under the memory target node's
initiator access class. If the system provides this information, applications
may
Add entries for memory initiator and target node class attributes.
Signed-off-by: Keith Busch
---
Documentation/ABI/stable/sysfs-devices-node | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/Documentation/ABI/stable/sysfs-devices-node
Systems may be constructed with various specialized nodes. Some nodes
may provide memory, some provide compute devices that access and use
that memory, and others may provide both. Nodes that provide memory are
referred to as memory targets, and nodes that can initiate memory access
are referred
The series seems quite calm now. I've received some approvals of the
on the proposal, and heard no objections on the new core interfaces.
Please let me know if there is anyone or group of people I should request
and wait for a review. And if anyone reading this would like additional
time as well
Add descriptions for memory class initiator performance access attributes.
Signed-off-by: Keith Busch
---
Documentation/ABI/stable/sysfs-devices-node | 28
1 file changed, 28 insertions(+)
diff --git a/Documentation/ABI/stable/sysfs-devices-node
System memory may have side caches to help improve access speed to
frequently requested address ranges. While the system provided cache is
transparent to the software accessing these memory ranges, applications
can optimize their own access based on cache attributes.
Provide a new API for the
Parsing entries in an ACPI table had assumed a generic header
structure. There is no standard ACPI header, though, so less common
layouts with different field sizes required custom parsers to go through
their subtable entry list.
Create the infrastructure for adding different table types so
Platforms may provide system memory where some physical address ranges
perform differently than others, or is side cached by the system.
Add documentation describing a high level overview of such systems and the
perforamnce and caching attributes the kernel provides for applications
wishing to
The Heterogeneous Memory Attribute Table (HMAT) header has different
field lengths than the existing parsing uses. Add the HMAT type to the
parsing rules so it may be generically parsed.
Cc: Dan Williams
Reviewed-by: Rafael J. Wysocki
Signed-off-by: Keith Busch
---
drivers/acpi/tables.c | 9
Register memory side cache attributes with the memory's node if HMAT
provides the side cache iniformation table.
Signed-off-by: Keith Busch
---
drivers/acpi/hmat/hmat.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/acpi/hmat/hmat.c
Save the best performace access attributes and register these with the
memory's node if HMAT provides the locality table. While HMAT does make
it possible to know performance for all possible initiator-target
pairings, we export only the best pairings at this time.
Signed-off-by: Keith Busch
---
Add the attributes for the system memory side caches.
Signed-off-by: Keith Busch
---
Documentation/ABI/stable/sysfs-devices-node | 34 +
1 file changed, 34 insertions(+)
diff --git a/Documentation/ABI/stable/sysfs-devices-node
Systems may provide different memory types and export this information
in the ACPI Heterogeneous Memory Attribute Table (HMAT). Parse these
tables provided by the platform and report the memory access and caching
attributes.
Signed-off-by: Keith Busch
---
drivers/acpi/Kconfig | 1 +
If the HMAT Subsystem Address Range provides a valid processor proximity
domain for a memory domain, or a processor domain with the highest
performing access exists, register the memory target with that initiator
so this relationship will be visible under the node's sysfs directory.
Since HMAT
Limiting the HS200 rate on the s400 was just a way to mask that the
tuning setting were not correct. This seems to have been fixed with
the recent MMC driver update. We can now use HS200 at full speed.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 3 +--
1
The bcm wifi/bt device on SDIO support SDR104 and it seems to work
well following the recent mmc driver update, so enable this
ultra high speed mode
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
On Wed, Jan 16, 2019 at 10:50:31AM +0800, Xiongfeng Wang wrote:
> Use crypto template array registering API to simplify the code.
>
> Signed-off-by: Xiongfeng Wang
> ---
> crypto/ccm.c | 81
> +++-
> 1 file changed, 26 insertions(+), 55
On 16/01/2019 16:17, Laurentiu Tudor wrote:
This is an attempt to fix an iommu exception when doing dma to the
i2c controller with EDMA. Without these mappings the smmu raises a
context fault [1] exactly with the address of the i2c data i/o reg.
This was seen on an NXP LS1043A chip while working
Instead of relying on a fixed names for the differents input clocks
of the controller, get them through DT.
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg-aoclk.c | 22 +++-
drivers/clk/meson/gxbb-aoclk.c | 25 --
drivers/clk/meson/meson-aoclk.c |
Following the preparation series [0] sent in the last cycle, this
patchset adds clock input claim through DT in the gxbb and axg clock
controllers
[0]: https://lkml.kernel.org/r/20181203171640.12110-1-jbru...@baylibre.com
Jerome Brunet (3):
clk: meson: gxbb: claim clock controller input clock
Instead of relying on a fixed name for the xtal clock, claim the
controller input clock trough DT.
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/gxbb.c | 37 -
1 file changed, 24 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/meson/gxbb.c
Instead of relying on a fixed name for the xtal clock, claim the
controller input clock trough DT.
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg.c | 27 +++
1 file changed, 19 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/meson/axg.c
On Mon, Jan 14, 2019 at 04:47:45PM +1000, Nicholas Piggin wrote:
> We have a supercomputer site testing nohz_full to reduce jitter with
> good results, but they want CPU0 to be nohz_full. That happens to be
> the boot CPU, which is disallowed by the nohz_full code.
>
> They have existing job
A few nits:
On Wed, Jan 16, 2019 at 10:50:30AM +0800, Xiongfeng Wang wrote:
> This patch add a helper to (un)register a array of templates. The
> following patches will use this helper to simplify the code.
>
> Signed-off-by: Xiongfeng Wang
> ---
> crypto/algapi.c | 27
On Wed, Jan 16, 2019 at 10:50:29AM +0800, Xiongfeng Wang wrote:
> The patchset introduce a helper to (un)register a array of crypto templates.
> The following patches use this helper to simplify the code. This is also
> a preparation for a coming patchset, which will register several crypto
>
On Thu, Jan 17, 2019 at 4:12 AM Jiri Kosina wrote:
>
> So that seems to deal with mincore() in a reasonable way indeed.
>
> It doesn't unfortunately really solve the preadv2(RWF_NOWAIT), nor does it
> provide any good answer what to do about it, does it?
As I suggested earlier in the thread, the
On Wed, Jan 16, 2019 at 05:38:34PM +, Jon Hunter wrote:
>
> On 16/01/2019 17:11, Greg Kroah-Hartman wrote:
> > On Wed, Jan 16, 2019 at 04:56:08PM +, Jon Hunter wrote:
> >>
> >> On 16/01/2019 16:02, Greg Kroah-Hartman wrote:
> >>> On Wed, Jan 16, 2019 at 09:25:12AM +, Jon Hunter wrote:
Hi Geoff,
On 1/16/19 11:21 AM, Geoff Levand wrote:
Hi Gustavo,
On 1/8/19 1:00 PM, Gustavo A. R. Silva wrote:
One of the more common cases of allocation size calculations is finding the
size of a structure that has a zero-sized array at the end, along with memory
for some number of elements
From: Fathi Boudra
reuseport_bpf_numa fails to build due to undefined reference errors:
aarch64-linaro-linux-gcc
--sysroot=/build/tmp-rpb-glibc/sysroots/hikey -Wall
-Wl,--no-as-needed -O2 -g -I../../../../usr/include/ -Wl,-O1
-Wl,--hash-style=gnu -Wl,--as-needed -lnuma
From: Fathi Boudra
seccomp_bpf fails to build due to undefined reference errors:
aarch64-linaro-linux-gcc --sysroot=/build/tmp-rpb-glibc/sysroots/hikey
-O2 -pipe -g -feliminate-unused-debug-types -Wl,-no-as-needed -Wall
-Wl,-O1 -Wl,--hash-style=gnu -Wl,--as-needed -lpthread seccomp_bpf.c -o
From: Fathi Boudra
posix_timers fails to build due to undefined reference errors:
aarch64-linaro-linux-gcc --sysroot=/build/tmp-rpb-glibc/sysroots/hikey
-O2 -pipe -g -feliminate-unused-debug-types -O3 -Wl,-no-as-needed -Wall
-DKTEST -Wl,-O1 -Wl,--hash-style=gnu -Wl,--as-needed -lrt
From: Fathi Boudra
Relax CC assignment to allow to override CC in the top-level Makefile.
Signed-off-by: Denys Dmytriyenko
---
tools/testing/selftests/lib.mk | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/testing/selftests/lib.mk b/tools/testing/selftests/lib.mk
On 01/10, Tetsuo Handa wrote:
>
> syzbot is hitting this problem as of linux-next-20190110.
> When a patch will be proposed?
Well. I have already suggested the patch below several times. It won't fix all
problems in this code (I forgot the details but iirc ptracer_exception_found()
is broken too,
On Wed, 2019-01-16 at 17:32 +0100, Vincent Whitchurch wrote:
> Fix these on 32-bit:
>
> vop_vringh.c:711:13: error: cast from pointer to integer of different
> size [-Werror=pointer-to-int-cast]
[]
> diff --git a/drivers/misc/mic/vop/vop_main.c b/drivers/misc/mic/vop/vop_main.c
[]
> @@ -497,7
On Wed, Jan 16, 2019 at 5:24 AM Peter Zijlstra wrote:
>
> On Mon, Jan 14, 2019 at 11:30:12AM -0800, Suren Baghdasaryan wrote:
> > For memory ordering (which Johannes also pointed out) the critical point is:
> >
> > times[cpu] += delta | if g->polling:
> > smp_wmb() |
On 16/01/2019 17:11, Greg Kroah-Hartman wrote:
> On Wed, Jan 16, 2019 at 04:56:08PM +, Jon Hunter wrote:
>>
>> On 16/01/2019 16:02, Greg Kroah-Hartman wrote:
>>> On Wed, Jan 16, 2019 at 09:25:12AM +, Jon Hunter wrote:
On 15/01/2019 16:35, Greg Kroah-Hartman wrote:
> This is
On 01/12, Kohli, Gaurav wrote:
>
> HI Peter, Oleg,
>
> as per flag and state this seems to be possible only from below code:
Not sure I understand you,
> XXX: 0 1 0x40844c
> PF_NOFREEZE
> PF_RANDOMIZE
> PF_SIGNALED
> PF_FORKNOEXEC
> PF_EXITING
> PF_EXITPIDONE
>
> above state shows do_exit runs
> > Subject: Re: [PATCH 1/3] arm64: dts: add dpaa2-console node for DPAA2
> > platforms
> >
> > On Wed, Jan 16, 2019 at 10:02:01AM +, Ioana Ciornei wrote:
> > > > Subject: Re: [PATCH 1/3] arm64: dts: add dpaa2-console node for
> > > > DPAA2 platforms
> > > >
> > > > On Fri, Dec 21, 2018 at
This switches the fbtft driver to use GPIO descriptors
rather than numerical gpios:
Utilize the GPIO library's intrinsic handling of OF GPIOs
and polarity. If the line is flagged active low, gpiolib
will deal with this.
Remove gpios from platform device structure. Neither assign
statically
(v1.1)
I have been working with the philosophy behind Racoh Computer the last half
year and a bit more, an ultimate computer based on principles from my research
on monotheism that has been top 1% on academia.edu, and present a summary of it:
Racoh Computer Design
On Mon, Jan 14, 2019 at 03:41:56PM +0100, Benjamin Gaignard wrote:
> +Common Domains Controller bindings properties
> +
> +Domains Controller framework defines common bindings properties to describe
> +the configurations to be applied for each device.
I suspect this is going to need a few more
On Wed, 16 Jan 2019 at 10:13, Greg KH wrote:
>
> On Wed, Jan 16, 2019 at 09:38:09AM -0700, Mathieu Poirier wrote:
> > On Wed, 16 Jan 2019 at 09:33, Greg KH wrote:
> > >
> > > On Wed, Jan 16, 2019 at 09:14:33AM -0700, Mathieu Poirier wrote:
> > > > On Wed, 16 Jan 2019 at 08:39, Greg KH
> > > >
On Wed, Jan 16, 2019 at 09:18:45AM -0800, Paul Walmsley wrote:
> On Wed, 16 Jan 2019, Uwe Kleine-König wrote:
>
> > On Wed, Jan 16, 2019 at 04:40:42PM +0530, Yash Shah wrote:
> > > On Wed, Jan 16, 2019 at 3:30 AM Uwe Kleine-König
> > > wrote:
> > > > On Fri, Jan 11, 2019 at 01:52:44PM +0530,
On Wed, 2019-01-16 at 08:37 -0800, Stephen Boyd wrote:
> Quoting Lubomir Rintel (2019-01-16 01:35:05)
> > There could be vital functionality running on the SP PJ1 core it can not be
> > restarted just by turning the clock back on.
> >
> > On the OLPC laptop, the keyboard controller code runs
From: Colin Ian King
There is a statement that is incorrectly indented, fix it.
Signed-off-by: Colin Ian King
---
drivers/net/wireless/marvell/libertas_tf/main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/wireless/marvell/libertas_tf/main.c
On Wed, Jan 16, 2019 at 05:11:34PM +0100, h...@lst.de wrote:
> On Tue, Jan 15, 2019 at 02:25:01PM -0700, Jason Gunthorpe wrote:
> > RDMA needs something similar as well, in this case drivers take a
> > struct page * from get_user_pages() and need to have the DMA map fail
> > if the platform can't
Hi,
On 1/16/2019 12:00 PM, Randy Dunlap wrote:
On 1/15/19 10:38 PM, Stephen Rothwell wrote:
Hi all,
Changes since 20190115:
on x86_64:
when CONFIG_PCI is not enabled (via randconfig):
WARNING: unmet direct dependencies detected for PCI_LOCKLESS_CONFIG
Depends on [n]: PCI [=n]
Hi Andreas,
> Am 08.01.19 um 09:41 schrieb Ben Whitten:
> > The sx125x family are IQ radio transceivers from Semtech configured over
> > SPI, they are typically connected to an sx130x series concentrator however
> > may be connected to a host directly.
>
> "SX125x" and "SX130x"
>
> >
> >
From: Mike Rapoport
Date: Wed, 16 Jan 2019 15:44:15 +0200
> Add panic() calls if memblock_alloc*() returns NULL.
>
> Most of the changes are simply addition of
>
> if(!ptr)
> panic();
>
> statements after the calls to memblock_alloc*() variants.
>
> Exceptions are
Hi Gustavo,
On 1/8/19 1:00 PM, Gustavo A. R. Silva wrote:
> One of the more common cases of allocation size calculations is finding the
> size of a structure that has a zero-sized array at the end, along with memory
> for some number of elements for that array. For example:
>
> struct foo {
>
On Wed, 16 Jan 2019, Uwe Kleine-König wrote:
> On Wed, Jan 16, 2019 at 04:40:42PM +0530, Yash Shah wrote:
> > On Wed, Jan 16, 2019 at 3:30 AM Uwe Kleine-König
> > wrote:
> > > On Fri, Jan 11, 2019 at 01:52:44PM +0530, Yash Shah wrote:
> > > > diff --git a/drivers/pwm/Kconfig
[Still in the process of sorting out my email - don't ask]
On 27/12/2018 06:13, Lokesh Vutla wrote:
> Texas Instruments' K3 generation SoCs has an IP Interrupt Router
> that does allows for redirection of input interrupts to host
> interrupt controller. Interrupt Router inputs are either from a
>
On Tue, Jan 15, 2019 at 04:02:31PM +0100, Greg Kroah-Hartman wrote:
> On Tue, Jan 15, 2019 at 10:17:09AM +0530, Nishad Kamdar wrote:
> > This switches the fbtft driver to use GPIO descriptors
> > rather than numerical gpios:
> >
> > Utilize the GPIO library's intrinsic handling of OF GPIOs
> >
Hi!
A follow up on the Edinburgh discussion I had with Daniel: I did a prototype
implementation of adaptative busy spinning with rseq. It only uses current
upstream rseq features. It's not optimized at this stage (and I don't have time
to
work more on it at the moment), and it's only x86-64, but
On Wed, Jan 16, 2019 at 09:38:09AM -0700, Mathieu Poirier wrote:
> On Wed, 16 Jan 2019 at 09:33, Greg KH wrote:
> >
> > On Wed, Jan 16, 2019 at 09:14:33AM -0700, Mathieu Poirier wrote:
> > > On Wed, 16 Jan 2019 at 08:39, Greg KH wrote:
> > > >
> > > > On Tue, Jan 15, 2019 at 04:07:37PM -0700,
From: "Gustavo A. R. Silva"
Date: Tue, 15 Jan 2019 17:14:29 -0600
> One of the more common cases of allocation size calculations is finding
> the size of a structure that has a zero-sized array at the end, along
> with memory for some number of elements for that array. For example:
>
> struct
From: "Gustavo A. R. Silva"
Date: Tue, 15 Jan 2019 17:05:39 -0600
> One of the more common cases of allocation size calculations is finding
> the size of a structure that has a zero-sized array at the end, along
> with memory for some number of elements for that array. For example:
>
> struct
On 1/16/19 5:41 AM, Nathan Chancellor wrote:
> When building an allyesconfig build with Clang, the kernel fails to link
> arch/x86/platform/efi/efi_64.o because of a failed BUILD_BUG_ON:
>
> ld: arch/x86/platform/efi/efi_64.o: in function
> `efi_sync_low_kernel_mappings':
> (.text+0x8e5):
On 1/16/19 9:28 AM, Brian Starkey wrote:
> Hi Andrew,
>
> On Fri, Jan 11, 2019 at 12:05:20PM -0600, Andrew F. Davis wrote:
>> The heap name can be used for debugging but otherwise does not seem
>> to be required and no other part of the code will fail if left NULL
>> except here. We can make it
Umm... What do I apply this patch to?
In your modified public_key_verify_signature():
> - sg_init_one(_sg, output, outlen);
> - akcipher_request_set_crypt(req, _sg, _sg, sig->s_size,
> + sg_init_one(_sg, output, outlen);
> + akcipher_request_set_crypt(req, _sg, _sg, sig->s_size,
On Wed, Jan 16, 2019 at 04:56:08PM +, Jon Hunter wrote:
>
> On 16/01/2019 16:02, Greg Kroah-Hartman wrote:
> > On Wed, Jan 16, 2019 at 09:25:12AM +, Jon Hunter wrote:
> >>
> >> On 15/01/2019 16:35, Greg Kroah-Hartman wrote:
> >>> This is the start of the stable review cycle for the
From: Li Yu
Add dma-channel-mask as a property for k3dma, it defines
available dma channels which a non-secure mode driver can use.
One sample usage of this is in Hi3660 SoC. DMA channel 0 is
reserved to lpm3, which is a coprocessor for power management. So
as a result, any request in kernel
From: Youlin Wang
Extend the k3dma driver binding to support hisi-asp hardware
variants.
Cc: Vinod Koul
Cc: Rob Herring
Cc: Mark Rutland
Cc: Zhuangluan Su
Cc: Tanglei Han
Cc: Ryan Grachek
Cc: Manivannan Sadhasivam
Cc: dmaeng...@vger.kernel.org
Cc: devicet...@vger.kernel.org
Reviewed-by:
From: Youlin Wang
Add asp-dma device to hi3660 dts
Cc: Tanglei Han
Cc: Zhuangluan Su
Cc: Ryan Grachek
Cc: Manivannan Sadhasivam
Cc: Wei Xu
Cc: Rob Herring
Cc: Mark Rutland
Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Acked-by: Manivannan Sadhasivam
Some dma channels can be reserved for secure mode or other
hardware on the SoC, so provide a binding for a bitmask
listing the available channels for the kernel to use.
This follows the pre-existing bcm,dma-channel-mask binding.
Cc: Vinod Koul
Cc: Rob Herring
Cc: Mark Rutland
Cc: Tanglei Han
Try to add DMA support to the uart nodes following
the assignments made in the dts from the victoria vendor kernel
here:
https://consumer.huawei.com/en/opensource/detail/?siteCode=worldwide=p10=openSourceSoftware=10=1
Cc: Tanglei Han
Cc: Zhuangluan Su
Cc: Ryan Grachek
Cc: Manivannan Sadhasivam
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