On Wed, Apr 24, 2019 at 09:00:25PM +, Paul Burton wrote:
> Hi Peter,
>
> On Wed, Apr 24, 2019 at 02:36:57PM +0200, Peter Zijlstra wrote:
> > There were no memory barriers on cmpxchg64() _at_all_. Fix this.
>
> This does looks problematic, but it's worth noting that this code path
> is only ap
> -Original Message-
> From: Stephen Boyd
> Sent: Thursday, April 25, 2019 4:51 AM
> To: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; Vabhav Sharma
>
> Cc: mturque...@baylibre.com; Yogesh Narayan Gaur
> ; Vabhav Sharma
>
> Subject: [EXT] Re: [PATCH] arm64: drivers: clk: qor
* Thomas Gleixner wrote:
> The magic macro DEF_NATIVE() in the paravirt patching code uses inline
> assembly to generate a data table for patching in the native instructions.
>
> While clever this is falling apart with LTO and even aside of LTO the
> construct is just working by chance accordi
On Wed, Apr 24, 2019 at 9:25 PM Camylla Cantanheide
wrote:
>
> Hello Alexandru,
>
> If you observe well the commit does the same kind of fix for the same file.
> In this case, the alignment of parenthesis in various parts of the code
> according to the checkpatch.pl's message.
>
> I believe, tha
>-Original Message-
>From: Andrew Lunn [mailto:and...@lunn.ch]
>Sent: Thursday, April 25, 2019 11:21 AM
>To: Ong, Boon Leong
>Cc: David S. Miller ; net...@vger.kernel.org; linux-
>ker...@vger.kernel.org; Kweh, Hock Leong ;
>Voon, Weifeng
>Subject: Re: [PATCH 4/7] net: stmmac: introducing
Hi, Guenter
> -Original Message-
> From: Guenter Roeck [mailto:groe...@gmail.com] On Behalf Of Guenter
> Roeck
> Sent: Thursday, April 25, 2019 10:15 AM
> To: Anson Huang ; shawn...@kernel.org;
> s.ha...@pengutronix.de; ker...@pengutronix.de; feste...@gmail.com;
> w...@linux-watchdog.org;
On Tue 23-04-19 08:44:05, Shakeel Butt wrote:
> The commit 475d0487a2ad ("mm: memcontrol: use per-cpu stocks for socket
> memory uncharging") added refill_stock() for skmem uncharging path to
> optimize workloads having high network traffic. Do the same for the kmem
> uncharging as well. Though we
Initial introduction of Lenovo Hr630 family equipped with
Aspeed 2500 BMC SoC. Hr630 is a x86 server development kit
with a ASPEED ast2500 BMC manufactured by Lenovo.
Specifically, This adds the Hr630 platform device tree file
used by the Hr630 BMC machines.
This also adds an entry of Hr630 device
On (04/25/19 14:19), Sergey Senozhatsky wrote:
>
> So may be we can move the whole thing under console_sem.
>
Something like below. I'll re-spin the series in a day or two,
we have time.
---
kernel/printk/printk.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --g
On (04/25/19 12:52), Sergey Senozhatsky wrote:
> > Could we remove it in this patch? It touches it indirectly anyway.
>
> Sure we can.
>
> We also can take extra care of pr_info("%sconsole [%s%d] enabled\n".
> Right now we do
>
> ...
> console_unlock();
> console_sysfs_notify()
Adds a driver for the Si5341 and Si5340 chips. The driver does not fully
support all features of these chips, but allows the chip to be used
without any support from the "clockbuilder pro" software.
If the chip is preprogrammed, that is, you bought one with some defaults
burned in, or you programm
* kan.li...@linux.intel.com wrote:
> +static void smi_env_check(void)
> +{
> + char *name;
> + size_t len;
> +
> + if (sysfs__read_str(CPUIDLE_CUR_DRV, &name, &len)) {
> + pr_warning("Failed to check cstate status.\n");
What a meaningless message. What did we want to do
This commit makes the kernel not send the next queued HCI command until
a command complete arrives for the last HCI command sent to the
controller. This change avoids a problem with some buggy controllers
(seen on two SKUs of QCA9377) that send an extra command complete event
for the previous comma
Quoting Stephen Rothwell (2019-04-23 14:27:26)
> Hi all,
>
> Commit
>
> 1a80c922c718 ("fixup! clk: divider: add explicit big endian support")
>
> is missing a Signed-off-by from its author and committer.
>
It will be squashed later while reintegrating the branches. So there's
nothing to see
On Thu 25-04-19 09:21:35, Fan Du wrote:
> On system with heterogeneous memory, reasonable fall back lists woul be:
> a. No fall back, stick to current running node.
> b. Fall back to other nodes of the same type or different type
>e.g. DRAM node 0 -> DRAM node 1 -> PMEM node 2 -> PMEM node 3
>
On Thu 25-04-19 09:21:30, Fan Du wrote:
[...]
> However PMEM has different characteristics from DRAM,
> the more reasonable or desirable fallback style would be:
> DRAM node 0 -> DRAM node 1 -> PMEM node 2 -> PMEM node 3.
> When DRAM is exhausted, try PMEM then.
Why and who does care? NUMA is fun
This looks good to me.
Reviewed-by: Minwoo Im
> -Original Message-
> From: Linux-nvme [mailto:linux-nvme-boun...@lists.infradead.org] On Behalf
> Of Enrico Weigelt, metux IT consult
> Sent: Wednesday, April 24, 2019 7:35 PM
> To: linux-kernel@vger.kernel.org
> Cc: ax...@kernel.dk; linux
On Thu, 2019-04-25 at 14:02 +0800, Like Xu wrote:
> On 2019/4/25 12:18, Xiaoyao Li wrote:
> > On Thu, 2019-04-25 at 10:58 +0800, Like Xu wrote:
> > > On 2019/4/24 22:32, Sean Christopherson wrote:
> > > > Now that I understand how min() works...
> > > >
> > > > On Mon, Apr 22, 2019 at 02:40:34PM +
Marc, can you please test these 3 patches on top of my original series?
Andy, patches 1 and 2 fix problems that already exist upstream. They
were not introduced by my series.
Patch 3 fixes an issue with my series where the name of the thermal
zone was too long. You can choose to fold it into the p
Hi All
On 2019-03-21 09:26, Marek Szyprowski wrote:
> Exynos Multi-Core Timer driver (exynos_mct) must be started before ARM
> Architected Timers (arch_timer), because they both share some common
> hardware blocks (global system counter) and turning on MCT is needed
> to get ARM Architected Timer
From: Junxiao Chang
When platform device is deleted or there is error in adding
device, platform device resources should be released. Currently
API release_resource is used to release platform device resources.
However, this API releases not only platform resource itself but
also its child resour
>> On 25/04/2019, at 11:36 AM, Palmer Dabbelt wrote:
>>
>> On Thu, 28 Mar 2019 21:51:38 PDT (-0700), anup.pa...@wdc.com wrote:
>> Currently, we do local TLB flush on every MM switch. This is very harsh on
>> performance because we are forcing page table walks after every MM switch.
>>
>> This
On Wed, 24 Apr 2019 at 23:01, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.19.37 release.
> There are 96 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Res
On 2019/4/25 12:18, Xiaoyao Li wrote:
On Thu, 2019-04-25 at 10:58 +0800, Like Xu wrote:
On 2019/4/24 22:32, Sean Christopherson wrote:
Now that I understand how min() works...
On Mon, Apr 22, 2019 at 02:40:34PM +0800, Like Xu wrote:
Expose Intel V2 Extended Topology Enumeration Leaf to guest
On Wed, 24 Apr 2019 at 22:57, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.14.114 release.
> There are 70 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Re
> +#ifdef CONFIG_64BIT
> +#define SCAUSE_IRQ_FLAG _AC(0x8000, UL)
> +#else
> +#define SCAUSE_IRQ_FLAG _AC(0x8000, UL)
> +#endif
Please keep the existing defintion that doesn't need an ifdef..
This patch series adds an L2 cache controller driver with DT documentation
for SiFive FU540-C000.
These two patches were initially part of the patch series:
'L2 cache controller and EDAC support for SiFive SoCs'
https://lkml.org/lkml/2019/4/15/320
In order to merge L2 cache controller driver witho
The driver currently supports only SiFive FU540-C000 platform.
The initial version of L2 cache controller driver includes:
- Initial configuration reporting at boot up.
- Support for ECC related functionality.
Signed-off-by: Yash Shah
---
arch/riscv/mm/Makefile | 1 +
arch/riscv/mm/s
Add device tree bindings for SiFive FU540 L2 cache controller driver
Signed-off-by: Yash Shah
---
.../devicetree/bindings/riscv/sifive-l2-cache.txt | 53 ++
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt
diff
This patch series adds support to access CSR using both CSR name and
CSR numbers.
Also, we should prefer accessing CSRs using their CSR numbers because:
1. It compiles fine with older toolchains.
2. We can use latest CSR names in #define macro names of CSR numbers
as-per RISC-V spec. (e.g. sptb
This patch adds SCAUSE interrupt flag and SCAUSE interrupt related
defines to asm/csr.h. We also use these defines in kernel/irq.c and
express SIE/SIP flags in-terms of SCAUSE interrupt causes.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/csr.h | 25 +
arch/riscv/
We should prefer accessing CSRs using their CSR numbers because:
1. It compiles fine with older toolchains.
2. We can use latest CSR names in #define macro names of CSR numbers
as-per RISC-V spec.
3. We can access newly added CSRs even if toolchain does not recognize
newly addes CSRs by name.
The spacing between macro name and value is not consistent in
asm/csr.h. This patch beautifies asm/csr.h by using tabs to align
macro values instead of spaces.
Signed-off-by: Anup Patel
Reviewed-by: Christoph Hellwig
---
arch/riscv/include/asm/csr.h | 76 ++--
1
From: Logesh
If the da7213 codec is configured as Master with the DAPM power down
delay time set, 'snd_soc_component_write' function overwrites the
DAI_CLK_EN bit of DAI_CLK_MODE register which leads to audio play
only once until it re-initialize after codec power up.
Signed-off-by: Logesh
---
On 2019年04月25日 06:20, Thomas Gleixner wrote:
On Wed, 24 Apr 2019, Zhao Yakui wrote:
ACRN is a flexible, lightweight reference hypervisor, built with real-time
and safety-criticality in mind, optimized to streamline embedded development
through an open source platform. It is built for embedde
On Wed, 2019-04-24 at 13:58 -0700, Sagi Grimberg wrote:
> > It isn't that the media is slow; the max timeout is based on the SLA
> > for certain classes of "fabric" outages. Linux copes *really* badly
> > with I/O errors, and if we can make the timeout last long enough to
> > cover the switch resta
Hi, Guenter
> -Original Message-
> From: Guenter Roeck [mailto:groe...@gmail.com] On Behalf Of Guenter
> Roeck
> Sent: Thursday, April 25, 2019 12:04 PM
> To: Anson Huang ; shawn...@kernel.org;
> s.ha...@pengutronix.de; ker...@pengutronix.de; feste...@gmail.com;
> w...@linux-watchdog.org;
* Fenghua Yu wrote:
> A new MSR_IA32_CORE_CAPABILITY (0xcf) is defined. Each bit in the MSR
> enumerates a model specific feature. Currently bit 5 enumerates split
> lock detection. When bit 5 is 1, split lock detection is supported.
> When the bit is 0, split lock detection is not supported.
>
* Kees Cook wrote:
> The READ_IMPLIES_EXEC work-around was designed for old CPUs lacking NX
> (to have the visible permission flags on memory regions reflect reality:
> they are all executable), and for old toolchains that lacked the ELF
> PT_GNU_STACK marking (under the assumption that toolcha
On 24-04-19, 22:56, Daniel Lezcano wrote:
> When the static power computation was removed, the test with the power
> being negative was not removed. However, the substraction which was
> responsible of the negative value was removed and the variable is now
> an u32. A double reason to remove the te
On Wed, 24 Apr 2019, Kees Cook wrote:
> Reported-by: syzbot+b562969adb2e04af3...@syzkaller.appspotmail.com
> Fixes: 6a21cc50f0c7 ("seccomp: add a return code to trap to userspace")
> CC: sta...@vger.kernel.org # v5.0+
> Signed-off-by: Tycho Andersen
> Signed-off-by: Kees Cook
Acked-by: James M
On Wed, 24 Apr 2019, Kees Cook wrote:
> Some seccomp flags will become exclusive, so the selftest needs to
> be adjusted to mask those out and test them individually for the "all
> flags" tests.
>
> Cc: sta...@vger.kernel.org # v5.0+
> Signed-off-by: Kees Cook
Acked-by: James Morris
> ---
>
On Wed, 24 Apr 2019 at 23:04, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 5.0.10 release.
> There are 115 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Res
On Wed, 24 Apr 2019 at 22:56, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.9.171 release.
> There are 44 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Res
i.MX7ULP peripheral clock ONLY allow parent/rate to be changed
with clock gated, however, during clock tree initialization, the
peripheral clock could be enabled by bootloader, but the prepare
count in clock tree is still zero, so clock core driver will allow
parent/rate changed even with CLK_SET_R
On (04/24/19 17:13), Petr Mladek wrote:
> > /*
> > * before we register a new CON_BOOT console, make sure we don't
> > @@ -2691,6 +2696,7 @@ void register_console(struct console *newcon)
> > if (!(bcon->flags & CON_BOOT)) {
> > pr_info("Too l
Since i.MX7ULP B0 chip, nic1_bus_clk's parent is changed to
from nic0_clk directly, update it accordingly.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx7ulp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx7ulp.c b/drivers/clk/imx/clk-imx7ulp.
at 9:49 PM, wrote:
Hi. I did the suggested echo and, if I clearly understood, switched to
s2idle mode without deep-mode.
For tests I use 4.19.28 on Debian-like system (Parrot OS).
If the system defaults to use S2I, then it’s better to stick with it.
Lots of ODM/OEM don’t really test S3.
So
In my opinion. patch 2/3 is about Loongson's bug, and patch 4/5 is another
theme.
Let me explain the bug more specific:
the bug ONLY matters in following situation:
#. more than one cpu (assume cpu A and B) doing ll/sc on same shared var V
#. speculative memory access from A cause A erroneous
On Wed, Apr 24, 2019 at 8:31 PM Christoph Hellwig wrote:
>
> On Wed, Apr 24, 2019 at 12:15:45PM +0530, Anup Patel wrote:
> > We need these defines for programming HIDELEG CSR in KVM kernel module
> > so it will be used at multiple places.
> >
> > >
> > > http://git.infradead.org/users/hch/misc.git
On Thu, Apr 25, 2019 at 8:19 AM Gary Guo wrote:
>
> This patch absolutely does not work with a hardware that implements ASID
> feature. Aside from many corner cases, it does not even boot on a hardware
> with ASID implemented. It only works because QEMU does not use ASID at all. I
> have alread
On Wed, 24 Apr 2019 at 18:14, David Howells wrote:
> Add a 'recurse' flag for keyring searches so that the flag can be omitted
> and recursion disabled, thereby allowing just the nominated keyring to be
> searched and none of the children.
>
> Signed-off-by: David Howells
> ---
>
> Documentation
On Wed 24 Apr 02:00 PDT 2019, Sibi Sankar wrote:
> On 4/24/19 12:19 PM, Viresh Kumar wrote:
> > On 24-04-19, 12:16, Rajendra Nayak wrote:
> > > On 4/23/2019 6:58 PM, Georgi Djakov wrote:
[..]
> > > > +/ {
> > > > + cpus {
> > > > + CPU0: cpu@0 {
> > > > + c
On Thu, 2019-04-25 at 10:58 +0800, Like Xu wrote:
> On 2019/4/24 22:32, Sean Christopherson wrote:
> > Now that I understand how min() works...
> >
> > On Mon, Apr 22, 2019 at 02:40:34PM +0800, Like Xu wrote:
> > > Expose Intel V2 Extended Topology Enumeration Leaf to guest only when
> > > host sy
On 4/24/19 6:14 PM, Anson Huang wrote:
i.MX system controller watchdog can support pretimeout IRQ
via general SCU MU IRQ, it depends on IMX_SCU and driver MUST
be probed after SCU IPC ready, then enable corresponding SCU
IRQ group and register SCU IRQ notifier, when watchdog pretimeout
IRQ fires,
From: Shun-Chih Yu
This patch fixes wrong register usage in the mtk_cqdma_start. The
destination register should be MTK_CQDMA_DST2 instead.
Fixes: b1f01e48df5a ("dmaengine: mediatek: Add MediaTek Command-Queue DMA
controller for MT6765 SoC")
Signed-off-by: Shun-Chih Yu
---
drivers/dma/mediate
On (04/24/19 16:49), Petr Mladek wrote:
> > + if (bcon && (newcon->flags & (CON_CONSDEV|CON_BOOT)) == CON_CONSDEV) {
> > + console_lock();
> > + /*
> > +* We need to iterate through all boot consoles, to make
> > * sure we print everything out, before
Hi Peter,
Thanks for your comments.
On 2019/4/24 2:44, Peter Zijlstra wrote:
> On Sat, Apr 20, 2019 at 04:34:16PM +0800, Xie XiuQi wrote:
>> We meet a divide error on 3.10.0 kernel, the error message is bellow:
>
> That is a _realll_ old kernel. I would urge you to upgrade.
I will.
>
On Wed, Apr 24, 2019 at 10:39 AM Andrew Peng wrote:
>
> Initial introduction of Lenovo Hr630 family equipped with
> Aspeed 2500 BMC SoC. Hr630 is a x86 server development kit
> with a ASPEED ast2500 BMC manufactured by Lenovo.
> Specifically, This adds the Hr630 platform device tree file
> used by
> -Original Message-
> From: Gary Guo
> Sent: Thursday, April 25, 2019 8:19 AM
> To: Anup Patel ; Palmer Dabbelt
>
> Cc: Anup Patel ; Albert Ou
> ; Atish Patra ; Christoph
> Hellwig ; Paul Walmsley ;
> Mike Rapoport ; linux-ri...@lists.infradead.org; linux-
> ker...@vger.kernel.org List
On Wed, Apr 24, 2019 at 08:48:58PM +0200, Miroslav Benes wrote:
> On Wed, 24 Apr 2019, Josh Poimboeuf wrote:
>
[...]
> > > ret = save_stack_trace_tsk_reliable(task, &trace);
> > > - WARN_ON_ONCE(ret == -ENOSYS);
> > > + if (ret == -ENOSYS) {
> > > + if (!enosys_warned) {
> > > +
Hi Fan Du,
I think we should change the print in mminit_verify_zonelist too.
This patch changes the order of ZONELIST_FALLBACK, so the default numa policy
can
alloc DRAM first, then PMEM, right?
Thanks,
Xishi Qiu
> On system with heterogeneous memory, reasonable fall back lists woul be:
>
On Wed, Apr 24, 2019 at 10:55:49AM +0200, Petr Mladek wrote:
> WARN_ONCE() in the generic save_stack_trace_tsk_reliable() is superfluous.
> The only current user klp_check_stack() writes its own warning when
> -ENOSYS is returned.
>
> Signed-off-by: Petr Mladek
Reviewed-by: Kamalesh Babulal
--
On Wed, Apr 24, 2019 at 10:55:48AM +0200, Petr Mladek wrote:
> The commit d0807da78e11d46f ("livepatch: Remove immediate feature") caused
> that any livepatch was refused when reliable stacktraces were not supported
> on the given architecture.
>
> The limitation is too strong. User space processe
On Wed, Apr 24, 2019 at 10:00 PM Julien Desfossez
wrote:
>
> On 24-Apr-2019 09:13:10 PM, Aubrey Li wrote:
> > On Wed, Apr 24, 2019 at 12:18 AM Vineeth Remanan Pillai
> > wrote:
> > >
> > > Second iteration of the core-scheduling feature.
> > >
> > > This version fixes apparent bugs and performanc
In the fixes commit, removing SIGKILL from each thread signal mask
and executing "goto fatal" directly will skip the call to
"trace_signal_deliver". At this point, the delivery tracking of the SIGKILL
signal will be inaccurate.
Therefore, we need to add trace_signal_deliver before "goto fatal"
aft
On 2019/4/24 22:32, Sean Christopherson wrote:
Now that I understand how min() works...
On Mon, Apr 22, 2019 at 02:40:34PM +0800, Like Xu wrote:
Expose Intel V2 Extended Topology Enumeration Leaf to guest only when
host system has multiple software-visible die within each package.
Signed-off-b
This patch absolutely does not work with a hardware that implements ASID
feature. Aside from many corner cases, it does not even boot on a hardware with
ASID implemented. It only works because QEMU does not use ASID at all. I have
already pointed out many issues multiple times in the thread but
On 4/24/19 6:14 PM, Anson Huang wrote:
The imx_scu_irq_group_enable() is normally called during module driver
probe phase to enable SCU group irq, e.g., i.MX system controller
watchdog driver will call it during its driver probe phase, as i.MX
system controller watchdog driver does NOT need SCU I
On 04/25 Christian wrote:
>On Wed, Apr 24, 2019 at 6:16 PM Oleg Nesterov wrote:
>>
>> On 04/24, weizhenliang wrote:
>> >
>> > On 04/24, Oleg wrote:
>> > >On 04/24, Christian Brauner wrote:
>> > >>
>> > >> On Wed, Apr 24, 2019 at 08:52:38PM +0800, Zhenliang Wei wrote:
>> > >>
>> > >> > Reviewed-by:
On Thu, Apr 25, 2019 at 5:06 AM Palmer Dabbelt wrote:
>
> On Thu, 28 Mar 2019 21:51:38 PDT (-0700), anup.pa...@wdc.com wrote:
> > Currently, we do local TLB flush on every MM switch. This is very harsh on
> > performance because we are forcing page table walks after every MM switch.
> >
> > This p
Gentle ping...
> -Original Message-
> From: Anson Huang
> Sent: Thursday, April 4, 2019 9:40 AM
> To: dmitry.torok...@gmail.com; shawn...@kernel.org;
> s.ha...@pengutronix.de; ker...@pengutronix.de; feste...@gmail.com;
> linux-in...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; li
On 2019/4/25 5:18, Thomas Gleixner wrote:
> On Mon, 22 Apr 2019, Aubrey Li wrote:
>> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
>> index 5ad92419be19..d5a9c5ddd453 100644
>> --- a/arch/x86/Kconfig
>> +++ b/arch/x86/Kconfig
>> @@ -208,6 +208,7 @@ config X86
>> select USER_STACKTRACE_SUPPO
From: Jojo Zeng
the comments which discribed the input parameters of of_match_device().
the name is changed, so fix it.
Signed-off-by: Jojo Zeng
---
drivers/of/device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/of/device.c b/drivers/of/device.c
index 3717f2a.
On system with heterogeneous memory, reasonable fall back lists woul be:
a. No fall back, stick to current running node.
b. Fall back to other nodes of the same type or different type
e.g. DRAM node 0 -> DRAM node 1 -> PMEM node 2 -> PMEM node 3
c. Fall back to other nodes of the same type only.
This is another approach of building zonelist based on patch #10 of
patchset[1].
For systems with heterogeneous DRAM and PMEM (persistent memory),
1) change ZONELIST_FALLBACK to first fallback to same type nodes,
then the other types
2) add ZONELIST_FALLBACK_SAME_TYPE to fallback only same ty
On box with both DRAM and PMEM managed by mm system,
Usually node 0, 1 are DRAM nodes, nodes 2, 3 are PMEM nodes.
nofallback list are same as before, fallback list are not
redesigned to be arranged by node type basis, iow,
allocation request of DRAM page start from node 0 will go
through node0->nod
Mark NUMA node as DRAM or PMEM.
This could happen in boot up state (see the e820 pmem type
override patch), or on fly when bind devdax device with kmem
driver.
It depends on BIOS supplying PMEM NUMA proximity in SRAT table,
that's current production BIOS does.
Signed-off-by: Fan Du
---
arch/x8
One system with DRAM and PMEM, we need new flag
to tag pgdat is made of DRAM or peristent memory.
This patch serves as preparetion one for follow up patch.
Signed-off-by: Fan Du
---
include/linux/mmzone.h | 26 ++
1 file changed, 26 insertions(+)
diff --git a/include/li
Give the newly created node a type per SRAT attribution.
Signed-off-by: Fan Du
---
arch/x86/mm/numa.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/mm/numa.c b/arch/x86/mm/numa.c
index 3c3a1f5..ff8ad63 100644
--- a/arch/x86/mm/numa.c
+++ b/arch/x86/mm/numa.c
@@ -590,6 +590,7 @@ st
On Wed, Apr 24, 2019 at 5:42 AM Daniel Gomez wrote:
>
> Add missing table for SPI driver relying on SPI
> device match since compatible is in a DT binding or in a DTS.
>
> Before this patch:
> modinfo drivers/iio/temperature/maxim_thermocouple.ko | grep alias
> alias: spi:max31855
> alia
i.MX system controller watchdog can support pretimeout IRQ
via general SCU MU IRQ, it depends on IMX_SCU and driver MUST
be probed after SCU IPC ready, then enable corresponding SCU
IRQ group and register SCU IRQ notifier, when watchdog pretimeout
IRQ fires, SCU MU IRQ will be handled and watchdog
The imx_scu_irq_group_enable() is normally called during module driver
probe phase to enable SCU group irq, e.g., i.MX system controller
watchdog driver will call it during its driver probe phase, as i.MX
system controller watchdog driver does NOT need SCU IPC handle for
operations, so it could be
Thanks for the fix Enrico. I'm still wondering on what platform
you got this error ?
Looks good.
Reviewed-by: Chaitanya Kulkarni
On 04/24/2019 03:35 AM, Enrico Weigelt, metux IT consult wrote:
> Build breaks:
>
> drivers/nvme/target/core.c: In function 'nvmet_req_alloc_sgl':
> drivers
On Wed, 24 Apr 2019, Paul Burton wrote:
> > > Any idea why 0x7273 is not accepted by my assembler ?
>
> I don't know why the assembler wants a smaller immediate than the
> instruction encoding allows... There's a comment in the binutils file
> include/opcode/mips.h that reads:
>
> > A breakpoint
Add a IIO driver that reports the angle between the lid and the base for
ChromeOS convertible device.
Tested on eve with ToT EC firmware.
Check driver is loaded and lid angle is correct.
Signed-off-by: Gwendal Grignou
---
Changes in v6:
- Fix lock held in an error path error.
Changes in v5:
- R
On Wed, Apr 24, 2019 at 03:46:24PM -0700, Andrew Morton wrote:
> On Wed, 24 Apr 2019 10:04:03 +0100 Mel Gorman
> wrote:
>
> > On Tue, Apr 23, 2019 at 12:01:43PM -0700, Andrew Morton wrote:
> > > On Tue, 23 Apr 2019 15:08:06 +0300 Andrey Ryabinin
> > > wrote:
> > >
> > > > Commit 0a79cdad5eb2
The pull request you sent on Wed, 24 Apr 2019 21:34:13 +0200:
> git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds.git
> tags/leds-for-5.1-rc7
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/11bfe6473bf2c83e4cc44fe97d95a8b0dae1e419
Thank you!
--
D
On Thu, 28 Mar 2019 21:51:38 PDT (-0700), anup.pa...@wdc.com wrote:
Currently, we do local TLB flush on every MM switch. This is very harsh on
performance because we are forcing page table walks after every MM switch.
This patch implements ASID allocator for assigning an ASID to a MM context.
Th
Replace (1 << ...) with BIT().
Signed-off-by: Gwendal Grignou
---
include/linux/mfd/cros_ec_commands.h | 110 +--
1 file changed, 55 insertions(+), 55 deletions(-)
diff --git a/include/linux/mfd/cros_ec_commands.h
b/include/linux/mfd/cros_ec_commands.h
index 735d4f8ce09
Update to SPDX-License-Identifier, GPL-2.0
Signed-off-by: Gwendal Grignou
---
include/linux/mfd/cros_ec_commands.h | 20 +---
1 file changed, 5 insertions(+), 15 deletions(-)
diff --git a/include/linux/mfd/cros_ec_commands.h
b/include/linux/mfd/cros_ec_commands.h
index 43bee4f7
This change is required for compilation of embedded controller firmware
to work properly (See CONFIG_HOSTCMD_SECTION_SORTED).
Signed-off-by: Gwendal Grignou
---
include/linux/mfd/cros_ec_commands.h | 235 ---
1 file changed, 136 insertions(+), 99 deletions(-)
diff --git
Defined out build macro used when compiling embedded controller
firmware.
Signed-off-by: Gwendal Grignou
---
include/linux/mfd/cros_ec_commands.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/linux/mfd/cros_ec_commands.h
b/include/linux/mfd/cros_ec_commands.h
index 6fa508643d
Move near the end of file.
Signed-off-by: Gwendal Grignou
---
include/linux/mfd/cros_ec_commands.h | 148 ++-
1 file changed, 75 insertions(+), 73 deletions(-)
diff --git a/include/linux/mfd/cros_ec_commands.h
b/include/linux/mfd/cros_ec_commands.h
index 6538c5789c43..6
New API split commands, improve EC command latency.
Signed-off-by: Gwendal Grignou
---
include/linux/mfd/cros_ec_commands.h | 124 ++-
1 file changed, 120 insertions(+), 4 deletions(-)
diff --git a/include/linux/mfd/cros_ec_commands.h
b/include/linux/mfd/cros_ec_command
Improve API between EC and Host to report events.
Signed-off-by: Gwendal Grignou
---
include/linux/mfd/cros_ec_commands.h | 115 ---
1 file changed, 105 insertions(+), 10 deletions(-)
diff --git a/include/linux/mfd/cros_ec_commands.h
b/include/linux/mfd/cros_ec_commands
Improve API to verify EC image signature.
Signed-off-by: Gwendal Grignou
---
include/linux/mfd/cros_ec_commands.h | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/include/linux/mfd/cros_ec_commands.h
b/include/linux/mfd/cros_ec_commands.h
index d55f155eb735..29a99
Add new command for batched mode, add support for more sensors.
Signed-off-by: Gwendal Grignou
---
include/linux/mfd/cros_ec_commands.h | 464 +++
1 file changed, 406 insertions(+), 58 deletions(-)
diff --git a/include/linux/mfd/cros_ec_commands.h
b/include/linux/mfd/cr
Add more fields and improve API when EC presents data through ACPI
memory space.
Signed-off-by: Gwendal Grignou
---
include/linux/mfd/cros_ec_commands.h | 419 +++
1 file changed, 293 insertions(+), 126 deletions(-)
diff --git a/include/linux/mfd/cros_ec_commands.h
b/in
Introduce a new transport procotol between EC and host.
Signed-off-by: Gwendal Grignou
---
include/linux/mfd/cros_ec_commands.h | 143 ++-
1 file changed, 141 insertions(+), 2 deletions(-)
diff --git a/include/linux/mfd/cros_ec_commands.h
b/include/linux/mfd/cros_ec_com
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