On 19/06/19 09:52, Dongli Zhang wrote:
> The 'affinity_hint_set' is not used any longer since
> commit 0d9f0a52c8b9 ("virtio_scsi: use virtio IRQ affinity").
>
> Signed-off-by: Dongli Zhang
> ---
> drivers/scsi/virtio_scsi.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git
On 19/06/2019 11:13, Jon Hunter wrote:
On 19/06/2019 11:08, Ben Dooks wrote:
On 19/06/2019 11:04, Jon Hunter wrote:
On 19/06/2019 00:27, Dmitry Osipenko wrote:
19.06.2019 1:22, Ben Dooks пишет:
On 13/06/2019 22:08, Dmitry Osipenko wrote:
Tegra's APB DMA engine updates words counter after
Abhishek's on June 19, 2019 7:08 pm:
> Hi Nick,
>
> Thanks for the review. Some replies below.
>
> On 06/19/2019 09:53 AM, Nicholas Piggin wrote:
>> Abhishek Goel's on June 17, 2019 7:56 pm:
>>> Currently, the cpuidle governors determine what idle state a idling CPU
>>> should enter into based
On 19/06/2019 11:08, Ben Dooks wrote:
> On 19/06/2019 11:04, Jon Hunter wrote:
>>
>> On 19/06/2019 00:27, Dmitry Osipenko wrote:
>>> 19.06.2019 1:22, Ben Dooks пишет:
On 13/06/2019 22:08, Dmitry Osipenko wrote:
> Tegra's APB DMA engine updates words counter after each transferred
>
On 19/06/2019 11:04, Jon Hunter wrote:
On 19/06/2019 00:27, Dmitry Osipenko wrote:
19.06.2019 1:22, Ben Dooks пишет:
On 13/06/2019 22:08, Dmitry Osipenko wrote:
Tegra's APB DMA engine updates words counter after each transferred burst
of data, hence it can report transfer's residual with
Hi all,
After merging the akpm-current tree, today's linux-next build (x86_64
allmodconfig) failed like this:
In file included from usr/include/linux/byteorder/big_endian.hdrtest.c:1:
./usr/include/linux/byteorder/big_endian.h:6:2: error: #error "Unsupported
endianness, check your toolchain"
On Tue, 18 Jun 2019, Tim Chen wrote:
> Add documentation for Spectre vulnerability and the mitigation mechanisms:
>
> - Explain the problem and risks
> - Document the mitigation mechanisms
> - Document the command line controls
> - Document the sysfs files
>
> Co-developed-by: Andi Kleen
>
On 19/06/2019 00:27, Dmitry Osipenko wrote:
> 19.06.2019 1:22, Ben Dooks пишет:
>> On 13/06/2019 22:08, Dmitry Osipenko wrote:
>>> Tegra's APB DMA engine updates words counter after each transferred burst
>>> of data, hence it can report transfer's residual with more fidelity which
>>> may be
Quoting Chris Wilson (2019-06-12 08:42:05)
> Quoting Kirill A. Shutemov (2019-06-12 02:46:34)
> > On Sun, Jun 02, 2019 at 10:47:35PM +0100, Chris Wilson wrote:
> > > Quoting Matthew Wilcox (2019-03-07 15:30:51)
> > > > diff --git a/mm/huge_memory.c b/mm/huge_memory.c
> > > > index
+++ Yang Yingliang [19/06/19 10:28 +0800]:
On 2019/6/18 21:48, Jessica Yu wrote:
+++ Yang Yingliang [17/06/19 14:59 +0800]:
When loading a module with rodata=n, it causes an executing
NX-protected page BUG.
[ 32.379191] kernel tried to execute NX-protected page - exploit
attempt? (uid:
On Wed, Jun 19, 2019 at 11:59 AM Rafael J. Wysocki wrote:
>
> On Tuesday, June 18, 2019 11:05:44 PM CEST Mauro Carvalho Chehab wrote:
> > The intel-int3496.txt file is a documentation for an ACPI driver.
> >
> > There's no reason to keep it on a separate directory.
> >
> > So, instead of keeping
In case the requested gpio property is not found in the device tree, some
callers of gpiod_get_from_of_node() expect a return value of NULL, others
expect -ENOENT.
In particular devm_fwnode_get_index_gpiod_from_child() expects -ENOENT.
Currently it gets a NULL, which breaks the loop that tries all
The comment is correct, but the code ends up moving the bits four
places too far, into the VTUOp field.
Fixes: 11ea809f1a74 (net: dsa: mv88e6xxx: support 256 databases)
Signed-off-by: Rasmus Villemoes
---
drivers/net/dsa/mv88e6xxx/global1_vtu.c | 2 +-
1 file changed, 1 insertion(+), 1
The comment is correct, but the code ends up moving the bits four
places too far, into the VTUOp field.
Fixes: bec8e5725281 (net: dsa: mv88e6xxx: implement vtu_getnext and
vtu_loadpurge for mv88e6250)
Signed-off-by: Rasmus Villemoes
---
drivers/net/dsa/mv88e6xxx/global1_vtu.c | 2 +-
1 file
>
> From: Marcel Ziswiler
> Sent: Thursday, June 13, 2019 12:05
> To: feste...@gmail.com; Oleksandr Suvorov
> Cc: Igor Opaniuk; linux-kernel@vger.kernel.org; alsa-de...@alsa-project.org
> Subject: Re: [PATCH v1 1/6] ASoC: sgtl5000: Fix definition of VAG
> > And x86 static calls implementation uses '.bundle_align_mode' directive
> too.
>
> Ok then we have a case for pushing for this feature in tools !
Still, I cannot understand how you want to use bundle_align_mode without the
align directive.
On 6/19/19 11:52 AM, Marcos Paulo de Souza wrote:
> On Wed, Jun 19, 2019 at 08:34:56AM +0200, Hannes Reinecke wrote:
>> On 6/19/19 5:35 AM, Martin K. Petersen wrote:
>>>
>>> Marcos,
>>>
WWID composed from VPD data from device, specifically page 0x83. So,
when a device does not have VPD
On Wed, Jun 19, 2019 at 11:04:15AM +0200, Gerd Hoffmann wrote:
> Call reservation_object_* directly instead
> of using ttm_bo_{reserve,unreserve}.
>
> v3: check for EINTR too.
>
> Signed-off-by: Gerd Hoffmann
> Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/virtio/virtgpu_drv.h | 6 +++---
On 18/06/2019 18:50, Bjorn Helgaas wrote:
[+cc Rafael, Mika, Jiang, linux-pci for ACPI host bridge hotplug test question]
Resend with bouncing addresses removed/fixed
On Tue, Jun 18, 2019 at 3:44 AM John Garry wrote:
Could you just move the logic_pio_register_range() call farther down
in
Nicholas Piggin wrote:
Michael Ellerman's on June 19, 2019 3:14 pm:
Hi Naveen,
Sorry I meant to reply to this earlier .. :/
No problem. Thanks for the questions.
"Naveen N. Rao" writes:
With -mprofile-kernel, gcc emits 'mflr r0', followed by 'bl _mcount' to
enable function tracing and
This series adds missing generic 3-cells PWM to STM32 timers dt-bindings,
PWM driver, and the relevant dtsi files for STM32F4, STM32F7 and STM32MP1.
Fabrice Gasnier (5):
dt-bindings: pwm-stm32: add #pwm-cells
pwm: stm32: use 3 cells ->of_xlate()
ARM: dts: stm32: add pwm cells to stm32mp157c
STM32 Timers support generic 3 cells PWM to encode PWM number, period and
polarity.
Fixes: 61fc211c484d ("ARM: dts: stm32: add timers support to stm32mp157c")
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c.dtsi | 12
1 file changed, 12 insertions(+)
diff --git
STM32 Timers support generic 3 cells PWM bindings to encode PWM number,
period and polarity as defined in pwm.txt.
Fixes: cd9a99c2f8e8 ("dt-bindings: pwm: Add STM32 bindings")
Signed-off-by: Fabrice Gasnier
---
Documentation/devicetree/bindings/pwm/pwm-stm32.txt | 3 +++
1 file changed, 3
STM32 Timers support generic 3 cells PWM to encode PWM number, period and
polarity.
Fixes: 9bd7b77af8e4 ("ARM: dts: stm32: add Timers driver for stm32f746
MCU")
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32f746.dtsi | 12
1 file changed, 12 insertions(+)
diff --git
STM32 Timers support generic 3 cells PWM to encode PWM number, period and
polarity.
Fixes: 7edf7369205b ("pwm: Add driver for STM32 plaftorm")
Signed-off-by: Fabrice Gasnier
---
drivers/pwm/pwm-stm32.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pwm/pwm-stm32.c
STM32 Timers support generic 3 cells PWM to encode PWM number, period and
polarity.
Fixes: c0e14fc712d9 ("ARM: dts: stm32: add Timers driver for stm32f429
MCU")
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32f429.dtsi | 12
1 file changed, 12 insertions(+)
diff --git
On Wed, Jun 19, 2019 at 08:34:56AM +0200, Hannes Reinecke wrote:
> On 6/19/19 5:35 AM, Martin K. Petersen wrote:
> >
> > Marcos,
> >
> >> WWID composed from VPD data from device, specifically page 0x83. So,
> >> when a device does not have VPD support, for example USB storage
> >> devices where
Hi Linus,
Please pull from the tag
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
pm-5.2-rc6
with top-most commit 3e26c5feed2add218046ecf91bab3cfa9bf762a6
PCI: PM: Skip devices in D0 for suspend-to-idle
on top of commit d1fdb6d8f6a4109a4263176c84b899076a5f8008
Linux
Sorry, I seem to have missed this email.
On Mon, May 06, 2019 at 06:50:09PM +0200, Oleg Nesterov wrote:
> On 05/03, Peter Zijlstra wrote:
> >
> > -static void lockdep_sb_freeze_release(struct super_block *sb)
> > -{
> > - int level;
> > -
> > - for (level = SB_FREEZE_LEVELS - 1; level >= 0;
On 2019/6/18 23:58, Pablo Neira Ayuso wrote:
> On Thu, Apr 25, 2019 at 09:43:53PM +0800, linmiaohe wrote:
>> From: Miaohe Lin
>>
>> When firewalld is enabled with ipv4/ipv6 rpfilter, vrf
>> ipv4/ipv6 packets will be dropped because in device is vrf but out
>> device is an enslaved device. So
On 18/06/2019 18:50, Bjorn Helgaas wrote:
[+cc Rafael, Mika, Jiang, linux-pci for ACPI host bridge hotplug test question]
On Tue, Jun 18, 2019 at 3:44 AM John Garry wrote:
Could you just move the logic_pio_register_range() call farther down
in hisi_lpc_probe()? IIUC, once
On Tue, Jun 18, 2019 at 11:21:22PM -0400, Martin K. Petersen wrote:
>
> Marcos,
>
> > Currently, all USB devices skip VPD pages, even when the device
> > supports them (SPC-3 and later), but some of them support VPD, like
> > Cruzer Blade.
>
> What's your confidence level wrt. all Cruzer Blades
On Thu, 2019-03-21 at 13:57 +0800, Nicolas Boichat wrote:
> On Tue, Mar 19, 2019 at 4:02 PM Weiyi Lu wrote:
> >
> > Both MT8183 & MT6765 have more control steps of bus protection
> > than previous project. And there add more bus protection registers
> > reside at infracfg & smi-common. Also add
On 18/06/2019 17:31, Douglas Gilbert wrote:
> On 2019-06-18 3:29 a.m., Marc Gonzalez wrote:
>
>> Please note that I am _in no way_ suggesting that we remove any code.
>>
>> I just think it might be time to stop forcing CONFIG_SCSI_PROC_FS into
>> every config, and instead require one to
On Tue, 2019-06-18 at 16:23 -0700, Nick Desaulniers wrote:
> As a side note, I'm going to try to see if MAINTAINERS and
> scripts/get_maintainers.pl supports regexes on the commit messages in
> order to cc our mailing list
Neither. Why should either?
Hi Rafael,
On Wednesday, June 19, 2019 06:45, Rafael J. Wysocki wrote:
>
> On Monday, May 20, 2019 11:52:36 AM CEST Ran Wang wrote:
> > Some user might want to go through all registered wakeup sources and
> > doing things accordingly. For example, SoC PM driver might need to do
> > HW
On Thu, 2019-03-21 at 14:02 +0800, Nicolas Boichat wrote:
> On Tue, Mar 19, 2019 at 4:02 PM Weiyi Lu wrote:
> >
> > Try to stop extending the clk_id or clk_names if there are
> > more and more new BASIC clocks. To get its own clocks by the
> > basic_clk_name of each power domain.
> >
> >
On Wed, Jun 19, 2019 at 09:40:46AM +0100, Parshuram Thombare wrote:
> This patch add support for SGMII interface) and
> 2.5Gbps MAC in Cadence ethernet controller driver.
>
> Signed-off-by: Parshuram Thombare
> ---
> drivers/net/ethernet/cadence/macb.h | 76 ++--
>
On Tue, 2019-03-19 at 20:09 +0800, Nicolas Boichat wrote:
> On Tue, Mar 19, 2019 at 4:02 PM Weiyi Lu wrote:
> >
> > Put bus protection enable and disable control in separate functions.
> >
> > Signed-off-by: Weiyi Lu
> > ---
> > drivers/soc/mediatek/mtk-scpsys.c | 48
Hi Bob,
On Tue, 18 Jun 2019, Moore, Robert wrote:
-Original Message-
From: Moore, Robert
Sent: Tuesday, June 18, 2019 1:25 PM
To: 'Nikolaus Voss'
Cc: 'Rafael J. Wysocki' ; 'Rafael J. Wysocki'
; 'Len Brown' ; Schmauss, Erik
; 'Jacek Anaszewski'
; 'Pavel Machek' ; 'Dan
Murphy' ;
On Tue, 2019-03-19 at 20:07 +0800, Nicolas Boichat wrote:
> On Tue, Mar 19, 2019 at 4:02 PM Weiyi Lu wrote:
> >
> > Put sram enable and disable control in separate functions.
> >
> > Signed-off-by: Weiyi Lu
>
> Refactoring looks ok, just a small comment.
>
> Reviewed-by: Nicolas Boichat
>
>
On Wed, Jun 05, 2019 at 04:20:03PM +0200, Michal Koutný
wrote:
> I considered relaxing the check to non-root cgroups only, however, as
> your example shows, it doesn't prevent reaching the avoided state by
> other paths. I'm not that familiar with RT sched to tell whether
> RT-priority tasks in
On Wed, 19 Jun 2019 13:26:37 +0530
"Naveen N. Rao" wrote:
> > In include/ftrace.h:
> >
> > #ifndef FTRACE_IP_EXTENSION
> > # define FTRACE_IP_EXTENSION0
> > #endif
> >
> >
> > In arch/powerpc/include/asm/ftrace.h
> >
> > #define FTRACE_IP_EXTENSION MCOUNT_INSN_SIZE
> >
> >
> > Then
On Wed, Jun 19, 2019 at 09:40:36AM +0100, Parshuram Thombare wrote:
> This patch replace phylib API's by phylink API's.
>
> Signed-off-by: Parshuram Thombare
> ---
> drivers/net/ethernet/cadence/Kconfig | 2 +-
> drivers/net/ethernet/cadence/macb.h | 3 +
>
On Tue, 2019-03-19 at 20:02 +0800, Nicolas Boichat wrote:
> On Tue, Mar 19, 2019 at 4:02 PM Weiyi Lu wrote:
> >
> > Put clock enable and disable control in separate function.
> >
> > Signed-off-by: Weiyi Lu
> > ---
> > drivers/soc/mediatek/mtk-scpsys.c | 49 ---
> >
On Wed, 19 Jun 2019 11:28:22 +0900
Masami Hiramatsu wrote:
> > BTW,
> >
> > I pulled in patches 1-9 and I'm starting to test them now.
>
> Thanks! Should I send 10-21 patches in v2?
Yes please.
The tests have passed, and I will be pushing them to linux-next soon.
But as I'm currently
On 18/06/2019 22:28, Jeremy Linton wrote:
Hi,
On 6/18/19 12:23 PM, John Garry wrote:
On 18/06/2019 15:40, Valentin Schneider wrote:
On 18/06/2019 15:21, Jeremy Linton wrote:
[...]
+ * Return: -ENOENT if the PPTT doesn't exist, the CPU cannot be
found or
+ * the table revision isn't new
On Wed, Jun 19, 2019 at 8:39 AM Viresh Kumar wrote:
>
> On 19-06-19, 00:23, Rafael J. Wysocki wrote:
> > In patch [3/5] you could point notifiers for both min and max freq to the
> > same
> > notifier head. Both of your notifiers end up calling
> > cpufreq_update_policy()
> > anyway.
>
> I
On Tue, 2019-03-19 at 19:45 +0800, Nicolas Boichat wrote:
> On Tue, Mar 19, 2019 at 4:02 PM Weiyi Lu wrote:
> >
> > Use USEC_PER_SEC to indicate the polling timeout directly.
> > And add documentation of scp_domain_data.
> >
> > Signed-off-by: Weiyi Lu
> > ---
> >
On Wed, Jun 19, 2019 at 09:54:21AM +0100, Julien Grall wrote:
> On 6/19/19 9:07 AM, Guo Ren wrote:
> > You forgot CCing C-SKY folks :P
>
> I wasn't aware you could be interested :).
>
> > Move arm asid allocator code in a generic one is a agood idea, I've
> > made a patchset for C-SKY and test
19.06.2019 12:02, Dmitry Osipenko пишет:
> 19.06.2019 11:58, Jon Hunter пишет:
>>
>> On 18/06/2019 19:26, Dmitry Osipenko wrote:
>>> 18.06.2019 11:42, Bitan Biswas пишет:
tegra_i2c_xfer_msg initiates the I2C transfer in DMA
or PIO mode. It involves steps that need FIFO register
Hi Nick,
Thanks for the review. Some replies below.
On 06/19/2019 09:53 AM, Nicholas Piggin wrote:
Abhishek Goel's on June 17, 2019 7:56 pm:
Currently, the cpuidle governors determine what idle state a idling CPU
should enter into based on heuristics that depend on the idle history on
that
On Wed, 19 Jun 2019 16:55:52 +0800
masonccy...@mxic.com.tw wrote:
> Hi Boris,
>
> > > >
> > > > Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND
> controller
> > > >
> > > > On Tue, 18 Jun 2019 08:14:36 +0200
> > > > Boris Brezillon wrote:
> > > >
> > > > > > > > > >
> > > >
19.06.2019 11:58, Jon Hunter пишет:
>
> On 18/06/2019 19:26, Dmitry Osipenko wrote:
>> 18.06.2019 11:42, Bitan Biswas пишет:
>>> tegra_i2c_xfer_msg initiates the I2C transfer in DMA
>>> or PIO mode. It involves steps that need FIFO register
>>> access, DMA API calls like
From: Colin Ian King
Pointer 'node' is assigned a value that is never read, node is
later overwritten when it re-assigned a different value inside
the while-loop. The assignment is redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
On 18/06/2019 19:26, Dmitry Osipenko wrote:
> 18.06.2019 11:42, Bitan Biswas пишет:
>> tegra_i2c_xfer_msg initiates the I2C transfer in DMA
>> or PIO mode. It involves steps that need FIFO register
>> access, DMA API calls like dma_sync_single_for_device, etc.
>> Tegra I2C ISR has calls to
On Wed, Jun 19, 2019 at 10:33:08AM +0200, Thierry Reding wrote:
> On Tue, Jun 18, 2019 at 09:41:03AM -0600, Stephen Warren wrote:
> > On 6/18/19 3:30 AM, Dmitry Osipenko wrote:
> > > 18.06.2019 12:22, Dmitry Osipenko пишет:
> > > > 18.06.2019 10:46, Sowjanya Komatineni пишет:
> > > > > This patch
Hi Boris,
> > >
> > > Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND
controller
> > >
> > > On Tue, 18 Jun 2019 08:14:36 +0200
> > > Boris Brezillon wrote:
> > >
> > > > > > > > >
> > > > > > > > > How to make all #CS keep high for NAND to enter
> > > > > > > > > low-power
Greetings!
As the guilty party in authoring this, and also pretty new around here
I’m wondering what I need to do to help clean it up?
> On 19 Jun 2019, at 05:14, Masahiro Yamada
> wrote:
>
> On Wed, Jun 19, 2019 at 1:02 PM Masahiro Yamada
> wrote:
>>
>> Hi.
>>
>>
>> On Wed, Jun 19, 2019
Hi Miquel,
> > >
> > > Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND
controller
> > >
> > > On Tue, 18 Jun 2019 08:14:36 +0200
> > > Boris Brezillon wrote:
> > >
> > > > > > > > >
> > > > > > > > > How to make all #CS keep high for NAND to enter
> > > > > > > > > low-power
On 17/06/2019 22:09, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.128 release.
> There are 53 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
> > +static int est_poll_srwo(void *ioaddr) {
> > + /* Poll until the EST GCL Control[SRWO] bit clears.
> > +* Total wait = 12 x 50ms ~= 0.6s.
> > +*/
> > + unsigned int retries = 12;
> > + unsigned int value;
> > +
> > + do {
> > + value = TSN_RD32(ioaddr +
On 17/06/2019 22:08, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.1.12 release.
> There are 115 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
On 17/06/2019 22:09, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.19.53 release.
> There are 75 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
New parameters added to Cadence ethernet controller DT binding
for USXGMII interface.
Signed-off-by: Parshuram Thombare
---
Documentation/devicetree/bindings/net/macb.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
19.06.2019 11:31, Thierry Reding пишет:
> On Tue, Jun 18, 2019 at 11:00:05PM +0300, Dmitry Osipenko wrote:
>> 18.06.2019 20:34, Sowjanya Komatineni пишет:
>>>
>>> On 6/18/19 9:50 AM, Sowjanya Komatineni wrote:
On 6/18/19 8:41 AM, Stephen Warren wrote:
> On 6/18/19 3:30 AM, Dmitry
Hi Uffe,
> -Original Message-
> From: Ulf Hansson
> Sent: Monday, June 17, 2019 5:51 PM
[...]
>
> The "const struct zynqmp_eemi_ops *eemi_ops; should then be moved into
> a clock provider specific struct, which is assigned when calling
> sdhci_arasan_register_sdclk. I understand that
This patch replace phylib API's by phylink API's.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/Kconfig | 2 +-
drivers/net/ethernet/cadence/macb.h | 3 +
drivers/net/ethernet/cadence/macb_main.c | 312 +--
3 files changed, 182
This patch modify MDIO read/write functions to support
communication with C45 PHY.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/macb.h | 15 --
drivers/net/ethernet/cadence/macb_main.c | 61 +++-
2 files changed, 61 insertions(+), 15
This patch add support for high speed USXGMII PCS and 10G
speed in Cadence ethernet controller driver.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/macb.h | 41 +
drivers/net/ethernet/cadence/macb_main.c | 216 +++
2 files changed, 218
This patch add support for SGMII interface) and
2.5Gbps MAC in Cadence ethernet controller driver.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/macb.h | 76 ++--
drivers/net/ethernet/cadence/macb_main.c | 151 ---
2 files changed, 200
Hello !,
This is second version of patch set containing following patches
for Cadence ethernet controller driver.
1. 0001-net-macb-add-phylink-support.patch
Replace phylib API's with phylink API's.
2. 0002-net-macb-add-support-for-sgmii-MAC-PHY-interface.patch
This patch add support for
On Wed, Jun 19, 2019 at 1:52 AM Joel Fernandes wrote:
>
> On Tue, Jun 18, 2019 at 7:15 PM Tri Vo wrote:
> [snip]
> > > > > >
> > > > > > Android userspace reading wakeup_sources is not ideal because:
> > > > > > - Debugfs API is not stable, i.e. Android tools built on top of it
> > > > > > are
On Thursday 30 May 2019 at 10:20:35 (+0100), Quentin Perret wrote:
> Quentin Perret (3):
> arm64: defconfig: Enable CONFIG_ENERGY_MODEL
> thermal: cpu_cooling: Make the power-related code depend on IPA
> thermal: cpu_cooling: Migrate to using the EM framework
>
>
On Tue, 18 Jun 2019 08:58:22 -0700
Ranjani Sridharan wrote:
> On Tue, 2019-06-18 at 13:00 +0200, Amadeusz Sławiński wrote:
> > On Mon, 17 Jun 2019 13:51:42 -0700
> > Ranjani Sridharan wrote:
> >
> > > On Mon, 2019-06-17 at 13:36 +0200, Amadeusz Sławiński wrote:
> > > > When we unload
On Tue, Jun 18, 2019 at 09:41:03AM -0600, Stephen Warren wrote:
> On 6/18/19 3:30 AM, Dmitry Osipenko wrote:
> > 18.06.2019 12:22, Dmitry Osipenko пишет:
> > > 18.06.2019 10:46, Sowjanya Komatineni пишет:
> > > > This patch adds suspend and resume support for Tegra pinctrl driver
> > > > and
On Tue, Jun 18, 2019 at 11:00:05PM +0300, Dmitry Osipenko wrote:
> 18.06.2019 20:34, Sowjanya Komatineni пишет:
> >
> > On 6/18/19 9:50 AM, Sowjanya Komatineni wrote:
> >>
> >> On 6/18/19 8:41 AM, Stephen Warren wrote:
> >>> On 6/18/19 3:30 AM, Dmitry Osipenko wrote:
> 18.06.2019 12:22,
On Wed, Jun 19, 2019 at 2:19 AM Dmitry Torokhov
wrote:
>
> Hi Rafael,
>
> On Tue, Jun 18, 2019 at 10:18:28AM +0200, Rafael J. Wysocki wrote:
> > From: Rafael J. Wysocki
> >
> > The name of pm_suspend_via_s2idle() is confusing, as it doesn't
> > reflect the purpose of the function precisely
Hi Andrew,
Sure, I will Cc Russel King in next version of patch series.
Regards,
Parshuram Thombare
>-Original Message-
>From: Andrew Lunn
>Sent: Wednesday, June 19, 2019 3:03 AM
>To: Parshuram Raju Thombare
>Cc: nicolas.fe...@microchip.com; da...@davemloft.net;
>f.faine...@gmail.com;
Refer to the Intel SDM Vol.4, the package C-state residency counters
of modern IA micro-architecture are all ticking in TSC frequency,
hence we can apply simple math to transform the ticks into microseconds.
i.e.,
residency (ms) = count / tsc_khz
residency (us) = count / tsc_khz * 1000
This also
Yes, then I think we have solved the behavioural problem of Linux, and it seems
to come down to the GNU idol, that seems based on Morphine Psychosis. And such
the worst Stallman fans, have irate behaviour.
And much have pointed to that already, and much criticism done, and indeed the
GNU idol
>
> When calling debugfs functions, there is no need to ever check the return
> value. The function can work or not, but the code logic should never do
> something different based on this.
Maybe need to mention that API has changed in patch '
ff9fb72bc07705c00795ca48631f7fffe24d2c6b' in 5.0
On 6/19/19 7:21 AM, Michal Hocko wrote:
> On Tue 18-06-19 14:13:16, Yang Shi wrote:
> [...]
>>
>> I used to have !__PageMovable(page), but it was removed since the
>> aforementioned reason. I could add it back.
>>
>> For the temporary off LRU page, I did a quick search, it looks the most
>> paths
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git WIP.x86/ipi
head: 0663387727c00bb25ce1e76f30deb6b193f591f8
commit: 8adde844ea4f8d0d147e0ad6c675970a58550bae [3/11] x86/hotplug: Silence
APIC and NMI when CPU is dead
config: i386-randconfig-x009-201924 (attached as .config)
On Thu 13-06-19 09:02:24, Dave Chinner wrote:
> On Wed, Jun 12, 2019 at 12:21:44PM -0400, Kent Overstreet wrote:
> > This would simplify things a lot and eliminate a really nasty corner case -
> > page
> > faults trigger readahead. Even if the buffer and the direct IO don't
> > overlap,
> >
On Tue, Jun 18, 2019 at 05:03:58PM +0300, Dmitry Osipenko wrote:
> Tegra's timer has 29 bits for the counter and for the "load" register
> which sets counter to a load-value. The counter's value is lower than
> the actual value by 1 because it starts to decrement after one tick,
> hence the
On Tue, Jun 18, 2019 at 05:03:56PM +0300, Dmitry Osipenko wrote:
> We're adjusting the timer's base for each per-CPU timer to point to the
> actual start of the timer since device-tree defines a compound registers
> range that includes all of the timers. In this case the original base
> need to be
On Tue, Jun 18, 2019 at 05:03:57PM +0300, Dmitry Osipenko wrote:
> Tegra's timer uses n+1 scheme for the counter, i.e. timer will fire after
> one tick if 0 is loaded. The minimum and maximum numbers of oneshot ticks
> are defined by clockevents_config_and_register(min, max) invocation and
> the
ВНИМАНИЕ;
В вашем почтовом ящике превышен лимит хранилища, который составляет 5 ГБ, как
определено администратором, который в настоящее время работает на 10,9 ГБ.
Возможно, вы не сможете отправлять или получать новую почту, пока вы не
подтвердите свою почту. Чтобы подтвердить свой почтовый
On Tue, Jun 18, 2019 at 05:03:55PM +0300, Dmitry Osipenko wrote:
> Convert all 1MHz literals to a verbose constant for better readability.
>
> Suggested-by: Daniel Lezcano
> Acked-by: Jon Hunter
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/clocksource/timer-tegra.c | 12 +++-
> 1
On Tue, Jun 18, 2019 at 05:03:54PM +0300, Dmitry Osipenko wrote:
> There is no need to cast void because kernel allows to do that without
> a warning message from a compiler.
>
> Acked-by: Jon Hunter
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/clocksource/timer-tegra.c | 2 +-
> 1 file
On Tue, Jun 18, 2019 at 05:03:53PM +0300, Dmitry Osipenko wrote:
> The of_clk structure has a period field that is set up initially by
> timer_of_clk_init(), that period value need to be adjusted for a case of
> TIMER1-9 that are running at a fixed rate that doesn't match the clock's
> rate. Note
On Tue, Jun 18, 2019 at 05:03:51PM +0300, Dmitry Osipenko wrote:
> The clocksource rate is initialized only for the first per-CPU clocksource
> and then that rate shall be replicated for the rest of clocksource's
> because they are initialized manually in the code.
>
> Fixes: 3be2a85a0b61
On Tue, Jun 18, 2019 at 05:03:52PM +0300, Dmitry Osipenko wrote:
> It was left unnoticed by accident, which means that the code could be
> cleaned up a tad more.
>
> Acked-by: Jon Hunter
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/clocksource/timer-tegra.c | 42
On 6/18/19 7:06 PM, Yang Shi wrote:
> The BUG_ON was removed by commit
> d44d363f65780f2ac2ec672164555af54896d40d ("mm: don't assume anonymous
> pages have SwapBacked flag") since 4.12.
Perhaps that commit should be sent to stable@ ? Although with
VM_BUG_ON() this is less critical than plain
On Tue, Jun 18, 2019 at 11:30:34AM -0400, Alan Stern wrote:
> On Tue, 18 Jun 2019, Suwan Kim wrote:
>
> > vhci doesn’t do dma for remote device. Actually, the real dma
> > operation is done by network card driver. So, vhci doesn’t use and
> > need dma address of transfer buffer of urb.
> >
> >
On Fri, 2019-06-14 at 11:41 +0200, Jacopo Mondi wrote:
> Hi Lubomir,
>
> On Sun, May 05, 2019 at 04:00:23PM +0200, Lubomir Rintel wrote:
> > The commit d790b7eda953 ("[media] vb2-dma-sg: move dma_(un)map_sg here")
> > left dma_desc_nent unset. It previously contained the number of DMA
> >
On Tue, Jun 18, 2019 at 10:58:40AM -0700, Sowjanya Komatineni wrote:
>
> On 6/18/19 5:16 AM, Thierry Reding wrote:
> > On Tue, Jun 18, 2019 at 12:46:25AM -0700, Sowjanya Komatineni wrote:
> > > This patch adds system suspend and resume support for Tegra210
> > > clocks.
> > >
> > > All the CAR
On Wed, 19 Jun 2019 16:04:43 +0800
masonccy...@mxic.com.tw wrote:
> Hi Boris,
>
> >
> > Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND controller
> >
> > On Tue, 18 Jun 2019 08:14:36 +0200
> > Boris Brezillon wrote:
> >
> > > > > > > >
> > > > > > > > How to make all #CS keep
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git WIP.x86/ipi
head: 0663387727c00bb25ce1e76f30deb6b193f591f8
commit: b3b483a0796da8f2c0d91b8594ef0ae593ec29fb [8/11] x86/apic: Add static
key to Control IPI shorthands
config: x86_64-randconfig-x015-201924 (attached as .config)
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