DECLARE_PRINTKRB() now requires a wait queue argument, used
by the blocking reader interface.
Signed-off-by: John Ogness
---
For RFCv4 the macro prototype changed. The fixup for the
test module didn't make it into the series.
kernel/printk/test_prb.c | 5 -
1 file changed, 4
On Mon, Aug 19, 2019, at 10:45 AM, Andrii Nakryiko wrote:
> On Fri, Aug 16, 2019 at 3:32 PM Daniel Xu wrote:
> >
> > It is sometimes necessary to perform ioctl's on the underlying perf fd.
> > There is not currently a way to extract the fd given a bpf_link, so add a
> > a pair of casting and
On Tue, 16 Jul 2019 16:58:06 -0700, syzbot wrote:
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:a131c2bf Merge tag 'acpi-5.3-rc1-2' of git://git.kernel.or..
> git tree: net-next
> console output: https://syzkaller.appspot.com/x/log.txt?x=1603e9c060
> kernel
היי,
מחכה לשמוע מכם בדוא"ל ששלחתי אליכם קודם וההצעה שלי לגבי הפיקדון הזה
כאן בטורקיה, אנא נסה לחזור אלי.
בברכה
אישק
On Tue, 20 Aug 2019, kbuild test robot wrote:
>
> All errors (new ones prefixed by >>):
>
>In file included from :0:0:
Huch? What kind of weird include chain is that?
> >> include/linux/sched/types.h:16:2: error: unknown type name 'u64'
> u64utime;
> ^~~
>
On Mon, Aug 19, 2019 at 02:17:44PM -0700, Sagi Grimberg wrote:
>
> - On 16 Aug, 2019, at 15:16, Christoph Hellwig h...@lst.de wrote:
> > Sorry for not replying to the earlier version, and thanks for doing
> > this work.
> >
> > I wonder if instead of using our own
Jens, can you please rebase for-linus so we have the needed dependency:
4eaefe8c621c6195c91044396ed8060c179f7aae
I just did as part of adding a new patch, being pushed out shortly.
Thanks
The subject line should give a clue about where the leak is, e.g.,
ACPI / PCI: fix acpi_pci_irq_enable() memory leak
On Thu, Aug 15, 2019 at 11:33:22PM -0500, Wenwen Wang wrote:
> In acpi_pci_irq_enable(), 'entry' is allocated by invoking
> acpi_pci_irq_lookup(). However, it is not deallocated
On Fri, 06 Jul 2018 00:36:02 -0700, syzbot wrote:
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:1a84d7fdb5fc Merge branch 'mlxsw-Add-resource-scale-tests'
> git tree: net-next
> console output: https://syzkaller.appspot.com/x/log.txt?x=17dec75c40
> kernel
On Tue, 25 Sep 2018 16:54:03 -0700, syzbot wrote:
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:bd4d08daeb95 Merge branch 'net-dsa-b53-SGMII-modes-fixes'
> git tree: net-next
> console output: https://syzkaller.appspot.com/x/log.txt?x=110b6a1a40
> kernel config:
On Sun, Aug 18, 2019 at 08:30:15AM +0800, Yafang Shao wrote:
> On Sun, Aug 18, 2019 at 3:14 AM Roman Gushchin wrote:
> >
> > On Sat, Aug 17, 2019 at 11:33:57AM +0800, Yafang Shao wrote:
> > > On Sat, Aug 17, 2019 at 8:47 AM Roman Gushchin wrote:
> > > >
> > > > Commit 766a4c19d880
On Mon, Aug 12, 2019 at 12:42 PM Josh Hunt wrote:
>
> On Mon, Aug 12, 2019 at 12:34 PM Thomas Gleixner wrote:
> >
> > On Mon, 12 Aug 2019, Josh Hunt wrote:
> > > On Mon, Aug 12, 2019 at 10:55 AM Thomas Gleixner
> > > wrote:
> > > >
> > > > On Mon, 12 Aug 2019, Josh Hunt wrote:
> > > > > Was
Hello,
YueHaibing wrote:
> While do COMPILE_TEST building, if GENERIC_IRQ_CHIP is
> not selected, it fails:
>
> drivers/irqchip/irq-ingenic-tcu.o: In function `ingenic_tcu_intc_cascade':
> irq-ingenic-tcu.c:(.text+0x13f): undefined reference to
> `irq_get_domain_generic_chip'
>
Hello,
Christophe JAILLET wrote:
> It should be OCTEON_SERIAL_LEN.
> Update the #define and use it accordingly
Applied to mips-next.
> commit 3becd97e032a
> https://git.kernel.org/mips/c/3becd97e032a
>
> Signed-off-by: Christophe JAILLET
> Signed-off-by: Paul Burton
Thanks,
Paul
[ This
On 15 Aug 2019, at 5:13, Ivan Khoronzhuk wrote:
> For arm32 xdp sockets mmap2 is preferred, so use it if it's defined.
> Declaration of __NR_mmap can be skipped and it breaks build.
>
> Signed-off-by: Ivan Khoronzhuk
Acked-by: Jonathan Lemon
> ---
> samples/bpf/syscall_nrs.c | 6 ++
- On 16 Aug, 2019, at 15:16, Christoph Hellwig h...@lst.de wrote:
Sorry for not replying to the earlier version, and thanks for doing
this work.
I wonder if instead of using our own structure we'd just use
a full nvme SQE for the input and CQE for that output. Even if we
reserve a few
On Mon 2019-08-19 15:41:42, Wenwen Wang wrote:
> In led_trigger_set(), 'event' is allocated in kasprintf(). However, it is
> not deallocated in the following execution if the label 'err_activate' or
> 'err_add_groups' is entered, leading to memory leaks. To fix this issue,
> free 'event' before
On Tue, 04 Dec 2018 00:48:02 -0800, syzbot wrote:
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:6915bf3b002b net: phy: don't allow __set_phy_supported to ..
> git tree: net-next
> console output: https://syzkaller.appspot.com/x/log.txt?x=177085a340
> kernel
tree: https://kernel.googlesource.com/pub/scm/linux/kernel/git/tip/tip.git
WIP.timers/core
head: b16101077cbc7e0dde91e7ffb258ce1f979b
commit: e51f39feec02940feeb0914ef9ff8fe5e05965c1 [27/68] posix-timer: Use a
callback for cancel synchronization
reproduce:
# apt-get install
tree: https://kernel.googlesource.com/pub/scm/linux/kernel/git/tip/tip.git
WIP.timers/core
head: b16101077cbc7e0dde91e7ffb258ce1f979b
commit: 83083078874a3b1b29b8171714455b469a17b8ab [49/68] sched: Move struct
task_cputime to types.h
config: sparc64-allmodconfig (attached as .config)
On Tue, Aug 13, 2019 at 04:12:49PM +0800, Jason Wang wrote:
>
> On 2019/8/12 下午5:49, Michael S. Tsirkin wrote:
> > On Mon, Aug 12, 2019 at 10:44:51AM +0800, Jason Wang wrote:
> > > On 2019/8/11 上午1:52, Michael S. Tsirkin wrote:
> > > > On Fri, Aug 09, 2019 at 01:48:42AM -0400, Jason Wang wrote:
>
Bandan,
On Wed, 14 Aug 2019, Bandan Das wrote:
> On a 32 bit RHEL6 guest with greater than 8 cpus, the
> kdump kernel hangs when calibrating apic. This happens
> because when apic initializes bigsmp, it also initializes LDR
> even though it probably wouldn't be used.
'It probably wouldn't be
Joe Perches wrote:
> /* extract the FID array and its count in two steps */
> - /* fall through */
> + fallthrough;
> case 1:
Okay, that doesn't look too bad. I thought you might be going to combine it
with the case inside a macro in some
On 8/16/19 7:36 PM, John Hubbard wrote:
On 8/16/19 7:24 PM, jhubb...@nvidia.com wrote:
From: John Hubbard
DKIM-Signature: v a a-sha256; claxed/relaxed; d idia.com; s;
t66008674; bhMai0va6k/z2enpQJ4Nfvbj5WByFxGAO1JwdIBbXioh
On Tue, Aug 20, 2019 at 02:43:32AM +0800, kbuild test robot wrote:
> tree:
> https://kernel.googlesource.com/pub/scm/linux/kernel/git/paulmck/linux-rcu.git
> test
> head: b0e7c384ed8a8b5be17376a00e6f22e2d89456b9
> commit: 14569aa16daa1cd7610624a500ed2750fe341351 [8/35] rcutorture: Force on
Hi Justin,
> Hi Ben,
>
> I have similar fix locally with different approach as the command handler may
> have some expectation for those byes.
> We can use NCSI_PKT_CMD_OEM handler as it only copies data based on the
> payload length.
Great! Yes I was thinking the same, we just need some way
On Thu, 15 Aug 2019 21:02:58 +0800
Ben Luo wrote:
> Currently, VFIO takes a lot of free-then-request-irq actions whenever
> a VM (with device passthru via VFIO) sets irq affinity or mask/unmask
> irq. Those actions only change the cookie data of irqaction or even
> change nothing. The
On Sat, Aug 17, 2019 at 9:46 AM Stephen Boyd wrote:
>
> Quoting Amit Kucheria (2019-07-25 15:18:49)
> > diff --git a/drivers/thermal/qcom/tsens-common.c
> > b/drivers/thermal/qcom/tsens-common.c
> > index 7ab2e740a1da..13a875b99094 100644
> > --- a/drivers/thermal/qcom/tsens-common.c
> > +++
On Mon, Aug 19, 2019 at 10:16 AM Frank Rowand wrote:
>
> On 8/15/19 6:50 PM, Saravana Kannan wrote:
> > On Wed, Aug 7, 2019 at 7:06 PM Frank Rowand wrote:
> >>
> >> On 7/23/19 5:10 PM, Saravana Kannan wrote:
> >>> Add device-links after the devices are created (but before they are
> >>> probed)
On 8/16/19 7:15 PM, Nathan Royce wrote:
On Fri, Aug 16, 2019 at 1:42 PM Greg Kroah-Hartman
wrote:
If you revert that one commit, does things start working again?
thanks,
greg k-h
Hey Greg, I just got finished building it after running "$ git revert
812658d88d26" and verifying it reverted by
From: Thor Thayer
Newer Intel FPGAs have different Vendor Specific offsets than
legacy parts. Use PCI discovery to find the CvP registers.
Since the register positions remain the same, change the hard
coded address to a more flexible way of indexing registers
from the offset.
Adding new PCI read
From: Thor Thayer
Add Stratix10 specific functions that use a credit mechanism
to throttle data to the CvP FIFOs. Add a private structure
with function pointers for V1 vs V2 functions.
Signed-off-by: Thor Thayer
---
v2 Remove inline function declaration
Reverse Christmas Tree format for
From: Thor Thayer
In preparation for adding newer V2 parts that use a FIFO,
reorganize altera_cvp_chk_error() and change the write
function to block based.
V2 parts have a block size matching the FIFO while older
V1 parts write a 32 bit word at a time.
Signed-off-by: Thor Thayer
---
v2 Remove
From: Thor Thayer
Newer versions (V2) of Altera/Intel FPGAs CvP have different PCI
Vendor Specific Capability offsets than the older (V1) Altera/FPGAs.
Most of the CvP registers and their bitfields remain the same
between both the older parts and the newer parts.
This patchset implements
In led_trigger_set(), 'event' is allocated in kasprintf(). However, it is
not deallocated in the following execution if the label 'err_activate' or
'err_add_groups' is entered, leading to memory leaks. To fix this issue,
free 'event' before returning the error.
Signed-off-by: Wenwen Wang
---
This patch adds a new PCI subsys ID for the SBZ, as found and tested by
me and some reddit users.
Signed-off-by: Paweł Rekowski
---
sound/pci/hda/patch_ca0132.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/pci/hda/patch_ca0132.c b/sound/pci/hda/patch_ca0132.c
index
On Mon, Aug 19, 2019 at 5:47 PM Kristian Klausen wrote:
>
> On 19.08.2019 11.05, Rafael J. Wysocki wrote:
> > On Monday, August 19, 2019 9:59:02 AM CEST Rafael J. Wysocki wrote:
> >> On Fri, Aug 16, 2019 at 10:26 PM Kristian Klausen
> >> wrote:
> >>> On 02.08.2019 12.33, Rafael J. Wysocki
Hi,
Le 19/08/2019 à 18:37, Nathan Lynch a écrit :
Hi,
Christophe Leroy writes:
Benchmark from vdsotest:
I assume you also ran the verification/correctness parts of vdsotest...? :-)
I did run vdsotest-all. I guess it runs the verifications too ?
Christophe
On Mon, 19 Aug 2019, Ingo Molnar wrote:
>
> * Thomas Gleixner wrote:
>
> > Put it where it belongs and cleanup the ifdeffery in fork completely.
>
> s/cleanup
> /clean up
>
> > * posix_cputimers - Container for posix CPU timer related data
> > * @expiries:
On 12/08/2019 12:28, Krishna Yarlagadda wrote:
> From: Shardar Shariff Md
>
> Add support to use 8 bytes trigger for Tegra186 SOC.
>
> Signed-off-by: Shardar Shariff Md
> Signed-off-by: Krishna Yarlagadda
> ---
> drivers/tty/serial/serial-tegra.c | 13 +++--
> 1 file changed, 11
On Mon, 19 Aug 2019, Ingo Molnar wrote:
> * Thomas Gleixner wrote:
>
> > The RTIME limit expiry code does not check the hard RTTIME limit for
> > INFINITY, i.e. being disabled. Add it.
> >
> > Signed-off-by: Thomas Gleixner
> > ---
> > kernel/time/posix-cpu-timers.c |2 +-
> > 1 file
On 8/18/19 11:24 PM, Luis Chamberlain wrote:
On Thu, Aug 15, 2019 at 05:09:44PM -0700, Scott Branden wrote:
Add tests cases for checking request_firmware_into_buf api.
API was introduced into kernel with no testing present previously.
Signed-off-by: Scott Branden
Acked-by: Luis Chamberlain
On 8/18/19 11:24 PM, Luis Chamberlain wrote:
On Thu, Aug 15, 2019 at 05:09:43PM -0700, Scott Branden wrote:
Add test config into_buf to allow request_firmware_into_buf to be
called instead of request_firmware/request_firmware_direct. The number
of parameters differ calling
env->nr_cpus_online, the number of CPUs online during a record session, can be
used as a dynamic alternative for MAX_NR_CPUS in svg_build_topology_map. The
value of env->nr_cpus_online can be passed into str_to_bitmap,
scan_core_topology, and svg_build_topology_map to replace MAX_NR_CPUS as well.
This is v2 of the patchset (v1 has been sent as a set of separate patches).
Kbuild test robot reported build issues:
memcg_flush_percpu_vmstats() and memcg_flush_percpu_vmevents() were
accidentally placed under CONFIG_MEMCG_KMEM, and caused
!CONFIG_MEMCG_KMEM build to fail.
V2 contains a trivial
Similar to vmstats, percpu caching of local vmevents leads to an
accumulation of errors on non-leaf levels. This happens because some
leftovers may remain in percpu caches, so that they are never propagated
up by the cgroup tree and just disappear into nonexistence with on
releasing of the memory
Percpu caching of local vmstats with the conditional propagation by the
cgroup tree leads to an accumulation of errors on non-leaf levels.
Let's imagine two nested memory cgroups A and A/B. Say, a process
belonging to A/B allocates 100 pagecache pages on the CPU 0. The percpu
cache will spill 3
The function cpu__max_cpu returns the possible number of CPUs as defined in the
sysfs and can be used as an alternative for MAX_NR_CPUS in write_cache.
MAX_CACHES is replaced by cpu__max_cpu() * MAX_CACHE_LVL.
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Alexander
nr_cpus_online, the number of CPUs online during a record session, can be
used as a dynamic alternative for MAX_NR_CPUS in __machine__synthesize_threads
and machine__set_current_tid.
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc:
I've noticed that the "slab" value in memory.stat is sometimes 0,
even if some children memory cgroups have a non-zero "slab" value.
The following investigation showed that this is the result
of the kmem_cache reparenting in combination with the per-cpu
batching of slab vmstats.
At the offlining
nr_cpus_online, the number of CPUs online during a record session, can be
used as a dynamic alternative for MAX_NR_CPUS in perf_session__cpu_bitmap.
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc:
The function cpu__max_cpu returns the possible number of CPUs as defined in the
sysfs and can be used as an alternative for MAX_NR_CPUS in zero_per_pkg and
check_per_pkg.
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Namhyung Kim
Exchange the parameters of svg_build_topology_map with struct perf_env *env and
adjust the function accordingly. This patch should not change any behavior, it
is merely refactoring for the following patch.
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Alexander Shishkin
The purpose of this patch series is to replace MAX_NR_CPUS with a dynamic value
throughout perf wherever possible using nr_cpus_online, the number of CPUs
online during a record session, and cpu__max_cpu, the possible number of CPUs as
defined in the sysfs. MAX_NR_CPUS is still used by
Hello,
syzbot has tested the proposed patch but the reproducer still triggered
crash:
WARNING in yurex_write/usb_submit_urb
[ cut here ]
URB c866c77d submitted while active
WARNING: CPU: 1 PID: 2816 at drivers/usb/core/urb.c:362
usb_submit_urb+0x10c1/0x13b0
> -Original Message-
> From: linux-edac-ow...@vger.kernel.org On
> Behalf Of Borislav Petkov
> Sent: Friday, August 2, 2019 2:42 AM
> To: Ghannam, Yazen
> Cc: linux-e...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v2 2/7] EDAC/amd64: Recognize DRAM device type
Hi Ben,
I have similar fix locally with different approach as the command handler may
have some expectation for those byes.
We can use NCSI_PKT_CMD_OEM handler as it only copies data based on the payload
length.
diff --git a/net/ncsi/ncsi-cmd.c b/net/ncsi/ncsi-cmd.c
index 5c3fad8..3b01f65
title:
s/comparisions
/comparisons
Thanks,
Ingo
* Thomas Gleixner wrote:
> The RTIME limit expiry code does not check the hard RTTIME limit for
> INFINITY, i.e. being disabled. Add it.
>
> Signed-off-by: Thomas Gleixner
> ---
> kernel/time/posix-cpu-timers.c |2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> ---
When we execute make after merging the configurations we ignore any
errors it produces causing whatever is running merge_config.sh to be
unaware of any failures. This issue was noticed by Guillaume Tucker
while looking at problems with testing of clang only builds in KernelCI
which caused Kbuild
On Mon, 19 Aug 2019 14:27:31 +0200
Juri Lelli wrote:
> The following BUG has been reported while running ipsec tests.
Thanks!
I'm still in the process of backporting patches to fix some bugs that
showed up with the latest merge of upstream stable. I'll add this to
the queue to add.
-- Steve
> -Original Message-
> From: Borislav Petkov
> Sent: Friday, August 2, 2019 1:50 AM
> To: Ghannam, Yazen
> Cc: linux-e...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v2 1/7] EDAC/amd64: Support more than two controllers for
> chip selects handling
>
> On Tue,
On Sat, 17 Aug 2019 19:51:03 +0800
hexin wrote:
> In vfio_pci_enable(), save the device's initial configuration information
> and then restore the configuration in vfio_pci_disable(). However, the
> execution result is not the same. Since the pci_try_reset_function()
> function saves the current
On 19.08.2019 19:52, Marco Hartmann wrote:
> and call it from phy_config_aneg().
>
Here something went wrong.
> commit 34786005eca3 ("net: phy: prevent PHYs w/o Clause 22 regs from
> calling genphy_config_aneg") introduced a check that aborts
> phy_config_aneg() if the phy is a C45 phy.
> This
On Wed, Aug 14, 2019 at 3:56 AM H. Nikolaus Schaller wrote:
>
> Hi all,
>
> > Am 17.07.2019 um 12:51 schrieb Merlijn Wajer :
> >
> > Hi,
> >
> > On 10/03/2019 08:07, H. Nikolaus Schaller wrote:
> >>
> >>> Am 10.03.2019 um 00:14 schrieb Merlijn Wajer :
> >>>
> >>> Hi,
> >>>
> >>> On 15/02/2019
The code can be simplified a little by factoring out the IS_ERR_OR_NULL
check from the platform-specific handle_irq implementations, and by
inlining the remaining call to generic_handle_irq_desc for 64bit
systems.
Signed-off-by: Heiner Kallweit
---
v2:
- add "likely" to if clause and reorder it
> -Original Message-
> From: Limonciello, Mario
> Sent: Monday, August 19, 2019 1:22 PM
> To: 'Mika Westerberg'
> Cc: linux-kernel@vger.kernel.org; andreas.noe...@gmail.com;
> michael.ja...@intel.com; yehezkel...@gmail.com; r...@rjwysocki.net;
> l...@kernel.org; lu...@wunner.de;
It's simpler and more intuitive to directly check for VECTOR_UNUSED.
Signed-off-by: Heiner Kallweit
---
arch/x86/kernel/irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index f1c8f350d..857b4d7ae 100644
---
These values are used with IS_ERR(), so it's more intuitive to define
them like a standard PTR_ERR() of a negative errno.
Signed-off-by: Heiner Kallweit
---
arch/x86/include/asm/hw_irq.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/hw_irq.h
From: Long Li
storvsc doesn't use a dedicated hardware queue for a given CPU queue. When
issuing I/O, it selects returning CPU (hardware queue) dynamically based on
vmbus channel usage across all channels.
This patch sets up a 1:1 mapping between hardware queue and CPU queue, thus
avoiding
When checking something else I stumbled across this code.
This patch set simplifies it a little bit.
v2:
- patch 2: add "likely" to if clause and reorder it
- patch 2: For 64bit, remove handle_irq and inline call to
generic_handle_irq_desc
Heiner Kallweit (3):
x86/irq: improve definition of
On Wed, Aug 14, 2019 at 03:58:50PM -0700, Paul E. McKenney wrote:
> On Wed, Aug 14, 2019 at 12:04:11PM -0400, Joel Fernandes (Google) wrote:
> > This test runs kfree_rcu in a loop to measure performance of the new
> > kfree_rcu batching functionality.
>
> kfree_rcu().
Fixed.
> > The following
19.08.2019 22:07, Sowjanya Komatineni пишет:
>
> On 8/19/19 11:20 AM, Sowjanya Komatineni wrote:
>>
>> On 8/19/19 9:48 AM, Dmitry Osipenko wrote:
>>> 16.08.2019 22:42, Sowjanya Komatineni пишет:
Tegra210 and prior Tegra chips have deep sleep entry and wakeup related
timings which are
* Thomas Gleixner wrote:
> Using struct task_cputime for the expiry cache is a pretty odd choice and
> comes with magic defines to rename the fields for usage in the expiry
> cache.
>
> struct task_cputime is basically a u64 array with 3 members, but it has
> distinct members.
>
> The expiry
On 8/19/19 12:06 PM, Bharath Vedartham wrote:
On Mon, Aug 19, 2019 at 07:56:11AM -0500, Dimitri Sivanich wrote:
Reviewed-by: Dimitri Sivanich
Thanks!
John, would you like to take this patch into your miscellaneous
conversions patch set?
(+Andrew and Michal, so they know where all this is
From: Eran Ben Elisha
HV VHCA is a layer which provides PF to VF communication channel based on
HyperV PCI config channel. It implements Mellanox's Inter VHCA control
communication protocol. The protocol contains control block in order to
pass messages between the PF and VF drivers, and data
From: Eran Ben Elisha
Control agent is responsible over of the control block (ID 0). It should
update the PF via this block about every capability change. In addition,
upon block 0 invalidate, it should activate all other supported agents
with data requests from the PF.
Upon agent
From: Eran Ben Elisha
Add wrapper functions for HyperV PCIe read / write /
block_invalidate_register operations. This will be used as an
infrastructure in the downstream patch for software communication.
This will be enabled by default if CONFIG_PCI_HYPERV_INTERFACE is set.
Signed-off-by:
From: Eran Ben Elisha
HV VHCA stats agent is responsible on running a preiodic rx/tx
packets/bytes stats update. Currently the supported format is version
MLX5_HV_VHCA_STATS_VERSION. Block ID 1 is dedicated for statistics data
transfer from the VF to the PF.
The reporter fetch the statistics
From: Dexuan Cui
Windows SR-IOV provides a backchannel mechanism in software for communication
between a VF driver and a PF driver. These "configuration blocks" are
similar in concept to PCI configuration space, but instead of doing reads and
writes in 32-bit chunks through a very slow path,
This interface driver is a helper driver allows other drivers to
have a common interface with the Hyper-V PCI frontend driver.
Signed-off-by: Haiyang Zhang
Signed-off-by: Saeed Mahameed
---
MAINTAINERS | 1 +
drivers/pci/Kconfig | 1 +
This patch set adds paravirtual backchannel in software in pci_hyperv,
which is required by the mlx5e driver HV VHCA stats agent.
The stats agent is responsible on running a periodic rx/tx packets/bytes
stats update.
Dexuan Cui (1):
PCI: hv: Add a paravirtual backchannel in software
Haiyang
On Fri, Aug 16, 2019 at 3:54 PM Jernej Skrabec wrote:
>
> Add new Oranth Tanix TX6 board compatible string to the bindings
> documentation.
>
> Signed-off-by: Jernej Skrabec
> ---
> Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +
> 1 file changed, 5 insertions(+)
Reviewed-by: Rob
On Sat, Aug 17, 2019 at 2:03 AM Tony Lindgren wrote:
>
> * Adam Ford [190816 23:02]:
> > On Wed, Aug 14, 2019 at 8:16 AM Tony Lindgren wrote:
> > > Well I just posted some sgx interconnect target module patches. We might
> > > still have them in v5.4 assuming people manage to review and test
From: Maxime Ripard
From: Marcus Cooper
The clock division dividers have changed between the older (A10/A31) and
newer (H3, A64, etc) SoCs.
While this was addressed through an offset on some SoCs, it was missing
some dividers as well, so the support wasn't perfect. Let's introduce a
pointer
From: Maxime Ripard
The LRCK polarity "normal" polarity in the I2S/TDM specs and in the
Allwinner datasheet are not the same. In the case where the i2s controller
is being used as the LRCK master, it's pretty clear when looked at under a
scope.
Let's fix this, and add a comment to clear up as
On Sun, Aug 18, 2019 at 10:44 PM Ramuthevar,Vadivel MuruganX
wrote:
>
> From: Ramuthevar Vadivel Murugan
>
> Add a new compatible to use the host controller driver with the
> eMMC PHY on Intel's Lightning Mountain SoC.
>
> Signed-off-by: Ramuthevar Vadivel Murugan
>
> ---
>
From: Maxime Ripard
The LRCK and BCLK polarity offsets on newer SoCs has been
changed, yet the driver didn't take it into account for all of them.
This was taken into account for the H3, but not the A83t. This was handled
using a reg_field for the H3.
However, the value in that field will not
Am 14.08.19 um 13:00 schrieb Ramon Fried:
> From: Stefan Wahren
>
> The user space like gpioinfo only see the GPIO usage but not the
> MUX usage (e.g. I2C or SPI usage) of a pin. As a user we want to know which
> pin is free/safe to use. So take the MUX usage of strict pinmux controllers
> into
From: Maxime Ripard
The two main generations of our I2S controller require a slightly different
channel configuration, mostly because of a quite different register layout
and some additional registers being needed on the newer generation.
This used to be controlled through a bunch of booleans,
From: Maxime Ripard
In addition to the I2S format, the controller also supports the DSP_*
formats.
This requires some extra care on the LRCK period calculation, since the
controller, with the PCM formats, require that the value set is no longer
the periods of LRCK for a single channel, but for
From: Maxime Ripard
Unlike the previous SoCs, the A83t, like the newer ones, need the LRCK
bitfield to be set. Let's add it.
Fixes: 21faaea1343f ("ASoC: sun4i-i2s: Add support for A83T")
Signed-off-by: Maxime Ripard
---
sound/soc/sunxi/sun4i-i2s.c | 1 +
1 file changed, 1 insertion(+)
diff
From: Maxime Ripard
The BCLK divider should be calculated using the parameters that actually
make the BCLK rate: the number of channels, the sampling rate and the
sample width.
We've been using the oversample_rate previously because in the former SoCs,
the BCLK's parent is MCLK, which in turn
From: Maxime Ripard
The RX and TX counters registers offset have been swapped, fix that.
Fixes: fa7c0d13cb26 ("ASoC: sunxi: Add Allwinner A10 Digital Audio driver")
Signed-off-by: Maxime Ripard
---
sound/soc/sunxi/sun4i-i2s.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
From: Maxime Ripard
The i2s controller supports TDM, for up to 8 slots. Let's support the TDM
API.
Signed-off-by: Maxime Ripard
---
sound/soc/sunxi/sun4i-i2s.c | 40 --
1 file changed, 34 insertions(+), 6 deletions(-)
diff --git
From: Maxime Ripard
The LRCK period field in the FMT0 register holds the number of LRCK period
for one channel in I2S mode.
This has been hardcoded to 32, while it really should be the physical width
of the format, which creates an improper clock when using a 16bit format,
with the i2s
From: Maxime Ripard
The A83t and H3 have the same quirks, so it doesn't make sense to duplicate
the quirks structure.
Signed-off-by: Maxime Ripard
---
sound/soc/sunxi/sun4i-i2s.c | 21 +
1 file changed, 1 insertion(+), 20 deletions(-)
diff --git
From: Maxime Ripard
On the first generation of Allwinner SoCs (A10-A31), the i2s controller was
using the MCLK as BCLK parent. However, this changed since the introduction
of the A83t and BCLK now uses the module clock as its parent.
Let's introduce a hook to get the parent rate and use that in
From: Maxime Ripard
The channels number have been hardcoded to 2 so far, while the controller
supports more than that.
Remove the instance where it has been hardcoded to compute the BCLK
divider, and pass it through as an argument to ease further support of more
channels.
Signed-off-by: Maxime
From: Maxime Ripard
The A83t, unlike previous SoCs, has the MCLK enable bit at the 8th bit of
the CLK_DIV register, unlike what is declared in the driver.
Fixes: 21faaea1343f ("ASoC: sun4i-i2s: Add support for A83T")
Signed-off-by: Maxime Ripard
---
sound/soc/sunxi/sun4i-i2s.c | 2 +-
1 file
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