[PATCH 06/10] pstore: Add proper unregister lock checking

The pstore backend lock wasn't being used during pstore_unregister(). Add sanity check and locking. Signed-off-by: Kees Cook --- fs/pstore/platform.c | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/fs/pstore/platform.c b/fs/pstore/platform.c index

[PATCH 03/10] pstore: Convert "psinfo" locking to mutex

Currently pstore can only have a single backend attached at a time, and it tracks the active backend via "psinfo", under a lock. The locking for this does not need to be a spinlock, and in order to avoid may_sleep() issues during future changes to pstore_unregister(), switch to a mutex instead.

[PATCH 05/10] pstore: Convert "records_list" locking to mutex

The pstorefs internal list lock doesn't need to be a spinlock and will create problems when trying to access the list in the subsequent patch that will walk the pstorefs records during pstore_unregister(). Change this to a mutex to avoid may_sleep() warnings when unregistering devices.

[PATCH 00/10] pstore: Remove filesystem records when backend is unregistered

Hi, This fixes a long-standing problem[1] with pstore where the filesystem view of backend records was not updated when the backend was unloaded (in a modular build) through pstore_unregister(). This series is mostly refactoring and improvements to the various locking semantics around management

[PATCH 09/10] pstore: Do not leave timer disabled for next backend

The pstore.update_ms value was being disabled during pstore_unregister(), which would cause any prior value to go unnoticed on the next pstore_register(). Instead, just let del_timer() stop the timer, which was always sufficient. This additionally refactors the timer reset code and allows the

Re: [v4,iproute2-next 1/2] iproute2-next:tc:action: add a gate control action

On Wed, 6 May 2020 16:40:19 +0800 Po Liu wrote: > } else if (matches(*argv, "base-time") == 0) { > + NEXT_ARG(); > + if (get_u64(_time, *argv, 10)) { > + invalidarg = "base-time"; > +

[rcu:dev.2020.04.29a] BUILD SUCCESS d54b2ad6d7f4caed123d988135478ae257357081

randconfig-b001-20200430 i386 randconfig-b002-20200430 x86_64 randconfig-b001-20200430 i386 randconfig-b003-20200430 x86_64 randconfig-b002-20200430 x86_64 randconfig-b003-20200430 i386 randconfig-b003-20200506 i386

[PATCH 02/10] pstore: Rename "pstore_lock" to "psinfo_lock"

The name "pstore_lock" sounds very global, but it is only supposed to be used for managing changes to "psinfo", so rename it accordingly. Signed-off-by: Kees Cook --- fs/pstore/platform.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/fs/pstore/platform.c

Re: [PATCH v2 1/2] PCI: hv: Fix the PCI HyperV probe failure path to release resource properly

On Wed, May 06, 2020 at 02:55:17PM +, Michael Kelley wrote: [...] > > Hv_pci_bus_exit() calls hv_send_resources_released() to release all child > > resources. > > These child resources were allocated in hv_send_resources_allocated(). > > Hv_send_resources_allocated() could fail in the

Re: Re: Re: Re: Re: Re: [PATCH net v2 0/2] Revert the 'socket_alloc' life cycle change

On Wed, 6 May 2020 07:41:51 -0700 "Paul E. McKenney" wrote: > On Wed, May 06, 2020 at 02:59:26PM +0200, SeongJae Park wrote: > > TL; DR: It was not kernel's fault, but the benchmark program. > > > > So, the problem is reproducible using the lebench[1] only. I carefully read > > it's code

Re: [PATCH v7 6/7] tpm: Add YAML schema for TPM TIS I2C options

On 2020-05-05 16:12, Rob Herring wrote: > On Mon, Apr 27, 2020 at 03:49:30PM +0300, amirmi...@gmail.com wrote: >> From: Amir Mizinski >> >> Added a YAML schema to support tpm tis i2c related dt-bindings for the I2c >> PTP based physical layer. >> >> This patch adds the documentation for

Re: [PATCH v2 1/5] [media] mtk-mdp: remove mtk_mdp_comp.regs from mtk_mdp_comp.h

Hi Eizan, Thank you for the patch. On 6/5/20 7:49, Eizan Miyamoto wrote: > These fields are not used and can be removed. > > Signed-off-by: ei...@chromium.org You need to drop the above line, for this and the other patches. > Reviewed-by: Enric Balletbo I Serra > Signed-off-by: Eizan

Re: [PATCH RFC 1/6] Revert "KVM: async_pf: Fix #DF due to inject "Page not Present" and "Page Ready" exceptions simultaneously"

Vivek Goyal writes: > On Wed, Apr 29, 2020 at 11:36:29AM +0200, Vitaly Kuznetsov wrote: >> Commit 9a6e7c39810e (""KVM: async_pf: Fix #DF due to inject "Page not >> Present" and "Page Ready" exceptions simultaneously") added a protection >> against 'page ready' notification coming before 'page

[Regression] [Bisected] Commit 6d232b29cfce65961db4a668c2c6c6987cd24d45 breaks some of the Fn-keys on my old Sony Vaio VPCM13M1E.

Hi, I updated my old Sony Vaio a few days ago and discovered that a few Fn-keys on my old Sony Vaio had stopped working. The bisection points at the commit in the subject and reverting it makes everything work again even with current Linus' git. Full bug report below. Please CC: me as I'm not

Re: [PATCH] tracing: Call vmalloc_sync_mappings() after alloc_percpu()

On Tue, 5 May 2020 14:31:44 +0200 Joerg Roedel wrote: > On Mon, May 04, 2020 at 03:10:06PM -0400, Steven Rostedt wrote: > > I'm fine with adding it to the tracing code (with that ridiculous > > comment! ;-) > > > > I'll even tag is as stable, but again, it's uncertain what commit that it > >

Re: [patch V4 part 1 12/36] x86/kvm: Sanitize kvm_async_pf_task_wait()

On 5/5/20 3:16 PM, Thomas Gleixner wrote: From: Thomas Gleixner While working on the entry consolidation I stumbled over the KVM async page fault handler and kvm_async_pf_task_wait() in particular. It took me a while to realize that the randomly sprinkled around rcu_irq_enter()/exit()

[PATCH v4 14/14] MAINTAINERS: Add Kishon Vijay Abraham I for TI J721E SoC PCIe

Add Kishon Vijay Abraham I as MAINTAINER for TI J721E SoC PCIe. Signed-off-by: Kishon Vijay Abraham I --- MAINTAINERS | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 2926327e4976..9d40e1318f7c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@

[PATCH v4 12/14] PCI: j721e: Add TI J721E PCIe driver

Add support for PCIe controller in J721E SoC. The controller uses the Cadence PCIe core programmed by pcie-cadence*.c. The PCIe controller will work in both host mode and device mode. Some of the features of the controller are: *) Supports both RC mode and EP mode *) Supports MSI and MSI-X

[PATCH v4 13/14] misc: pci_endpoint_test: Add J721E in pci_device_id table

Add J721E in pci_device_id table so that pci-epf-test can be used for testing PCIe EP in J721E. Signed-off-by: Kishon Vijay Abraham I --- drivers/misc/pci_endpoint_test.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/misc/pci_endpoint_test.c

[PATCH v4 07/14] PCI: cadence: Add new *ops* for CPU addr fixup

Cadence driver uses "mem" memory resource to obtain the offset of configuration space address region, memory space address region and message space address region. The obtained offset is used to program the Address Translation Unit (ATU). However certain platforms like TI's J721E SoC require the

Re: [PATCH 0/1] Fiji GPU audio register timeout when in BACO state

On Sat, May 02, 2020 at 12:09:13PM +0200, Takashi Iwai wrote: > On Sat, 02 May 2020 09:27:31 +0200, > Takashi Iwai wrote: > > > > On Sat, 02 May 2020 09:17:28 +0200, > > Lukas Wunner wrote: > > > > > > On Sat, May 02, 2020 at 09:11:58AM +0200, Takashi Iwai wrote: > > > > ---

[PATCH v4 08/14] PCI: cadence: Fix updating Vendor ID and Subsystem Vendor ID register

Commit 1b79c5284439 ("PCI: cadence: Add host driver for Cadence PCIe controller") in order to update Vendor ID, directly wrote to PCI_VENDOR_ID register. However PCI_VENDOR_ID in root port configuration space is read-only register and writing to it will have no effect. Use local management

[PATCH v4 11/14] dt-bindings: PCI: Add EP mode dt-bindings for TI's J721E SoC

Add PCIe EP mode dt-bindings for TI's J721E SoC. Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Rob Herring --- .../bindings/pci/ti,j721e-pci-ep.yaml | 89 +++ 1 file changed, 89 insertions(+) create mode 100644

[PATCH v4 10/14] dt-bindings: PCI: Add host mode dt-bindings for TI's J721E SoC

Add host mode dt-bindings for TI's J721E SoC. Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Rob Herring --- .../bindings/pci/ti,j721e-pci-host.yaml | 113 ++ 1 file changed, 113 insertions(+) create mode 100644

[PATCH v4 09/14] PCI: cadence: Add MSI-X support to Endpoint driver

From: Alan Douglas Implement ->set_msix() and ->get_msix() callback functions in order to configure MSIX capability in the PCIe endpoint controller. Add cdns_pcie_ep_send_msix_irq() to send MSIX interrupts to Host. cdns_pcie_ep_send_msix_irq() gets the MSIX table address (virtual address) from

[PATCH v4 06/14] PCI: cadence: Allow pci_host_bridge to have custom pci_ops

Certain platforms like TI's J721E allows only 32-bit configuration space access. In such cases pci_generic_config_read and pci_generic_config_write cannot be used. Add support in Cadence core to let pci_host_bridge have custom pci_ops. Signed-off-by: Kishon Vijay Abraham I ---

[PATCH v4 04/14] PCI: cadence: Add support to start link and verify link status

Add cdns_pcie_ops to start link and verify link status. The registers to start link and to check link status is in Platform specific PCIe wrapper. Add support for platform specific drivers to add callback functions for the PCIe Cadence core to start link and verify link status. Signed-off-by:

[PATCH v4 03/14] PCI: cadence: Add support to use custom read and write accessors

Add support to use custom read and write accessors. Platforms that don't support half word or byte access or any other constraint while accessing registers can use this feature to populate custom read and write accessors. These custom accessors are used for both standard register access and

Re: [PATCH -next] iwlwifi: pcie: Use bitwise instead of arithmetic operator for flags

On Wed, 2020-05-06 at 16:51 +0300, Luciano Coelho wrote: > On Tue, 2020-05-05 at 20:19 -0700, Joe Perches wrote: > > On Wed, 2020-05-06 at 11:07 +0800, Samuel Zou wrote: > > > This silences the following coccinelle warning: > > > > > > "WARNING: sum of probable bitmasks, consider |" > > > > I

[PATCH v4 01/14] PCI: cadence: Fix cdns_pcie_{host|ep}_setup() error path

commit bd22885aa188 ("PCI: cadence: Refactor driver to use as a core library") while refactoring the Cadence PCIe driver to be used as library, removed pm_runtime_get_sync() from cdns_pcie_ep_setup() and cdns_pcie_host_setup() but missed to remove the corresponding pm_runtime_put_sync() in the

[PATCH v4 05/14] PCI: cadence: Add read/write accessors to perform only 32-bit accesses

Certain platforms like TI's J721E allow only 32-bit register accesses. Add read and write accessors to perform only 32-bit accesses in order to support platforms like TI's J721E. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/cadence/pcie-cadence.c | 40 +++

[PATCH v4 00/14] Add PCIe support to TI's J721E SoC

TI's J721E SoC uses Cadence PCIe core to implement both RC mode and EP mode. The high level features are: *) Supports Legacy, MSI and MSI-X interrupt *) Supports upto GEN4 speed mode *) Supports SR-IOV *) Supports multiple physical function *) Ability to route all transactions via SMMU

[PATCH v4 02/14] linux/kernel.h: Add PTR_ALIGN_DOWN macro

Add a macro for aligning down a pointer. This is useful to get an aligned register address when a device allows only word access and doesn't allow half word or byte access. Signed-off-by: Kishon Vijay Abraham I --- include/linux/kernel.h | 1 + 1 file changed, 1 insertion(+) diff --git

Re: [PATCH] i2c: puv3: Fix an error handling path in puv3_i2c_probe()

> There is a spurious 'put_device()' in the remove function. Do you find differences in the clean-up of system resources suspicious between the implementations of the functions “puv3_i2c_remove” and “puv3_i2c_probe”? Regards, Markus

Re: [PATCH v2 2/2] media: v4l: xilinx: Add Xilinx UHD-SDI Rx Subsystem driver

Hi Vishal, Thank you for the patch. There are a few questions for Hans below. On Wed, Apr 29, 2020 at 07:47:04PM +0530, Vishal Sagar wrote: > The Xilinx UHD-SDI Rx subsystem soft IP is used to capture native SDI > streams from SDI sources like SDI broadcast equipment like cameras and > mixers.

Re: [PATCH v2 3/6] sched/deadline: Add dl_bw_capacity()

On 06/05/2020 14:37, Juri Lelli wrote: > On 06/05/20 12:54, Dietmar Eggemann wrote: >> On 27/04/2020 10:37, Dietmar Eggemann wrote: [...] >> There is an issue w/ excl. cpusets and cpuset.sched_load_balance=0. The >> latter is needed to demonstrate the problem since DL task affinity can't >> be

Re: [PATCH v1] dt-bindings: net: nxp,tja11xx: rework validation support

> > Hi Oleksij > > > > reg is normally 0 to 31, since that is the address range for MDIO. > > Did you use 14 here because of what strapping allows? > > Yes. Only BITs 1:3 are configurable. BIT(0) is always 0 for the PHY0 and 1 > for the PHY1 O.K. good. > > > +required: > > > + - compatible >

[PATCH] Input: edt-ft5x06: Use DEFINE_DEBUGFS_ATTRIBUTE to define debugfs fops

From: Aishwarya Ramakrishnan On Tue, May 5, 2020 at 11:49 PM Greg Kroah-Hartman wrote: > On Tue, May 05, 2020 at 09:03:24PM +0530, Aishwarya Ramakrishnan wrote: >> It is more clear to use DEFINE_DEBUGFS_ATTRIBUTE to define debugfs file >> operation rather than DEFINE_SIMPLE_ATTRIBUTE. > No it

Re: [PATCH v2] arm64: cacheflush: Fix KGDB trap detection

On Tue, May 05, 2020 at 04:09:16PM +0100, Will Deacon wrote: > On Tue, May 05, 2020 at 03:15:29PM +0100, Daniel Thompson wrote: > > On Mon, May 04, 2020 at 09:48:04PM +0100, Will Deacon wrote: > > > On Mon, May 04, 2020 at 06:05:18PM +0100, Daniel Thompson wrote: > > > > diff --git

Re: [PATCH net-next v6 2/2] net: phy: tja11xx: add support for master-slave configuration

On Tue, May 05, 2020 at 08:35:06AM +0200, Oleksij Rempel wrote: > The TJA11xx PHYs have a vendor specific Master/Slave configuration bit, > which is not compatible with IEEE 803.2-2018 spec for 100Base-T1 > devices. So, provide a custom config_ange call back to solve this > problem. > >

Re: [PATCH net-next v6 1/2] ethtool: provide UAPI for PHY master/slave configuration.

On Tue, May 05, 2020 at 08:35:05AM +0200, Oleksij Rempel wrote: > This UAPI is needed for BroadR-Reach 100BASE-T1 devices. Due to lack of > auto-negotiation support, we needed to be able to configure the > MASTER-SLAVE role of the port manually or from an application in user > space. > > The same

Re: [PATCH v2] f2fs: shrink spinlock coverage

On 05/06, Chao Yu wrote: > In f2fs_try_to_free_nids(), .nid_list_lock spinlock critical region will > increase as expected shrink number increase, to avoid spining other CPUs > for long time, it's better to implement like extent cache and nats > shrinker. > > Signed-off-by: Chao Yu > --- > v2: >

Re: [PATCH] dt-bindings: reset: meson: add gxl internal dac reset

On Wed 06 May 2020 at 16:54, Philipp Zabel wrote: > Hi Jerome, > > On Wed, 2020-05-06 at 15:50 +0200, Jerome Brunet wrote: >> On Tue 14 Apr 2020 at 10:28, Jerome Brunet wrote: >> >> > On Thu 23 Jan 2020 at 11:13, Philipp Zabel wrote: >> > >> > > On Wed, 2020-01-22 at 10:25 +0100, Jerome

Re: [patch V4 part 1 03/36] sched: Clean up scheduler_ipi()

Alexandre Chartre writes: > On 5/5/20 3:16 PM, Thomas Gleixner wrote: >> @@ -10009,12 +10009,11 @@ static void kick_ilb(unsigned int flags) >> return; >> >> /* >> - * Use smp_send_reschedule() instead of resched_cpu(). >> - * This way we generate a sched IPI on the

Re: [PATCH 1/3] x86/cpu: Add a steppings field to struct x86_cpu_id

+1 --mark On Wed, May 06, 2020 at 09:15:14AM +0200, Borislav Petkov wrote: > From: Mark Gross > > Intel uses the same family/model for several CPUs. Sometimes the > stepping must be checked to tell them apart. > > On x86 there can be at most 16 steppings. Add a steppings bitmask to >

Re: [PATCH 2/3] x86/cpu: Add a X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS() macro

Reviewed-by: Mark Gross On Wed, May 06, 2020 at 09:15:15AM +0200, Borislav Petkov wrote: > From: Borislav Petkov > > ... to match Intel family 6 CPUs with steppings. > > Signed-off-by: Borislav Petkov > --- > arch/x86/include/asm/cpu_device_id.h | 4 > 1 file changed, 4 insertions(+)

Re: [PATCH 3/3] x86/apic: Convert the TSC deadline timer matching to steppings macro

Reviewed-by: Mark Gross On Wed, May 06, 2020 at 09:15:16AM +0200, Borislav Petkov wrote: > From: Borislav Petkov > > ... and get rid of the function pointers which would spit out the > microcode revision based on the CPU stepping. > > Signed-off-by: Borislav Petkov > Cc: Peter Zijlstra

Re: [PATCH 6/7] exec: Move most of setup_new_exec into flush_old_exec

Kees Cook writes: > On Tue, May 05, 2020 at 02:45:33PM -0500, Eric W. Biederman wrote: >> >> The current idiom for the callers is: >> >> flush_old_exec(bprm); >> set_personality(...); >> setup_new_exec(bprm); >> >> In 2010 Linus split flush_old_exec into flush_old_exec and >> setup_new_exec.

RE: [RFC PATCH] cpufreq: add support for HiSilicon SoC HIP09

Hi, > From: Thanu Rangarajan > Sent: Wednesday, May 6, 2020 1:58 PM > > Hi, > ACPI CPPC already supports the notion of boost. Not sure we need any > enhancements there. > > Regards, > Thanu > > On 06/05/2020, 18:19, "Sudeep Holla" wrote: > > + Thanu, Souvik who work with ASWG > > On

Re: [f2fs-dev] [PATCH] f2fs: change maximum zstd compression buffer size

On 05/06, Chao Yu wrote: > On 2020/5/6 7:05, Jaegeuk Kim wrote: > > On 05/05, Chao Yu wrote: > >> On 2020-5-4 22:30, Jaegeuk Kim wrote: > >>> From: Daeho Jeong > >>> > >>> Current zstd compression buffer size is one page and header size less > >>> than cluster size. By this, zstd compression

[PATCH net-next v3 0/3] add phy shared storage

Introduce the concept of a shared PHY storage which can be used by some QSGMII PHYs to ease initialization and access to global per-package registers. Changes since v2: - restore page to standard after reading the base address in the mscc driver, thanks Antoine. Changes since v1: - fix

[PATCH net-next v3 3/3] net: phy: mscc: use phy_package_shared

Use the new phy_package_shared common storage to ease the package initialization and to access the global registers. Signed-off-by: Michael Walle Tested-by: Vladimir Oltean Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli --- drivers/net/phy/mscc/mscc.h | 1 -

Re: [PATCH] dt-bindings: reset: meson: add gxl internal dac reset

Hi Jerome, On Wed, 2020-05-06 at 15:50 +0200, Jerome Brunet wrote: > On Tue 14 Apr 2020 at 10:28, Jerome Brunet wrote: > > > On Thu 23 Jan 2020 at 11:13, Philipp Zabel wrote: > > > > > On Wed, 2020-01-22 at 10:25 +0100, Jerome Brunet wrote: > > > > Add the reset line of the internal DAC found

[PATCH net-next v3 2/3] net: phy: bcm54140: use phy_package_shared

Use the new phy_package_shared common storage to ease the package initialization and to access the global registers. Signed-off-by: Michael Walle Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli --- drivers/net/phy/bcm54140.c | 57 -- 1 file changed,

[PATCH net-next v3 1/3] net: phy: add concept of shared storage for PHYs

There are packages which contain multiple PHY devices, eg. a quad PHY transceiver. Provide functions to allocate and free shared storage. Usually, a quad PHY contains global registers, which don't belong to any PHY. Provide convenience functions to access these registers. Signed-off-by: Michael

RE: [PATCH v2 1/2] PCI: hv: Fix the PCI HyperV probe failure path to release resource properly

From: Wei Hu Sent: Wednesday, May 6, 2020 6:22 AM > > -Original Message- > > From: Lorenzo Pieralisi > > Sent: Wednesday, May 6, 2020 7:10 PM > > To: Wei Hu > > Cc: KY Srinivasan ; Haiyang Zhang > > ; Stephen Hemminger ; > > wei@kernel.org; r...@kernel.org; bhelg...@google.com;

Re: [PATCH] spi: a3700: make a3700_spi_init() return void

On Wed, 6 May 2020 14:19:11 +0800, Jason Yan wrote: > Fix the following coccicheck warning: > > drivers/spi/spi-armada-3700.c:283:8-11: Unneeded variable: "ret". Return > "0" on line 315 > > Signed-off-by: Jason Yan > > [...] Applied to

Failure to shutdown/reboot with intel_iommu=on

Hello, On my Lenovo T460p I cannot shutdown and reboot when the iommu is enabled. This is using linux 5.2.7 as provided by Debian, 5.6.4 has the same problem. Suspend/resume also fails; I suspect this is the same issue. When requesting power off the kernel messages just end with: sd

Re: [PATCH v2 3/3] printk: use the lockless ringbuffer

Hi, I discovered a bug while preparing my next series, which also made me realize I had never tested the extended mode feature of netconsole. :-/ The only other user of extended output is /dev/kmsg, and it is doing it correctly. Explanation and patch below. On 2020-05-01, John Ogness wrote: >

Re: [PATCH v7 3/3] media: ov8856: Implement sensor module revision identification

Hey Marco, On Tue, 5 May 2020 at 12:17, Marco Felsch wrote: > > Hi Robert, > > On 20-05-05 12:01, Robert Foss wrote: > > Query the sensor for its module revision, and compare it > > to known revisions. > > > > Currently 2A and 1B revision indentification is supported. > > > > Signed-off-by:

Re: [RFC] DPCM for Tegra

On Wed 06 May 2020 at 16:12, Sameer Pujar wrote: >>> >>> | Front End PCMs | SoC DSP | Back End DAIs| >>> >>> * >>> ADMAIF<0> <> * * -> I2S >>> * * >>> ADMAIF<1>

[BUG]is there a refcount leak in function mei_me_cl_rm_by_uuid?

HI, all When reviewing function mei_me_cl_rm_by_uuid， I notice that function __mei_me_cl_by_uuid increases me_cl refcount and function _mei_me_cl_del delete a list node with decrement me_cl refcount , actually here cause a refcount leak as we haven't release the refcount by __mei_me_cl_by_uuid ?

Re: USB networking news, ofono for d4: less hacked version

* Pavel Machek [200506 10:12]: > Hi! > > So... I found out that USB networking works way better when I don't > attempt to charge the phone at the same. Yes, green light was > blinking. OK yes we don't have much of a charger detection currently and the charger tries to reconnect with the LED

Re: [PATCH v7 2/3] media: ov8856: Add devicetree support

On Tue, 5 May 2020 at 12:16, Marco Felsch wrote: > > Hi Robert, > > On 20-05-05 12:01, Robert Foss wrote: > > Add match table, enable ov8856_probe() to support > > both ACPI and DT modes. > > > > ACPI and DT modes are primarily distinguished from > > by checking for ACPI mode and by having

Re: [PATCH v2 2/5] pstore/platform: pass max_reason to kmesg dump

On Tue, May 5, 2020 at 5:59 PM Kees Cook wrote: > > On Tue, May 05, 2020 at 11:45:07AM -0400, Pavel Tatashin wrote: > > Add a new field to pstore_info that passes information about kmesg dump > > maximum reason. > > > > This allows a finer control of what kmesg dumps are stored on pstore > >

[RFC PATCH v2 2/3] docs: scheduler: Add scheduler overview documentation

From: John Mathew Add documentation for -scheduler overview -scheduler state transtion -CFS overview -scheduler data structs Add rst for scheduler APIs and modify sched/core.c to add kernel-doc comments. Suggested-by: Lukas Bulwahn Co-developed-by: Mostafa Chamanara Signed-off-by:

Re: [PATCH v4 00/12] DDR/L3 Scaling support on SDM845 and SC7180 SoCs

Hey Amit, Thanks for taking time to review the series! On 2020-05-06 18:08, Amit Kucheria wrote: On Tue, May 5, 2020 at 1:54 AM Sibi Sankar wrote: This patch series aims to extend cpu based scaling support to L3/DDR on SDM845 and SC7180 SoCs. Patches [1-3] - Blacklist SDM845 and SC7180 in

Re: Please can I have a stable KCSAN branch for 5.8?

Hi Paul, Cheers for the quick reply! On Wed, May 06, 2020 at 07:36:16AM -0700, Paul E. McKenney wrote: > On Wed, May 06, 2020 at 02:28:17PM +0100, Will Deacon wrote: > > I'm looking to rebase my READ_ONCE() series [1] on top of the KCSAN patches > > so that we can get them in for 5.8. However,

[RFC PATCH v2 3/3] docs: scheduler: Add introduction to scheduler context-switch

From: John Mathew Add documentation for introduction to -context-switch -x86 context-switch -MIPS context switch Suggested-by: Lukas Bulwahn Co-developed-by: Mostafa Chamanara Signed-off-by: Mostafa Chamanara Co-developed-by: Oleg Tsymbal Signed-off-by: Oleg Tsymbal Signed-off-by: John

Re: [PATCH v6] MIPS: Loongson: Add DMA support for LS7A

On Wed, May 06, 2020 at 04:47:30PM +0800, Huacai Chen wrote: > > For the above reasons, I think what you are concerned is not a > > big deal. > I don't think so, this is obviously a regression. If we can accept a > regression of RS780E, why we still maintain Loongson-2EF rather than > simply drop

Re: Re: Re: Re: Re: [PATCH net v2 0/2] Revert the 'socket_alloc' life cycle change

On Wed, May 06, 2020 at 02:59:26PM +0200, SeongJae Park wrote: > TL; DR: It was not kernel's fault, but the benchmark program. > > So, the problem is reproducible using the lebench[1] only. I carefully read > it's code again. > > Before running the problem occurred "poll big" sub test, lebench

[RFC PATCH v2 1/3] docs: scheduler: Restructure scheduler documentation.

From: John Mathew Add new sections to enable addition of new documentation on the scheduler. Existing documentation is moved under the related new sections. The sections are - overview - sched-features - arch-specific.rst - sched-debugging.rst Suggested-by: Lukas Bulwahn Signed-off-by:

Re: [PATCH RFC 2/2] fs/direct-io: pass NOWAIT to also for read requests

On Mon, May 04, 2020 at 06:54:57PM +0300, Konstantin Khlebnikov wrote: > For some reason NOWAIT currently is passed only for writes. > > Signed-off-by: Konstantin Khlebnikov > Fixes: 03a07c92a9ed ("block: return on congested block device") Looks good, Reviewed-by: Christoph Hellwig

Re: [PATCH RFC 1/2] fs/iomap/direct-io: pass NOWAIT to bio flags

On Mon, May 04, 2020 at 06:54:53PM +0300, Konstantin Khlebnikov wrote: > This is required to avoid waiting in lower layers. > > Signed-off-by: Konstantin Khlebnikov Looks good, Reviewed-by: Christoph Hellwig

Re: [PATCH RFC 1/2] fs/iomap/direct-io: pass NOWAIT to bio flags

On Mon, May 04, 2020 at 07:23:50PM +0300, Konstantin Khlebnikov wrote: > On 04/05/2020 19.00, Christoph Hellwig wrote: > > On Mon, May 04, 2020 at 06:54:53PM +0300, Konstantin Khlebnikov wrote: > > > This is required to avoid waiting in lower layers. > > > > > > Signed-off-by: Konstantin

[RFC PATCH v2 0/3] Add scheduler overview documentation

This patch series updates the scheduler documentation to add more topics wrt to scheduler overview. New sections are added to provide a brief overview of the kernel structs used by the scheduler, scheduler invocation and context switch. First version of this patch series was reviewed at Link:

Re: Proper use for linking foo.o_shipped after 69ea912fda74 ("kbuild: remove unneeded link_multi_deps")?

On Wed, May 6, 2020 at 1:45 PM Florian Fainelli wrote: > > Hi Masahiro, Michal, > > While updating our systems from 4.9 to 5.4, we noticed that one of the > kernel modules that we build, which is done by linking an object that we > pre-compile out of Kbuild stopped working. > > I bisected it down

Re: Please can I have a stable KCSAN branch for 5.8?

On Wed, May 06, 2020 at 02:28:17PM +0100, Will Deacon wrote: > Hi TIP folks, > > I'm looking to rebase my READ_ONCE() series [1] on top of the KCSAN patches > so that we can get them in for 5.8. However, tip/locking/kcsan seems to be > missing some bits: > > * An update to checkpatch.pl to

[PATCH V1 2/2] mmc: core: Fix recursive locking issue in CQE recovery path

From: Sarthak Garg Consider the following stack trace -001|raw_spin_lock_irqsave -002|mmc_blk_cqe_complete_rq -003|__blk_mq_complete_request(inline) -003|blk_mq_complete_request(rq) -004|mmc_cqe_timed_out(inline) -004|mmc_mq_timed_out mmc_mq_timed_out acquires the queue_lock for the first

[PATCH V1 0/2] CQE fixes

Fixes for a couple of issues observed with CQE. One with CQE completion path and the other one is with CQE recovery path. Sarthak Garg (1): mmc: core: Fix recursive locking issue in CQE recovery path Veerabhadrarao Badiganti (1): mmc: core: Check request type before completing the request

Re: [PATCH updated v2] sched/fair: core wide cfs task priority comparison

Sorry for being verbose; I've been procrastinating replying, and in doing so the things I wanted to say kept growing. On Fri, Apr 24, 2020 at 10:24:43PM +0800, Aaron Lu wrote: > To make this work, the root level sched entities' vruntime of the two > threads must be directly comparable. So one

[PATCH V1 1/2] mmc: core: Check request type before completing the request

In the request completion path with CQE, request type is being checked after the request is getting completed. This is resulting in returning the wrong request type and leading to the IO hang issue. ASYNC request type is getting returned for DCMD type requests. Because of this mismatch,

[PATCH] ASoC: mediatek: Fix error handling

If the function platform_get_irq() failed, the negative value returned will not be detected here. So fix error handling in mt6797_afe_pcm_dev_probe(). And when get irq failed, the function platform_get_irq() logs an error message, so remove redundant message here. Signed-off-by: Zhang Shengju

Re: Re: Re: Re: Re: [PATCH net v2 0/2] Revert the 'socket_alloc' life cycle change

On Wed, May 6, 2020 at 5:59 AM SeongJae Park wrote: > > TL; DR: It was not kernel's fault, but the benchmark program. > > So, the problem is reproducible using the lebench[1] only. I carefully read > it's code again. > > Before running the problem occurred "poll big" sub test, lebench executes >

Re: [PATCH v2 2/5] pstore/platform: pass max_reason to kmesg dump

On Wed, May 6, 2020 at 9:52 AM Steven Rostedt wrote: > > On Tue, 5 May 2020 14:59:37 -0700 > Kees Cook wrote: > > > > @@ -97,6 +97,8 @@ struct pstore_record { > > > * @read_mutex:serializes @open, @read, @close, and @erase callbacks > > > * @flags: bitfield of frontends the backend can

[PATCH] tracing: Wait for preempt irq delay thread to finish

From: "Steven Rostedt (VMware)" Running on a slower machine, it is possible that the preempt delay kernel thread may still be executing if the module was immediately removed after added, and this can cause the kernel to crash as the kernel thread might be executing after its code has been

[PATCH] perf-probe: Accept the instance number of kretprobe event

Since the commit 6a13a0d7b4d1 ("ftrace/kprobe: Show the maxactive number on kprobe_events") introduced to show the instance number of kretprobe events, the length of the 1st format of the kprobe event will not 1, but it can be longer. This caused a parser error in perf-probe. Skip the length

Re: [RFC PATCH 54/61] afs: Wait on PG_fscache before modifying/releasing a page

Matthew Wilcox wrote: > > Won't that screw up ITER_MAPPING? Does that mean that ITER_MAPPING isn't > > viable? > > Can you remind me why ITER_MAPPING needs: > > "The caller must guarantee that the pages are all present and they must be > locked using PG_locked, PG_writeback or PG_fscache to

Re: [PATCH] leds: lm355x: avoid enum conversion warning

On Wed, May 6, 2020 at 4:44 AM Nathan Chancellor wrote: > > On Tue, May 05, 2020 at 04:19:17PM +0200, Arnd Bergmann wrote: > > clang points out that doing arithmetic between diffent enums is usually > ^ different > > a mistake: > > > >

Re: [PATCH v3 1/3] mm/memory_hotplug: Introduce add_memory_device_managed()

Typo in $SUBJECT, should be "add_memory_driver_managed" ... -- Thanks, David / dhildenb

Re: [PATCH -next v2] staging: kpc2000: fix error return code in kp2000_pcie_probe()

Fantastic. Thanks! Reviewed-by: Dan Carpenter regards, dan carpenter

[PATCH v3 5/5] kselftest: Extend vdso correctness test to clock_gettime64

With the release of Linux 5.1 has been added a new syscall, clock_gettime64, that provided a 64 bit time value for a specified clock_ID to make the kernel Y2038 safe on 32 bit architectures. Extend the vdso correctness test to cover the newly exposed vdso function. Cc: Shuah Khan Signed-off-by:

[PATCH] sched/fair: Fix enqueue_task_fair warning some more

sched/fair: Fix enqueue_task_fair warning some more The recent patch, fe61468b2cb (sched/fair: Fix enqueue_task_fair warning) did not fully resolve the issues with the (rq->tmp_alone_branch != >leaf_cfs_rq_list) warning in enqueue_task_fair. There is a case where the first for_each_sched_entity

[PATCH v3 3/5] kselftest: Extend vDSO selftest to clock_getres

The current version of the multiarch vDSO selftest verifies only gettimeofday. Extend the vDSO selftest to clock_getres, to verify that the syscall and the vDSO library function return the same information. The extension has been used to verify the hrtimer_resoltion fix. Cc: Shuah Khan

[PATCH v3 1/5] kselftest: Enable vDSO test on non x86 platforms

Currently the vDSO tests are built only on x86 platforms and cannot be cross compiled. Enable vDSO TARGET for all the platforms. Future patches will extend the tests. Cc: Shuah Khan Signed-off-by: Vincenzo Frascino --- tools/testing/selftests/Makefile | 1 +

[PATCH v3 4/5] kselftest: Move test_vdso to the vDSO test suite

Move test_vdso from x86 to the vDSO test suite. Suggested-by: Andy Lutomirski Cc: Shuah Khan Signed-off-by: Vincenzo Frascino --- tools/testing/selftests/vDSO/Makefile | 10 -- .../{x86/test_vdso.c => vDSO/vdso_correctness_test.c} | 0

[PATCH v3 0/5] kselftest: Extend vDSO tests

This series extends the kselftests for the vDSO library making sure: that they compile correctly on non x86 platforms, that they can be cross compiled and introducing new tests that verify the correctness of the library. The so extended vDSO kselftests have been verified on all the platforms

Re: [PATCH v2] bpf, i386: remove unneeded conversion to bool

On May 6, 2020 7:03:52 AM PDT, Jason Yan wrote: >The '==' expression itself is bool, no need to convert it to bool >again. >This fixes the following coccicheck warning: > >arch/x86/net/bpf_jit_comp32.c:1478:50-55: WARNING: conversion to bool >not needed here

[PATCH v3 2/5] kselftest: Extend vDSO selftest

The current version of the multiarch vDSO selftest verifies only gettimeofday. Extend the vDSO selftest to the other library functions: - time - clock_getres - clock_gettime The extension has been used to verify the unified vdso library on the supported architectures. Cc: Shuah Khan

Re: [PATCH] regulator: db8500-prcmu: Use true,false for bool variable

On Wed, 6 May 2020 14:17:26 +0800, Jason Yan wrote: > Fix the following coccicheck warning: > > drivers/regulator/db8500-prcmu.c:184:1-17: WARNING: Assignment of 0/1 to > bool variable > > Signed-off-by: Jason Yan > > [...] Applied to

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