The cable test seems to be support by all of currently support Atherso
PHYs, so add support for all of them. This patch was tested only on
AR9331 PHY with following results:
- No cable is detected as short
- A 15m long cable connected only on one side is detected as 9m open.
- A cable test with
Jiaxun Yang writes:
> +static void htvec_mask_irq(struct irq_data *d)
> +{
> + struct htvec *priv = irq_data_get_irq_chip_data(d);
> + void __iomem *addr = priv->base + HTVEC_EN_OFF;
> + unsigned long flags;
> + u32 reg;
> +
> + raw_spin_lock_irqsave(>htvec_lock, flags);
No
yea I agree, will re-submit...
Cheers
john
On Wed, 13 May 2020 at 12:58, Greg KH wrote:
>
> On Sun, May 10, 2020 at 11:13:08AM +0100, John Oldman wrote:
> > Coding style issue
> > This patch clears the checkpatch.pl "Block comments should align the * on
> > each line" warning.
> >
> >
On Tue, 12 May 2020 at 22:42, Martin Blumenstingl
wrote:
>
> The SDHC MMC host controller on Amlogic SoCs provides an eMMC and MMC
> card interface with 1/4/8-bit bus width.
> It supports eMMC spec 4.4x/4.5x including HS200 (up to 100MHz clock).
>
> The public S805 datasheet [0] contains a short
On Tue, May 12, 2020 at 03:45:40PM -0500, Rob Herring wrote:
> The 'ibm,usb-ehci-440epx' compatible has a 2nd 'reg' region, but the
> schema says there is only 1 region. Fix this.
>
> Cc: Greg Kroah-Hartman
> Cc: linux-...@vger.kernel.org
> Signed-off-by: Rob Herring
> ---
> Please ack,
On 5/1/20 5:40 AM, John Ogness wrote:
> Hello,
>
> Here is a v2 for the first series to rework the printk subsystem. The
> v1 and history are here [0]. This first series only replaces the
> existing ringbuffer implementation. No locking is removed. No
> semantics/behavior of printk are
On Wed, May 13, 2020 at 05:11:16PM +0530, Anmol wrote:
> From: Anmol
>
> Fixed a issue related to struct file_operations which should normally be
> const.
>
> Signed-off-by: Anmol
> ---
> drivers/staging/android/ashmem.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
>-Original Message-
>From: Marek Szyprowski
>Sent: Tuesday, May 12, 2020 4:34 PM
>To: Ruhl, Michael J ; dri-
>de...@lists.freedesktop.org; io...@lists.linux-foundation.org; linaro-mm-
>s...@lists.linaro.org; linux-kernel@vger.kernel.org
>Cc: Pawel Osciak ; Bartlomiej Zolnierkiewicz
>;
> -Original Message-
> From: Rob Herring
> Sent: Wednesday, May 13, 2020 6:53 AM
> To: Ooi, Joyce
> Cc: Thor Thayer ; David S . Miller
> ; net...@vger.kernel.org; linux-
> ker...@vger.kernel.org; Westergreen, Dalon
> ; Tan, Ley Foon ;
> See, Chin Liang ; Nguyen, Dinh
> ;
On Wednesday 13 May 2020 12:33:14 Lorenzo Pieralisi wrote:
> On Wed, May 13, 2020 at 01:16:51PM +0200, Pali Rohár wrote:
> > On Thursday 30 April 2020 10:06:13 Pali Rohár wrote:
> > > Hello,
> > >
> > > this is the fourth version of the patch series for Armada 3720 PCIe
> > > controller
On 14.03.2020 02:17, Stephen Boyd wrote:
> Quoting Joe Perches (2020-03-10 21:51:24)
>> Convert the various uses of fallthrough comments to fallthrough;
>>
>> Done via script
>> Link:
>> https://lore.kernel.org/lkml/b56602fcf79f849e733e7b521bb0e17895d390fa.1582230379.git.joe.com/
>>
>
> This
On Sun, May 10, 2020 at 11:13:08AM +0100, John Oldman wrote:
> Coding style issue
> This patch clears the checkpatch.pl "Block comments should align the * on
> each line" warning.
>
> Signed-off-by: John Oldman
> ---
> v1: Initial attempt.
> v2: Resubmitted with shorter comment line, as
On Wed, May 13, 2020 at 6:53 PM Mark Brown wrote:
>
> On Wed, May 13, 2020 at 04:45:23PM +0900, Steve Lee wrote:
>
> > Changes since V2:
> > * Removed warn massage in max98390_dsm_calib_get func
> > and add comment.
>
> The problem isn't the warning, the problem is that you have an
Add new charge-current-limit feature to gpio-charger. This also
makes the online status GPIO optional, since hardware might only
expose the charge-current-limit feature and there is no good reason
to have it mandatory now that different GPIOs are supported.
Signed-off-by: Sebastian Reichel
---
On Fri, May 08, 2020 at 06:31:34PM +0100, Mark Brown wrote:
> On Fri, May 08, 2020 at 04:29:33PM +0300, Serge Semin wrote:
> > If DMAC register is left uncleared any further DMAless transfers
> > may cause the DMAC hardware handshaking interface getting activated.
> > So the next DMA-based Rx/Tx
Hello,
On Thu, 30 Apr 2020 10:06:13 +0200
Pali Rohár wrote:
> Marek Behún (5):
> PCI: aardvark: Improve link training
> PCI: aardvark: Add PHY support
> dt-bindings: PCI: aardvark: Describe new properties
> arm64: dts: marvell: armada-37xx: Set pcie_reset_pin to gpio function
> arm64:
Convert the gpio-charger bindings from text format to
new YAML based representation.
Signed-off-by: Sebastian Reichel
---
.../bindings/power/supply/gpio-charger.txt| 38 --
.../bindings/power/supply/gpio-charger.yaml | 75 +++
2 files changed, 75 insertions(+), 38
On Sun, May 10, 2020 at 12:13:35PM +0200, Matej Dujava wrote:
> This patch will add indentation to multiline variable and put obj-$(CONFIG_X)
> at the begining of the file.
Why change the order? What does that fix? Why do this? You say what
you do here, but not why. And without that, I can't
Hi all,
On Tue, 12 May 2020 10:47:05 +0530 Madhuparna Bhowmik
wrote:
> >
> > I think what is happening is this:
> >
> > ipmr_net_init() -> ipmr_rules_init() -> ipmr_new_table()
> >
> > ipmr_new_table() returns an existing table if there is one, but
> > obviously none can exist at init. So a
On Sun, May 10, 2020 at 12:13:34PM +0200, Matej Dujava wrote:
> This patch is removing CFLAGS that are defining flags that are not used.
>
> Signed-off-by: Matej Dujava
> ---
> drivers/staging/vt6655/Makefile | 3 ---
> drivers/staging/vt6655/device_main.c | 1 -
This file is not a
Hi Philipp,
On Wed, May 06, 2020 at 11:26:34AM +0200, Philipp Zabel wrote:
> On Fri, 2020-04-24 at 17:34 +0200, Maxime Ripard wrote:
> > The reset-simple code can be useful for drivers outside of drivers/reset
> > that have a few reset controls as part of their features. Let's move it to
> >
Hi all,
On Wed, 13 May 2020 11:46:10 +0530 madhuparnabhowmi...@gmail.com wrote:
>
> From: Madhuparna Bhowmik
>
> This patch fixes the following warning:
>
> =
> WARNING: suspicious RCU usage
> 5.7.0-rc4-next-20200507-syzkaller #0 Not tainted
>
This patch provides support for displays like VGM128064B0W10,
which requires a column offset of 2, i.e., its segments starts
in SEG2 and ends in SEG129.
Signed-off-by: Rodrigo Alencar <455.rodrigo.alen...@gmail.com>
---
Documentation/devicetree/bindings/display/ssd1307fb.txt | 1 +
On Wed, 13 May 2020 at 13:11, Peter Zijlstra wrote:
>
> On Tue, May 12, 2020 at 10:31:44PM +0200, Marco Elver wrote:
> > On Tue, 12 May 2020 at 21:08, Peter Zijlstra wrote:
>
> > > data_race() will include active calls to kcsan_{dis,en}able_current(),
> > > and this must not happen.
> >
> > Only
On Wed, May 13, 2020 at 01:30:11PM +0200, Joerg Roedel wrote:
> Yeah, I had this this way in v2, but changed it upon you request[1] :)
Yeah, I was wondering why this isn't a separate function - you like them
so much. :-P
> [1] https://lore.kernel.org/lkml/20200402114941.ga9...@zn.tnic/
But that
Hi Kishon,
On Wed, May 13, 2020 at 08:16:19AM +0530, Kishon Vijay Abraham I wrote:
> On 5/8/2020 6:23 AM, Laurent Pinchart wrote:
> > On Thu, May 07, 2020 at 10:14:45AM +0530, Kishon Vijay Abraham I wrote:
> >> On 4/2/2020 3:40 AM, Laurent Pinchart wrote:
> >>> From: Anurag Kumar Vulisha
> >>>
>
On 5/12/20 6:45 PM, Rob Herring wrote:
> On Thu, May 07, 2020 at 09:34:35PM +0200, ansuels...@gmail.com wrote:
>>> On Fri, May 01, 2020 at 12:06:15AM +0200, Ansuel Smith wrote:
It is now supported the editing of Tx De-Emphasis, Tx Swing and
Rx equalization params on ipq8064. Document
Hi All,
Currently drm debugfs files are created using drm_debugfs_create_files()
on request.
This series introduces new functions and infrastructure that will enable
the mass creation of debugfs files during drm_dev_register(). Drivers can
request for the creation of debugfs files at any time
Currently, vc4 delays adding of debugfs files until drm_dev_register()
calls vc4_debugfs_init() on each registered minor.
This change removes this infrastructure and uses the new
drm_debugfs_add_file() function and drm_device->debugfs_list to track
debugfs files which are added at
Introduce the ability to track requests for the addition of drm debugfs
files at any time and have them added all at once during
drm_dev_register().
Drivers can add drm debugfs file requests to a new list tied to drm_device.
During drm_dev_register(), the new function drm_debugfs_create_file()
On Wed, May 13, 2020 at 12:21:16PM +0100, Mark Brown wrote:
> On Wed, May 13, 2020 at 02:04:07PM +0300, Serge Semin wrote:
> > On Wed, May 13, 2020 at 11:23:24AM +0100, Mark Brown wrote:
>
> > > The conversion to YAML format should be the very last thing in the patch
> > > series,
>
> > Hm,
Replace the use of drm_debugfs_create_files with the new
drm_debugfs_add_files() to create various drm core debugfs files.
DRM debugfs files are also represented using the new drm_simple_info
struct for use with the new functions.
Signed-off-by: Wambui Karuga
---
drivers/gpu/drm/drm_atomic.c
From: Anmol
Fixed a issue related to struct file_operations which should normally be const.
Signed-off-by: Anmol
---
drivers/staging/android/ashmem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/android/ashmem.c b/drivers/staging/android/ashmem.c
index
On Wed, May 13, 2020 at 12:20:23PM +1000, Anand K Mistry wrote:
> The setting and checking of 'done' contains a rare race where the signal
> handler setting 'done' is run after checking to break the loop, but
> before waiting in evlist__poll(). In this case, the main loop won't wake
> up until
Hi Ansuel,
On 5/1/20 1:06 AM, Ansuel Smith wrote:
> From: Sham Muthayyan
>
> Add tx term offset support to pcie qcom driver need in some revision of
> the ipq806x SoC.
> Ipq8064 have tx term offset set to 7.
> Ipq8064-v2 revision and ipq8065 have the tx term offset set to 0.
>
> Signed-off-by:
On 01-05-20, 12:08, Christophe JAILLET wrote:
> There is no need to explicitly free memory that have been 'devm_kzalloc'ed.
> Simplify the probe function accordingly.
Applied, thanks
--
~Vinod
On Wed, May 13, 2020 at 02:35:55PM +0300, Serge Semin wrote:
> On Fri, May 08, 2020 at 06:30:23PM +0100, Mark Brown wrote:
> > > + while (dw_spi_dma_tx_busy(dws) && retry--)
> > > + ndelay(ns);
> > How deep can the FIFO be with this IP - could we end up ndelay()ing for
> > non-trivial
On Wed, May 13, 2020 at 12:09:30AM -0700, Ian Rogers wrote:
> On Mon, May 11, 2020 at 1:54 PM Jiri Olsa wrote:
> >
> > Display line number on when parsing custom metrics file, like:
> >
> > $ cat metrics
> > // IPC
> > mine1 = inst_retired.any / cpu_clk_unhalted.thread;
> >
> > krava
> >
On Wed, May 13, 2020 at 12:04:55AM -0700, Ian Rogers wrote:
SNIP
> > +METRICS FILE
> > +
> > +The file with metrics has following syntax:
> > +
> > + NAME = EXPRESSION ;
> > + NAME = EXPRESSION ;
> > + ...
> > +
> > +where NAME is unique identifier of the metric, which is later
On Wed, May 13, 2020 at 01:16:51PM +0200, Pali Rohár wrote:
> On Thursday 30 April 2020 10:06:13 Pali Rohár wrote:
> > Hello,
> >
> > this is the fourth version of the patch series for Armada 3720 PCIe
> > controller (aardvark). It's main purpose is to fix some bugs regarding
> > buggy ath10k
On Tue 12-05-20 22:43:21, ira.we...@intel.com wrote:
> From: Ira Weiny
>
> To prevent complications with in memory inodes we only set S_DAX on
> inode load. FS_XFLAG_DAX can be changed at any time and S_DAX will
> change after inode eviction and reload.
>
> Add init bool to
On 04-05-20, 19:34, Jason Yan wrote:
> Fix the following coccicheck warning:
>
> drivers/dma/qcom/hidma.c:553:1-17: WARNING: Assignment of 0/1 to bool
> variable
Applied, thanks
--
~Vinod
On Wed, May 13, 2020 at 01:13:40PM +0200, Borislav Petkov wrote:
> On Tue, Apr 28, 2020 at 05:16:34PM +0200, Joerg Roedel wrote:
> > @@ -302,9 +313,13 @@ void do_boot_page_fault(struct pt_regs *regs, unsigned
> > long error_code)
> > * - User faults
> > * - Reserved bits set
>
On Fri, May 08, 2020 at 02:30:47PM -0400, Johannes Weiner wrote:
> This patch series reworks memcg to charge swapin pages directly at
> swapin time, rather than at fault time, which may be much later, or
> not happen at all.
>
> Changes in version 2:
> - prevent double charges on pre-allocated
On Tue 12-05-20 22:43:20, ira.we...@intel.com wrote:
> From: Ira Weiny
>
> S_DAX should only be enabled when the underlying block device supports
> dax.
>
> Change ext4_should_use_dax() to check for device support prior to the
> over riding mount option.
>
> While we are at it change the
> GCC 10 appears to have changed -O2 in order to make compilation time
faster when using -flto, seemingly at the expense of performance, in
particular with regards to how the inliner works. Since -O3 these days
shouldn't have the same set of bugs as 10 years ago, this commit
defaults new kernel
On Wed, 2020-05-13 at 12:17 +0100, Lorenzo Pieralisi wrote:
> On Tue, May 05, 2020 at 06:13:13PM +0200, Nicolas Saenz Julienne wrote:
> > On the Raspberry Pi 4, after a PCI reset, VL805's firmware may either be
> > loaded directly from an EEPROM or, if not present, by the SoC's
> > co-processor,
On Tue 12-05-20 22:43:19, ira.we...@intel.com wrote:
> From: Ira Weiny
>
> In prep for the new tri-state mount option which then introduces
> EXT4_MOUNT_DAX_NEVER.
>
> Signed-off-by: Ira Weiny
Looks good to me. You can add:
Reviewed-by: Jan Kara
On Tue, May 12, 2020 at 11:50:18PM -0700, Ian Rogers wrote:
> On Mon, May 11, 2020 at 1:54 PM Jiri Olsa wrote:
> >
> > Adding support to parse metric difinitions in following form:
>
> Typo on definitions.
right
SNIP
> > +int expr__parse_custom(struct expr_parse_ctx *ctx, const char *expr)
>
On 2020/05/13 19:49, Michal Hocko wrote:
> On Wed 13-05-20 12:04:13, Petr Mladek wrote:
>> What is so special about OOM dump task so that it would deserve such
>> complications?
>
> Nothing really. Except for the potential amount of the output.
"echo t > /proc/sysrq-trigger" from userspace
On Sun, May 10, 2020 at 01:01:47AM +0200, Thomas Bogendoerfer wrote:
> Instead of including all Platform files, we simply include the
> needed one and avoid clashes with makefile variables.
>
> Signed-off-by: Thomas Bogendoerfer
> ---
> arch/mips/Kbuild.platforms | 73
>
On Tue, May 12, 2020 at 01:28:43AM -0700, Nathan Chancellor wrote:
> On Tue, May 12, 2020 at 10:05:09AM +0200, Thomas Bogendoerfer wrote:
> > On Tue, Apr 28, 2020 at 03:14:14PM -0700, Nathan Chancellor wrote:
> > > [..]
> > > Please let me know if there are any issues!
> >
> > I found no issues
On Wed, May 13, 2020 at 02:04:07PM +0300, Serge Semin wrote:
> On Wed, May 13, 2020 at 11:23:24AM +0100, Mark Brown wrote:
> > The conversion to YAML format should be the very last thing in the patch
> > series,
> Hm, haven't heard about this requirement. Could you point me out to a doc or
>
On 13/05/2020 00:00, Kees Cook wrote:
> On Tue, May 05, 2020 at 05:31:55PM +0200, Mickaël Salaün wrote:
>> This sysctl enables to propagate executable permission to userspace
>> thanks to the O_MAYEXEC flag.
>>
>> Signed-off-by: Mickaël Salaün
>> Reviewed-by: Thibaut Sautereau
>> Cc: Aleksa
Hi all,
Commit
e2d8d84b18c3 ("riscv: pgtable: Fix __kernel_map_pages build error if NOMMU")
is missing a Signed-off-by from its committer.
--
Cheers,
Stephen Rothwell
pgpyHamJBK6Iz.pgp
Description: OpenPGP digital signature
On Wed, May 13, 2020 at 10:37:46AM +0200, Wolfram Sang wrote:
> On Tue, May 12, 2020 at 04:45:32PM -0500, miny...@acm.org wrote:
> > From: Wolfram Sang
> >
> > Move away from the deprecated API.
> >
> > Based on a patch by Wolfram Sang .
> >
> > Signed-off-by: Corey Minyard
> > ---
> > I
On Wed, May 13, 2020 at 10:30:34AM +1000, Stephen Rothwell wrote:
> Hi all,
>
> Commit
>
> 73d0824e48eb ("char: ipmi: convert to use i2c_new_client_device()")
>
> is missing a Signed-off-by from its author.
Fixed, thanks.
-corey
>
> --
> Cheers,
> Stephen Rothwell
On 12/05/2020 23:57, Kees Cook wrote:
> On Tue, May 05, 2020 at 05:31:54PM +0200, Mickaël Salaün wrote:
>> Test propagation of noexec mount points or file executability through
>> files open with or without O_MAYEXEC, thanks to the
>> fs.open_mayexec_enforce sysctl.
>>
>> Signed-off-by: Mickaël
On Tue, May 05, 2020 at 06:13:13PM +0200, Nicolas Saenz Julienne wrote:
> On the Raspberry Pi 4, after a PCI reset, VL805's firmware may either be
> loaded directly from an EEPROM or, if not present, by the SoC's
> co-processor, VideoCore. This series adds support for the later.
>
> Note that
Hi Niklas,
Thank you for the review.
On Tue, May 12, 2020 at 11:26 PM Niklas wrote:
>
> Hi Lad,
>
> Thanks for your work.
>
> On 2020-04-15 11:19:06 +0100, Lad Prabhakar wrote:
> > Up until now the VIN was capable to convert any of its supported input mbus
> > formats to any of it's supported
On Thursday 30 April 2020 10:06:13 Pali Rohár wrote:
> Hello,
>
> this is the fourth version of the patch series for Armada 3720 PCIe
> controller (aardvark). It's main purpose is to fix some bugs regarding
> buggy ath10k cards, but we also found out some suspicious stuff about
> the driver and
On 5/13/20 3:11 PM, Parth Shah wrote:
>
>
> On 5/11/20 4:43 PM, Dietmar Eggemann wrote:
>> On 28/02/2020 10:07, Parth Shah wrote:
>>> Introduce the latency_nice attribute to sched_attr and provide a
>>> mechanism to change the value with the use of sched_setattr/sched_getattr
>>> syscall.
>>>
On Wed, May 13, 2020 at 01:10:57PM +0200, Peter Zijlstra wrote:
> So then I end up with something like the below, and I've validated that
> does not generate instrumentation... HOWEVER, I now need ~10g of memory
> and many seconds to compile each file in arch/x86/kernel/.
> diff --git
geni serial needs to express a perforamnce state requirement on CX
powerdomain depending on the frequency of the clock rates.
Use OPP table from DT to register with OPP framework and use
dev_pm_opp_set_rate() to set the clk/perf state.
Signed-off-by: Rajendra Nayak
Reviewed-by: Matthias Kaehlcke
Omit unused initialized value, because 'ret' will be assigined
by the function snd_soc_component_read().
Signed-off-by: Zhang Shengju
Signed-off-by: Tang Bin
---
sound/soc/fsl/fsl_audmix.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_audmix.c
Add support to add OPP tables and perf voting on the OPP powerdomain.
This is needed so venus votes on the corresponding performance state
for the OPP powerdomain along with setting the core clock rate.
Signed-off-by: Rajendra Nayak
Cc: Stanimir Varbanov
Cc: linux-me...@vger.kernel.org
---
If there is a strict pinmux or if simply the scl/sda gpios are missing,
the pins will remain in gpio mode, compromizing the I2C bus.
Change to the default state of the pins before returning the error.
Fixes: a53acc7ebf27 ("i2c: at91: Fix pinmux after devm_gpiod_get() for bus
recovery")
On Tue, Apr 28, 2020 at 05:16:34PM +0200, Joerg Roedel wrote:
> @@ -302,9 +313,13 @@ void do_boot_page_fault(struct pt_regs *regs, unsigned
> long error_code)
>* - User faults
>* - Reserved bits set
>*/
> - if (error_code & (X86_PF_PROT | X86_PF_USER |
On some qualcomm platforms DPU needs to express a performance state
requirement on a power domain depending on the clock rates.
Use OPP table from DT to register with OPP framework and use
dev_pm_opp_set_rate() to set the clk/perf state.
Signed-off-by: Rajendra Nayak
Reviewed-by: Rob Clark
On SDM845 DSI needs to express a perforamnce state
requirement on a power domain depending on the clock rates.
Use OPP table from DT to register with OPP framework and use
dev_pm_opp_set_rate() to set the clk/perf state.
Signed-off-by: Rajendra Nayak
Cc: Rob Clark
Cc: Sean Paul
Cc:
QSPI needs to vote on a performance state of a power domain depending on
the clock rate. Add support for it by specifying the perf state/clock rate
as an OPP table in device tree.
Signed-off-by: Rajendra Nayak
Cc: Mark Brown
Cc: Alok Chauhan
Cc: Akash Asthana
Cc: linux-...@vger.kernel.org
---
As kernelci.org is expanding its functional testing
capabilities, the concept of boot testing is now being
deprecated.
Next Monday 18th May, the web dashboard on https://kernelci.org
will be updated to primarily show functional test results
rather than boot results. The Boots tab will still be
Changes in v5:
1. Opp cleanup path fixed up across drivers
Changes in v4:
1. Fixed all review feedback on v3
2. Dropped the dts patches, will post as a seperate series once
driver changes are reviewed and merged.
The driver changes without DT updates to include OPP tables will
have zero
geni spi needs to express a perforamnce state requirement on CX
depending on the frequency of the clock rates. Use OPP table from
DT to register with OPP framework and use dev_pm_opp_set_rate() to
set the clk/perf state.
Signed-off-by: Rajendra Nayak
Reviewed-by: Matthias Kaehlcke
Cc: Mark
On Wed, May 13, 2020 at 01:04:26PM +0200, Geert Uytterhoeven wrote:
> Before commit 9495b7e92f716ab2 ("driver core: platform: Initialize
> dma_parms for platform devices"), the R-Car SATA device didn't have DMA
> parameters. Hence the DMA boundary mask supplied by its driver was
> silently
On Tue, May 12, 2020 at 10:31:44PM +0200, Marco Elver wrote:
> On Tue, 12 May 2020 at 21:08, Peter Zijlstra wrote:
> > data_race() will include active calls to kcsan_{dis,en}able_current(),
> > and this must not happen.
>
> Only if instrumentation is enabled for the compilation unit. If you
>
From: Yuechao Zhao
Use incorrect register to enable watchdog in nct7904_wdt_ping()
Signed-off-by: Yuechao Zhao
---
drivers/hwmon/nct7904.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index 04f2a8e..18c95be 100644
---
On 12/05/2020 23:48, Kees Cook wrote:
> On Tue, May 05, 2020 at 05:31:53PM +0200, Mickaël Salaün wrote:
>> Enable to forbid access to files open with O_MAYEXEC. Thanks to the
>> noexec option from the underlying VFS mount, or to the file execute
>> permission, userspace can enforce these
Looks good,
Reviewed-by: Christoph Hellwig
On 05.05.2020 18:12, Wolfram Sang wrote:
> On Wed, Apr 15, 2020 at 10:06:43AM +0300, Codrin Ciubotariu wrote:
>> devm_gpiod_get() usually calls gpio_request_enable() for non-strict pinmux
>> drivers. These puts the pins in GPIO mode, whithout notifying the pinctrl
>> driver. At this point, the I2C
Before commit 9495b7e92f716ab2 ("driver core: platform: Initialize
dma_parms for platform devices"), the R-Car SATA device didn't have DMA
parameters. Hence the DMA boundary mask supplied by its driver was
silently ignored, as __scsi_init_queue() doesn't check the return value
of
On 2020/05/13 19:04, Petr Mladek wrote:
>> What is wrong with adding NO_CONSOLES ?
>
> How does it differ from KERN_DEBUG? The debug messages:
>
> + can be disabled via sysfs
> + might reach console when this loglevel is enabled
KERN_NO_CONSOLES is different from KERN_DEBUG in that
On Wed, May 13, 2020 at 11:23:24AM +0100, Mark Brown wrote:
> On Tue, May 12, 2020 at 11:07:33PM +0300, Serge Semin wrote:
> > On Fri, May 08, 2020 at 02:33:36PM +0100, Mark Brown wrote:
>
> > > Please don't make new feature development dependent on conversion to the
> > > new schema format,
On Wed, May 13, 2020 at 04:45:23PM +0900, Steve Lee wrote:
> Changes since V2:
> * Removed warn massage in max98390_dsm_calib_get func
> and add comment.
The problem isn't the warning, the problem is that you have an empty
operation. You should either implement the function (eg,
On Wed 13-05-20 12:04:13, Petr Mladek wrote:
> What is so special about OOM dump task so that it would deserve such
> complications?
Nothing really. Except for the potential amount of the output. But as
you've said there are two ways around that. Disable this output if you
do not need it or make
> > In fact David already has a nice patch that transforms the whole thing
> > in a jump table, which is much nicer. I'll let him share the details
> > :)
>
> Ah! Looking forward to reviewing it then!
It's not actually that different. It still has the same header file, just uses
the macros to
Hi Sam/Daniel,
This is all very useful feedback, thank you.
On Tue, Apr 28, 2020 at 19:24 PM Daniel Vetter wrote:
>
> On Tue, Apr 28, 2020 at 8:18 PM Sam Ravnborg wrote:
> >
> > Hi Gareth.
> >
> > On Mon, Apr 27, 2020 at 09:21:47AM +0100, Gareth Williams wrote:
> > > Add DRM support for the
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported. Data register used to support the
From: Ramuthevar Vadivel Murugan
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8
From: Ramuthevar Vadivel Murugan
Add YAML file for dt-bindings to support NAND Flash Controller
on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/mtd/intel,lgm-nand.yaml| 83 ++
1 file changed, 83 insertions(+)
On Wed, May 13, 2020 at 09:15:22AM +, Bharat Bhushan wrote:
> Hi Jean,
>
> > -Original Message-
> > From: Michael S. Tsirkin
> > Sent: Wednesday, May 6, 2020 5:53 AM
> > To: Bharat Bhushan
> > Cc: jean-phili...@linaro.org; j...@8bytes.org; jasow...@redhat.com;
> >
Hi Rob,
On Tue, May 12, 2020 at 11:37:14AM -0500, Rob Herring wrote:
> On Mon, May 04, 2020 at 10:06:28AM +0100, Brian Starkey wrote:
> > On Fri, May 01, 2020 at 12:01:40PM -0700, John Stultz wrote:
> > > On Fri, May 1, 2020 at 4:08 AM Robin Murphy wrote:
> > > >
> > > > On 2020-05-01 11:21 am,
On Tue, May 12, 2020 at 01:45:28PM -0600, Stephen Warren wrote:
> On 5/12/20 8:48 AM, Mian Yousaf Kaukab wrote:
> > Add documentation for the new optional flag added for SRAM driver.
>
> > diff --git a/Documentation/devicetree/bindings/sram/sram.yaml
> >
> If that's not much work for you, then it'd be great if you include
> it for 5.7. :)
No problem, done now!
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On Mon, May 11, 2020 at 07:03:04PM -0700, Hemant Kumar wrote:
> Patches are addressing MHI core driver bug fixes. Patches tested on
> arm64 and x86 platforms.
>
Applied to mhi-next!
Thanks,
Mani
> Hemant Kumar (5):
> bus: mhi: core: Remove the system error worker thread
> bus: mhi: core:
On 12/05/2020 14:26, Neil Armstrong wrote:
The new Khadas VIM2, VIM3 and Edge boards embeds an on-board microcontroller
offering a 56bytes User Programmable NVMEM array.
This array needs a password to be writable, thus a password sysfs file
has been added on the device node to unlock the
Hi John,
On Fri, May 08, 2020 at 04:56:10AM +, John Stultz wrote:
> When I added the expected error testing, I forgot I need to set
> the return to zero when we successfully see an error.
>
> Without this change we only end up testing a single heap
> before the test quits.
>
The fix looks
On Wed, May 13, 2020 at 12:17:51PM +0200, Christoph Hellwig wrote:
> On Wed, May 13, 2020 at 12:10:37PM +0200, Christoph Hellwig wrote:
> > Ok. I'll see what went wrong for real and will hopefully have a
> > different patch for you in a bit.
>
> Can you try this patch instead of the previous
On Thu, May 07, 2020 at 03:36:33PM +0100, Quentin Perret wrote:
> On Thursday 07 May 2020 at 15:01:07 (+0100), Marc Zyngier wrote:
> > > /*
> > > - * u64 __kvm_call_hyp(void *hypfn, ...);
> > > + * u64 __kvm_call_hyp(unsigned long arg, ...);
> > > *
> > > * This is not really a variadic
On 2020-05-13 4:16 am, Hanjun Guo wrote:
On 2020/5/13 7:56, Tuan Phan wrote:
PMCG node can have zero ID mapping if its overflow interrupt
is wire based. The code to parse PMCG node can not assume it will
have a single ID mapping.
Signed-off-by: Tuan Phan
It's better to add
Fixes:
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