On Tue, May 12, 2020 at 02:25:23AM +, amy.s...@advantech.com.tw wrote:
> From: Amy Shih
>
> When nct7904 power up, it compares current sensor readings within the
> default threshold immediately, thus some of SMI status registers would
> get non zero values cause the false alarms on first read
Hi Experts，
Recently I hit one netfilter issue, it seems the API breaks or something
else.
On CentOS8.1 with the recent upstream kernel built from source, such as
5.6.0-rc6/5.7.0-rc4. When running the following command:
$ sudo bash -c 'iptables -A FORWARD -o enp3s0f1 -i ceph-brx -j ACCEPT'
i
On Wed, May 13, 2020 at 03:41:40PM +0200, Lars Povlsen wrote:
> This patch adds a temperature sensor driver to the Sparx5 SoC.
>
> Reviewed-by: Alexandre Belloni
> Signed-off-by: Lars Povlsen
> ---
> drivers/hwmon/Kconfig | 10 +++
> drivers/hwmon/Makefile | 2 +-
> drivers/hwmon/
On 2020/05/13 22:55, Steven Rostedt wrote:
> On Wed, 13 May 2020 20:03:53 +0900
> Tetsuo Handa wrote:
>
>> I think that basically only oops (e.g. WARN()/BUG()/panic()) messages worth
>> printing to consoles and the rest messages do not worth printing to consoles.
>> Existing KERN_$LOGLEVEL is too
On 5/13/20 2:20 AM, Grygorii Strashko wrote:
>
>
> On 12/05/2020 05:12, Randy Dunlap wrote:
>> On 5/11/20 3:44 PM, Andrew Morton wrote:
>>> The mm-of-the-moment snapshot 2020-05-11-15-43 has been uploaded to
>>>
>>> http://www.ozlabs.org/~akpm/mmotm/
>>>
>>> mmotm-readme.txt says
>>>
>>> READ
In the function kobject_cleanup(), kobject_del(kobj) is
called before the kobj->release(). That makes it possible to
release the parent of the kobject before the kobject itself.
To fix that, adding function __kboject_del() that does
everything that kobject_del() does except release the parent
refe
Em Wed, May 13, 2020 at 04:46:10PM +0200, Jiri Olsa escreveu:
> On Wed, May 13, 2020 at 11:08:25AM -0300, Arnaldo Carvalho de Melo wrote:
> > Em Wed, May 13, 2020 at 01:34:24PM +0200, Jiri Olsa escreveu:
> > > On Wed, May 13, 2020 at 12:09:30AM -0700, Ian Rogers wrote:
> > > > On Mon, May 11, 2020
The "buflen" value comes from the user and there is a potential that it
could be zero. In do_handle_to_path() we know that "handle->handle_bytes"
is non-zero and we do:
handle_dwords = handle->handle_bytes >> 2;
So values 1-3 become zero. Then in ovl_fh_to_dentry() we do:
int l
On Sun, May 10, 2020 at 04:48:42PM -0400, Alexander Monakov wrote:
> Add support for AMD Renoir (4000-series Ryzen CPUs).
>
> Signed-off-by: Alexander Monakov
> Cc: Thomas Gleixner
> Cc: Borislav Petkov
> Cc: x...@kernel.org
> Cc: Yazen Ghannam
> Cc: Brian Woods
> Cc: Clemens Ladisch
> Cc: J
On Sun, May 10, 2020 at 04:48:40PM -0400, Alexander Monakov wrote:
> Add PCI IDs for AMD Renoir (4000-series Ryzen CPUs). This is necessary
> to enable support for temperature sensors via the k10temp module.
>
> Signed-off-by: Alexander Monakov
> Cc: Thomas Gleixner
> Cc: Borislav Petkov
> Cc:
On 5/12/20 4:58 PM, Babu Moger wrote:
> +config X86_MEMORY_PROTECTION_KEYS
> + # Both Intel and AMD platforms support "Memory Protection Keys"
> + # feature. So add a generic option X86_MEMORY_PROTECTION_KEYS
> + # and set the option whenever X86_INTEL_MEMORY_PROTECTION_KEYS
> + # i
On Wed, 2020-05-13 at 07:21 +, Roberto Sassu wrote:
> > From: Mimi Zohar [mailto:zo...@linux.ibm.com]
> > Sent: Tuesday, May 12, 2020 9:38 PM
> > On Tue, 2020-05-12 at 16:31 +, Roberto Sassu wrote:
> > > > From: Mimi Zohar [mailto:zo...@linux.ibm.com]
> >
> > > > > > Each time the EVM prot
On 5/13/2020 5:26 AM, Greg Kroah-Hartman wrote:
> On Tue, May 12, 2020 at 11:00:15AM -0400, Al Cooper wrote:
>> Some BRCMSTB USB chips have an XHCI, EHCI and OHCI controller
>> on the same port where XHCI handles 3.0 devices, EHCI handles 2.0
>> devices and OHCI handles <2.0 devices. Currently t
On Wed, May 13, 2020 at 09:20:08AM +0800, Jiaxun Yang wrote:
> 于 2020年5月13日 GMT+08:00 上午2:06:02, Bjorn Helgaas 写到:
> >On Tue, May 12, 2020 at 03:43:56PM +0800, Jiaxun Yang wrote:
> >> This controller can be found on Loongson-2K SoC, Loongson-3
> >> systems with RS780E/LS7A PCH.
> >>
> >> The RS78
Balbir Singh writes:
>
> + if (prev_mm & LAST_USER_MM_L1D_FLUSH)
> + arch_l1d_flush(0); /* Just flush, don't populate the TLB */
Bah. I fundamentally hate tail comments. They are just disturbing the
reading flow. Aside of that, this states the WHAT but not the WHY. And
if you ad
On Thu, May 07, 2020 at 06:59:10PM +0530, Anshuman Khandual wrote:
> All HWCAP name arrays (i.e hwcap_str, compat_hwcap_str, compat_hwcap2_str)
> that are scanned for /proc/cpuinfo output are detached from their bit fild
> definitions making it difficult to corelate. This is also bit problematic
>
On Wed, May 13, 2020 at 2:51 PM Rodrigo Rolim Mendes de Alencar
<455.rodrigo.alen...@gmail.com> wrote:
>
> This patch provides support for displays like VGM128064B0W10,
> which requires a column offset of 2, i.e., its segments starts
> in SEG2 and ends in SEG129.
You forgot
1) version of the patch
On Thu, May 07, 2020 at 01:53:18PM -0500, Gustavo A. R. Silva wrote:
> The current codebase makes use of the zero-length array language
> extension to the C90 standard, but the preferred mechanism to declare
> variable-length types such as these ones is a flexible array member[1][2],
> introduced i
On Wed, May 13, 2020 at 09:44:40AM -0500, Eric W. Biederman wrote:
> Luis Chamberlain writes:
>
> > On Wed, May 13, 2020 at 08:42:30AM -0500, Eric W. Biederman wrote:
> >> Luis Chamberlain writes:
> >>
> >> > On Tue, May 12, 2020 at 12:40:55PM -0500, Eric W. Biederman wrote:
> >> >> Luis Chambe
Rename pwm pinctrl nodes name to matching with yaml bindings
requirements.
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
b/arch/arm/boot/dts/stm32f4-pinct
Update led nodes names to be aligned with yaml description
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32f469-disco.dts | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/stm32f469-disco.dts
b/arch/arm/boot/dts/stm32f469-disco.dts
index 9
Fix the nodes names to be aligned with yaml description
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/stm32h743-pinctrl.dtsi
b/arch/arm/boot/dts/stm32h743-pinctrl.dts
Update led nodes names to be aligned with yaml description
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32746g-eval.dts | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/stm32746g-eval.dts
b/arch/arm/boot/dts/stm32746g-eval.dts
index 4ea3
Driver doesn't use interrupt's name to get it so remove it from
the node.
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32f746.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index 93c063796780..5d69a0c653eb
Fix the nodes names to be aligned with yaml description
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
ind
On Tue, May 12, 2020 at 06:01:53PM +0200, Vitaly Kuznetsov wrote:
> Errors during hibernation with reenlightenment notifications enabled were
> reported:
>
> [ 51.730435] PM: hibernation entry
> [ 51.737435] PM: Syncing filesystems ...
> ...
> [ 54.102216] Disabling non-boot CPUs ...
>
This series fixes issues hight lighted by dtbs_check on STM32 devicetrees.
The patches has been developped on top of v5.7-rc4 tag.
Benjamin Gaignard (15):
ARM: dts: stm32: remove useless interrupt-names property on stm32f429
ARM: dts: stm32: update pwm pinctrl node names for stm32f4
ARM: dts
Update led nodes names to be aligned with yaml description
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32429i-eval.dts | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts
b/arch/arm/boot/dts/stm32429i-eval.dts
index c27f
On 5/13/20 7:11 AM, Lars Povlsen wrote:
> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> index 834c59950d1cf..2b0e9021fd7e0 100644
> --- a/drivers/pinctrl/Kconfig
> +++ b/drivers/pinctrl/Kconfig
> @@ -396,6 +396,23 @@ config PINCTRL_OCELOT
> select OF_GPIO
> select REG
Correct the compatible list for stm32mp15x SoC.
Fix the name of the stm32mp15x dedicated supply to be aligned with
what the driver use.
Signed-off-by: Benjamin Gaignard
---
Documentation/devicetree/bindings/usb/dwc2.yaml | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/D
There might be good reasons why the getting a clock failed. To treat the
clocks as optional we're specifically only interested in ignoring -ENOENT,
and devm_clk_get_optional() does just that.
Signed-off-by: Lubomir Rintel
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 16
1 file ch
In newer kernels (at least 5.6), it appears root is not able to write
to files owned by other users in a sticky directory:
$ uname -r
5.6.11-arch1-1
$ stat -f /tmp
File: "/tmp"
ID: 0Namelen: 255 Type: tmpfs
Block size: 4096 Fundamental block size: 4096
Blocks: Total: 200516
Driver use interrupt-parent field so update the bindings to allow it.
Signed-off-by: Benjamin Gaignard
---
Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
b/Doc
Update led nodes names to be aligned with yaml description
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
b/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
index d946e0
On Mon, May 11, 2020 at 02:26:30PM -0700, Divya Indi wrote:
> >> @@ -1123,6 +1156,18 @@ int ib_nl_handle_resolve_resp(struct sk_buff *skb,
> >>
> >>send_buf = query->mad_buf;
> >>
> >> + /*
> >> + * Make sure the IB_SA_NL_QUERY_SENT flag is set before
> >> + * processing this query. If
Hi,
please consider applying patches that are chained to this message.
They make getting/enabling the clocks in the etnaviv driver slightly nicer,
first two also fix potential problems.
Thanks
Lubo
All the NULL checks are pointless, clk_*() routines already deal with NULL
just fine.
Signed-off-by: Lubomir Rintel
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 53 ++-
1 file changed, 19 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
b
Add the missing #address-cells and #size-cells to spi node.
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32mp151.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi
b/arch/arm/boot/dts/stm32mp151.dtsi
index 3ea05ba48215..5484ef81c5a8 100644
Since commit 65f037e8e908 ("drm/etnaviv: add support for slave interface
clock") the reg clock is enabled before the bus clock and we need to undo
its enablement on error.
Fixes: 65f037e8e908 ("drm/etnaviv: add support for slave interface clock")
Signed-off-by: Lubomir Rintel
---
drivers/gpu/drm
Driver doesn't use interrupt's name to get it so remove it from
the node.
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32h743.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index 05eb02e6d083..e1de90ade786
Analogously to the introduction of panic_on_warn, this patch
introduces a kernel option named panic_on_taint in order to
provide a simple and generic way to stop execution and catch
a coredump when the kernel gets tainted by any given taint flag.
This is useful for debugging sessions as it avoids
Update led nodes names to be aligned with yaml description
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32f769-disco.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/stm32f769-disco.dts
b/arch/arm/boot/dts/stm32f769-disco.dts
index 1626e
Update led nodes names to be aligned with yaml description
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32f429-disco.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/stm32f429-disco.dts
b/arch/arm/boot/dts/stm32f429-disco.dts
index 30c0f
Driver doesn't use interrupt's name to get it so remove it from
the node.
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32f429.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index d7770699feb5..3537430fd4a3
On Wed, May 13, 2020 at 03:49:25PM +0200, Andrew Lunn wrote:
> > So, I think consistency of implementation is more important than fixing
> > this; the current behaviour has been established for many years now.
>
> With netlink ethtool we have the possibility of adding a new API to
> control this.
On Thu, May 07, 2020 at 01:53:13PM -0500, Gustavo A. R. Silva wrote:
> The current codebase makes use of the zero-length array language
> extension to the C90 standard, but the preferred mechanism to declare
> variable-length types such as these ones is a flexible array member[1][2],
> introduced i
Hi Mel,
we have tried the kernel with adjust_numa_imbalance() crippled to just
return the imbalance it's given.
It has solved all the performance problems I have reported.
Performance is the same as with 5.6 kernel (before the patch was
applied).
* solved the performance drop upto 20% with sing
Add ALSA controls to configure the PDM clock and PDM input edges for the
4 digital mic inputs.
Signed-off-by: Dan Murphy
---
sound/soc/codecs/tlv320adcx140.c | 74 +---
1 file changed, 69 insertions(+), 5 deletions(-)
diff --git a/sound/soc/codecs/tlv320adcx140.c b/s
On 07-05-20, 14:00, Gustavo A. R. Silva wrote:
> The current codebase makes use of the zero-length array language
> extension to the C90 standard, but the preferred mechanism to declare
> variable-length types such as these ones is a flexible array member[1][2],
> introduced in C99:
>
> struct foo
Hi Vinicius,
On 3/18/20 10:07 AM, Murali Karicheri wrote:
Hi Vinicius,
On 03/12/2020 07:34 PM, Vinicius Costa Gomes wrote:
Hi,
Po Liu writes:
Hi Vinicius,
Br,
Po Liu
-Original Message-
From: Vinicius Costa Gomes
Sent: 2020年2月22日 5:44
To: Po Liu ; da...@davemloft.net;
hauke.meh
On 07-05-20, 14:00, Gustavo A. R. Silva wrote:
> The current codebase makes use of the zero-length array language
> extension to the C90 standard, but the preferred mechanism to declare
> variable-length types such as these ones is a flexible array member[1][2],
> introduced in C99:
>
> struct foo
On 08-05-20, 16:07, Gustavo A. R. Silva wrote:
> The current codebase makes use of the zero-length array language
> extension to the C90 standard, but the preferred mechanism to declare
> variable-length types such as these ones is a flexible array member[1][2],
> introduced in C99:
>
> struct foo
On Wed, May 13, 2020 at 5:03 PM Lars Povlsen wrote:
>
> With this change a SPI controller can be added without having a IRQ
> associated, and causing all transfers to be polled. For SPI controllers
> without DMA, this can significantly improve performance by less
> interrupt handling overhead.
..
On Thu, May 07, 2020 at 09:42:52AM +, Wei Yongjun wrote:
> Fix to return a negative error code from the error handling
> case instead of 0, as done elsewhere in this function.
>
> Fixes: d2efbbd18b1e ("gnss: add driver for sirfstar-based receivers")
> Reported-by: Hulk Robot
> Signed-off-by:
On 06-05-20, 17:25, Samuel Zou wrote:
> Fixes coccicheck warnings:
>
> drivers/dma/ti/k3-udma.c:1294:1-3: WARNING: PTR_ERR_OR_ZERO can be used
> drivers/dma/ti/k3-udma.c:1311:1-3: WARNING: PTR_ERR_OR_ZERO can be used
> drivers/dma/ti/k3-udma.c:1376:1-3: WARNING: PTR_ERR_OR_ZERO can be used
Applie
Do not generate SCTP_ADDR_{MADE_PRIM,ADDED} events for SCTP_FUTURE_ASSOC assocs.
These events are described in rfc6458#section-6.1
SCTP_PEER_ADDR_CHANGE:
This tag indicates that an address that is
part of an existing association has experienced a change of
state (e.g., a failure or return to servi
On Wed, May 13, 2020 at 7:31 AM Pratik Sampat wrote:
>
> Thanks for your comment.
>
>
> On 12/05/20 11:07 pm, Peter Zijlstra wrote:
> > Just a quick note..
> >
> > On Mon, May 11, 2020 at 07:40:55PM +0530, Pratik Rajesh Sampat wrote:
> >
> >> +/*
> >> + * Rearrange the weight distribution
Luis Chamberlain writes:
> On Wed, May 13, 2020 at 08:42:30AM -0500, Eric W. Biederman wrote:
>> Luis Chamberlain writes:
>>
>> > On Tue, May 12, 2020 at 12:40:55PM -0500, Eric W. Biederman wrote:
>> >> Luis Chamberlain writes:
>> >>
>> >> > On Tue, May 12, 2020 at 06:52:35AM -0500, Eric W. B
On Tue 12-05-20 22:43:23, ira.we...@intel.com wrote:
> From: Ira Weiny
>
> Add a flag to preserve FS_XFLAG_DAX in the ext4 inode.
>
> Set the flag to be user visible and changeable. Set the flag to be
> inherited. Allow applications to change the flag at any time.
>
> Finally, on regular file
On Wed, May 13, 2020 at 11:08:25AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Wed, May 13, 2020 at 01:34:24PM +0200, Jiri Olsa escreveu:
> > On Wed, May 13, 2020 at 12:09:30AM -0700, Ian Rogers wrote:
> > > On Mon, May 11, 2020 at 1:54 PM Jiri Olsa wrote:
> > > >
> > > > Display line number on wh
On 13/05/2020 13:24, Thomas Gleixner wrote:
> Why would the SMP call function single interrupt go through the
> PLATFORM_IPI_VECTOR? It goes as the name says through the
> CALL_FUNCTION_SINGLE_VECTOR.
>
Wrong vector, my bad.
However 2) still stands in my opinion. We don't have "ipi raise" trace
On Wed, May 13, 2020 at 03:44:22PM +0300, Serge Semin wrote:
> On Fri, May 08, 2020 at 10:30:27PM +0300, Andy Shevchenko wrote:
> > On Fri, May 08, 2020 at 04:29:42PM +0300, Serge Semin wrote:
> > > DebugFS kernel interface provides a dedicated method to create the
> > > registers dump file. Use it
The BD71837 had a HW "feature" where changing the regulator output
voltages of other regulators but bucks 1-4 might cause spikes if
regulators were enabled. Thus SW prohibit voltage changes for other
regulators except for bucks 1-4 when regulator is enabled.
The HW colleagues did inadvertly fix th
The device tree binding declares the ti,mic-bias-source and the
ti,vref-source properties as u32. The code reads them as u8 which is
incorrect. Since the device tree binding indicates them as u32 the
conde needs to be updated to read u32.
In addition the bias source needs to be shifted 4 bits to
On Thu 2020-04-30 19:14:34, Alper Nebi Yasak wrote:
> I recently experienced some trouble with setting up an encrypted-root
> system, my Chromebook Plus (rk3399-gru-kevin, ARM64) would appear to
> hang where it should have asked for an encryption passphrase; and I
> eventually figured out that the
On Tue 12-05-20 22:43:22, ira.we...@intel.com wrote:
> From: Ira Weiny
>
> We add 'always', 'never', and 'inode' (default). '-o dax' continue to
> operate the same.
>
> Specifically we introduce a 2nd DAX mount flag EXT4_MOUNT2_DAX_NEVER and set
> it and EXT4_MOUNT_DAX_ALWAYS appropriately.
>
> > + reason: panic, oops, emergency, shutdown(ordered by severity)
> > + handling: restart, halt, poweroff
> >
> > Or we might just replace KMSG_DUMP_RESTART, KMSG_DUMP_HALT,
> > KMSG_DUMP_POWEROFF with a single KMSG_DUMP_SHUTDOWN.
> >
> > Then the max reason variable would make sense.
>
>
From: Oliver Graute
Set Gamma Values and Register Values for the HSD20_IPS Panel
Signed-off-by: Oliver Graute
---
need information howto set HSD20_IPS Panel at run time and not at compile time
Changes for v2:
- added define for HSD20_IPS_GAMMA values
- check for HSD20_IPS define
- enabled
On 28/04/2020 15:17, Bernard Zhao wrote:
> pm_resump api did not handle drm_mode_config_helper_resume error.
> This change add handle to return drm_mode_config_helper_resume`s
> error number. This code logic is aligned with api pm_suspend.
> After this change, the code maybe a bit readable.
>
> Si
On 3/20/20 3:16 AM, Michael Kelley wrote:
> From: Arnd Bergmann Sent: Wednesday, March 18, 2020 2:27 AM
>>
>> On Wed, Mar 18, 2020 at 1:18 AM Michael Kelley
>> wrote:
>>> From: Arnd Bergmann
On Sat, Mar 14, 2020 at 4:36 PM Michael Kelley
wrote:
>
> The Hyper-V frame buffer d
Vivek Goyal writes:
> On Wed, May 13, 2020 at 11:03:48AM +0200, Vitaly Kuznetsov wrote:
>> Vivek Goyal writes:
>>
>> > On Tue, May 12, 2020 at 05:50:53PM +0200, Vitaly Kuznetsov wrote:
>> >> Vivek Goyal writes:
>> >>
>> >> >
>> >> > So if we are using a common structure "kvm_vcpu_pv_apf_data"
Hi Marek,
Thank you for the patch.
On Wed, May 13, 2020 at 03:32:36PM +0200, Marek Szyprowski wrote:
> The Documentation/DMA-API-HOWTO.txt states that the dma_map_sg() function
> returns the number of the created entries in the DMA address space.
> However the subsequent calls to the dma_sync_sg_
On Tue, May 12, 2020 at 09:42:30PM -0500, Rob Herring wrote:
> On Tue, May 05, 2020 at 11:45:10AM -0400, Pavel Tatashin wrote:
> > Currently, it is possible to dump kmsges for panic, or oops.
> > With max_reason it is possible to dump messages for other
> > kmesg_dump events, for example reboot, ha
On Fri, May 08, 2020 at 09:10:35PM +0200, Clément Péron wrote:
> Enable CPU opp tables for Tanix TX6.
>
> Also add the fixed regulator that provided vdd-cpu-gpu required for
> CPU opp tables.
>
> This voltage has been found using a voltmeter and could be wrong.
>
> Tested-by: Jernej Škrabec
> S
On 20/04/2020 22:26, Martin Blumenstingl wrote:
> Add support for the Meson GX SoCs to the meson-ee-pwrc driver.
>
> The power domains on the GX SoCs are very similar to G12A. The only
> known differences so far are:
> - The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the
> VPU pow
On Wed, May 13, 2020 at 7:13 AM Luis Chamberlain wrote:
>
> On Wed, May 13, 2020 at 06:49:50AM +0100, Al Viro wrote:
> > On Tue, May 12, 2020 at 01:43:05PM -0600, Shuah Khan wrote:
> > > diff --git a/fs/exec.c b/fs/exec.c
> > > index 06b4c550af5d..ea24bdce939d 100644
> > > --- a/fs/exec.c
> > > ++
On Wed, May 06, 2020 at 04:15:12PM +0800, Samuel Zou wrote:
> Fixes coccicheck warning:
>
> sound/soc/sunxi/sun4i-i2s.c:1177:1-3: WARNING: PTR_ERR_OR_ZERO can be used
>
> Reported-by: Hulk Robot
> Signed-off-by: Samuel Zou
Didn't we remove that coccicheck test?
Maxime
signature.asc
Descri
Delete the duplicate "to" possibly double-typed.
Signed-off-by: Wang Wenhu
Cc: Viresh Kumar
---
include/linux/cpufreq.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index f7240251a949..67d5950bd878 100644
--- a/include/lin
On 20/04/2020 22:26, Martin Blumenstingl wrote:
> This adds support for the power domains on Meson8/Meson8b/Meson8m2.
> Meson8 doesn't use any reset lines while Meson8b and Meson8m2 use the
> same set of reset lines (which is different from the newer SoCs).
> Add dedicated compatible strings for Me
On Mon, May 11, 2020 at 06:47:44PM +0200, Vitaly Kuznetsov wrote:
> Concerns were expressed around (ab)using #PF for KVM's async_pf mechanism,
> it seems that re-using #PF exception for a PV mechanism wasn't a great
> idea after all. The Grand Plan is to switch to using e.g. #VE for 'page
> not pre
Arnaldo Carvalho de Melo wrote:
Em Mon, May 11, 2020 at 11:45:09PM +0530, Sandipan Das escreveu:
On 09/05/20 4:51 pm, Ravi Bangoria wrote:
> Commit 7eec00a74720 ("perf symbols: Consolidate symbol fixup issue")
> removed powerpc specific sym-handling.c file from Build. This wasn't
> caught by bu
Balbir Singh writes:
> @@ -550,8 +549,10 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct
> mm_struct *next,
>* Avoid user/user BTB poisoning by flushing the branch
>* predictor when switching between processes. This stops
>* one process fr
Russell,
Thanks for the feedback.
On 13/05/2020 at 15:05, Russell King - ARM Linux admin wrote:
On Wed, May 06, 2020 at 01:37:39PM +0200, nicolas.fe...@microchip.com wrote:
From: Nicolas Ferre
Keep previous function goals and integrate phylink actions to them.
phylink_ethtool_get_wol() is n
On Wed, May 13, 2020 at 08:42:30AM -0500, Eric W. Biederman wrote:
> Luis Chamberlain writes:
>
> > On Tue, May 12, 2020 at 12:40:55PM -0500, Eric W. Biederman wrote:
> >> Luis Chamberlain writes:
> >>
> >> > On Tue, May 12, 2020 at 06:52:35AM -0500, Eric W. Biederman wrote:
> >> >> Luis Chambe
On Wed, 13 May 2020 at 10:11, Mika Westerberg
wrote:
> > I can fix up all those, but out of interest how did you "know" the
> > right three digit identifier to use?
> I work for Intel ;-)
Hah, okay, thanks :)
> > I'm really wondering if drivers/mfd/lpc_ich.c is the right place for
> > this kind
This is an add-on series to the main SoC Sparx5 series
(Message-ID: <20200513125532.24585-1-lars.povl...@microchip.com>).
The series add support for the serial GPIO controller used by Sparx5,
as well as (MSCC) ocelot/jaguar2.
The GPIO controller only supports output mode currently.
It is expecte
This adds SGPIO devices for the Sparx5 SoC and configures it for the
applicable reference boards.
Reviewed-by: Alexandre Belloni
Signed-off-by: Lars Povlsen
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 52 +++
.../boot/dts/microchip/sparx5_pcb125.dts | 5 ++
.../dts
This adds DT bindings for the Microsemi SGPIO controller, bindings
mscc,ocelot-sgpio and mscc,luton-sgpio.
Reviewed-by: Alexandre Belloni
Signed-off-by: Lars Povlsen
---
.../bindings/pinctrl/mscc,ocelot-sgpio.yaml | 66 +++
MAINTAINERS | 1 +
This adds a pinctrl driver for the Microsemi/Microchip Serial GPIO
(SGPIO) device used in various SoC's.
Reviewed-by: Alexandre Belloni
Signed-off-by: Lars Povlsen
---
MAINTAINERS | 1 +
drivers/pinctrl/Kconfig | 17 +
drivers/pinctrl/Makefile
Hi
Am 13.05.20 um 13:41 schrieb Wambui Karuga:
> Introduce the ability to track requests for the addition of drm debugfs
> files at any time and have them added all at once during
> drm_dev_register().
>
> Drivers can add drm debugfs file requests to a new list tied to drm_device.
> During drm_de
Em Wed, May 13, 2020 at 01:34:24PM +0200, Jiri Olsa escreveu:
> On Wed, May 13, 2020 at 12:09:30AM -0700, Ian Rogers wrote:
> > On Mon, May 11, 2020 at 1:54 PM Jiri Olsa wrote:
> > >
> > > Display line number on when parsing custom metrics file, like:
> > >
> > > $ cat metrics
> > > // IPC
> >
Function isolate_migratepages_block() runs some checks out of lru_lock
when choose pages for migration. After checking PageLRU() it checks extra
page references by comparing page_count() and page_mapcount(). Between
these two checks page could be removed from lru, freed and taken by slab.
As a res
Here is a final patch to solve that hugetlb_get_unmapped_area() can't
get unmapped area below mmap base for huge pages based on a few previous
discussions and patches from me.
I'm so sorry. When sending v2 and v3 patches, I forget to cc:
linux...@kvack.org and linux-kernel@vger.kernel.org. No reco
On Tue, May 12, 2020 at 12:19:30AM +0100, Bryan O'Donoghue wrote:
> This patch adds USB role switch support to the tps6598x.
>
> The setup to initiate or accept a data-role switch is both assumed and
> currently required to be baked-into the firmware as described in TI's
> document here.
>
> Link
On 13/05/20 14:43, john mathew wrote:
> +=
> +Capacity-Aware Scheduling
> +=
> +
Thanks for taking a jab at this. At a glance it looks okay, with one
comment below.
FWIW I still intend to write a more pamphlet-sized thing, I'll toss
something out
On 2020/05/13 22:46, Steven Rostedt wrote:
> On Wed, 13 May 2020 20:03:53 +0900
> Tetsuo Handa wrote:
>
>> I think that basically only oops (e.g. WARN()/BUG()/panic()) messages worth
>> printing to consoles and the rest messages do not worth printing to consoles.
>> Existing KERN_$LOGLEVEL is too
Em Wed, May 13, 2020 at 01:39:41PM +0200, Jiri Olsa escreveu:
> On Wed, May 13, 2020 at 12:20:23PM +1000, Anand K Mistry wrote:
> > The setting and checking of 'done' contains a rare race where the signal
> > handler setting 'done' is run after checking to break the loop, but
> > before waiting in
On Wed, May 13, 2020 at 09:53:50AM -0400, Vivek Goyal wrote:
[..]
> > > And this notion of same structure being shared across multiple events
> > > at the same time is just going to create more confusion, IMHO. If we
> > > can decouple it by serializing it, that definitely feels simpler to
> > > u
On Wed, May 13, 2020 at 08:02:14AM -0500, Rob Herring wrote:
> On Wed, May 13, 2020 at 7:10 AM Mark Brown wrote:
> > [1/1] spi: dt-bindings: sifive: Add missing 2nd register region
> > commit: b265b5a0ba15b6e00abce9bf162926e84b4323b4
> You missed my ask for an ack. This is a dependency for
This add DT bindings for the Sparx5 SPI driver.
Reviewed-by: Alexandre Belloni
Signed-off-by: Lars Povlsen
---
.../bindings/spi/mscc,ocelot-spi.yaml | 49 +++
1 file changed, 39 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/mscc,ocelo
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