On Tue, Apr 28, 2020 at 05:17:02PM +0200, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Add handling for emulation the MOVS instruction on MMIO regions, as done
> by the memcpy_toio() and memcpy_fromio() functions.
>
> Signed-off-by: Joerg Roedel
> ---
> arch/x86/kernel/sev-es.c | 78 ++
Hi Jonathan,
On 2020-05-25 02:36, Jonathan Marek wrote:
Add support for the graphics clock controller found on SM8250
based devices. This would allow graphics drivers to probe and
control their clocks.
This is copied from the downstream kernel, adapted for upstream.
For example, GDSCs have been
On Sun, May 24, 2020 at 09:46:55PM -0500, Jeremy Linton wrote:
> Hi,
>
> Thanks for taking a look at this.
>
> On 5/23/20 1:20 PM, Russell King - ARM Linux admin wrote:
> > On Fri, May 22, 2020 at 04:30:49PM -0500, Jeremy Linton wrote:
> > > C45 devices are to return 0 for registers they haven't
Hi Jonathan,
On 2020-05-24 08:08, Jonathan Marek wrote:
Add the apps_smmu node for sm8250. Note that adding the iommus field
for
UFS is required because initializing the iommu removes the bypass
mapping
that created by the bootloader.
This statement doesn't seem right, you can just say sinc
Linus Torvalds writes:
> On Sun, May 24, 2020 at 8:08 AM Thomas Gleixner wrote:
>>
>>[..] overlooked a corner case where the first iteration terminates
>>do a entiry being on rq which makes the list management incomplete [..]
>
> You had some kind of mini-stroke while writing that explan
On Thu, May 21, 2020 at 10:43:58AM +1000, Matt Jolly wrote:
> Add support for Dell Wireless 5816e Download Mode (AKA boot & hold mode /
> QDL download mode) to drivers/usb/serial/qcserial.c
>
> This is required to update device firmware.
>
> Signed-off-by: Matt Jolly
> ---
> v2 changes: typo.
H
Hi Jonathan,
On 2020-05-24 08:08, Jonathan Marek wrote:
Add the apps_smmu node for sm8150. Note that adding the iommus field
for
UFS is required because initializing the iommu removes the bypass
mapping
that created by the bootloader.
Signed-off-by: Jonathan Marek
---
arch/arm64/boot/dts/qc
On Mon, May 25, 2020 at 8:58 AM 冯锐 wrote:
> > On Fri, May 22, 2020 at 11:16 AM Greg KH wrote:
> > >
> > > If I can get an ack from the MMC maintainer, I can take this in my
> > > tree...
> > >
> > > {hint}
> >
> > I think this feature needs much more discussion to make sure we get a good
> > user
niedz., 24 maj 2020 o 07:00 Syed Nayyar Waris napisał(a):
>
> Hello Linus,
>
> Since this patchset primarily affects GPIO drivers, would you like
> to pick it up through your GPIO tree?
>
> This patchset introduces a new generic version of for_each_set_clump.
> The previous version of for_each_set
Peter Zijlstra wrote:
> On Fri, May 22, 2020 at 08:26:44PM +0200, Thomas Gleixner wrote:
> > Peter Zijlstra writes:
> > > On Fri, May 22, 2020 at 08:02:54PM +0200, Peter Zijlstra wrote:
> > >> On Tue, May 19, 2020 at 11:45:32PM +0200, Ahmed S. Darwish wrote:
> > >> > Mark all C code samples insid
On Mon, 25 May 2020, Geert Uytterhoeven wrote:
Below is the list of build error/warning regressions/improvements in
JFYI, when comparing v5.7-rc7[1] to v5.7-rc6[3], the summaries are:
- build errors: +4/-0
- build warnings: +0/-0
+ error: modpost: "devm_ioremap" [drivers/net/ethernet/xilinx
On 21.5.2020 6.45, Rik van Riel wrote:
> On Wed, 2020-05-20 at 16:34 -0400, Alan Stern wrote:
>> On Wed, May 20, 2020 at 03:21:44PM -0400, Rik van Riel wrote:
>>>
>>> Interesting. That makes me really curious why things are
>>> getting stuck, now...
>>
>> This could be a bug in xhci-hcd. Perhaps t
On 25/05/2020 14:28, Horatiu Vultur wrote:
> Hi,
>
> While I was working on adding support for MRA role to MRP, I noticed that I
> might have some issues with the netlink interface, so it would be great if you
> can give me an advice on how to continue.
>
> First a node with MRA role can behave a
Warm reboot can not restore qca6390 controller baudrate
to default due to lack of controllable BT_EN pin or power
supply, so fails to download firmware after warm reboot.
Fixed by sending EDL_SOC_RESET VSC to reset controller
within added device shutdown implementation.
Signed-off-by: Zijun Hu
-
On Fri, 22 May 2020 at 20:39, Rafael J. Wysocki wrote:
>
> On Fri, May 22, 2020 at 7:19 AM Marek Szyprowski
> wrote:
> >
> > Hi Rafael,
> >
> > On 21.05.2020 19:08, Rafael J. Wysocki wrote:
> > > From: Rafael J. Wysocki
> > >
> > > clk_pm_runtime_get() assumes that the PM-runtime usage counter w
From: SeongJae Park
This commit updates MAINTAINERS file for DAMON related files.
Signed-off-by: SeongJae Park
---
MAINTAINERS | 12
1 file changed, 12 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5a5332b3591d..586513e92b65 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
From: SeongJae Park
This commit adds a simple user space tests for DAMON. The tests are
using kselftest framework.
Signed-off-by: SeongJae Park
---
tools/testing/selftests/damon/Makefile| 7 +
.../selftests/damon/_chk_dependency.sh| 28
tools/testing/selftests/damon/_c
From: SeongJae Park
This commit adds kunit based unit tests for DAMON.
Signed-off-by: SeongJae Park
Reviewed-by: Brendan Higgins
---
mm/Kconfig | 11 +
mm/damon-test.h | 622
mm/damon.c | 6 +
3 files changed, 639 insertions(+)
cr
Hi,
While I was working on adding support for MRA role to MRP, I noticed that I
might have some issues with the netlink interface, so it would be great if you
can give me an advice on how to continue.
First a node with MRA role can behave as a MRM(Manager) or as a
MRC(Client). The behaviour is de
From: SeongJae Park
This commit adds a shallow wrapper python script, ``/tools/damon/damo``
that provides more convenient interface. Note that it is only aimed to
be used for minimal reference of the DAMON's debugfs interfaces and for
debugging of the DAMON itself.
Signed-off-by: SeongJae Park
Hi all,
Today's linux-next merge of the notifications tree got a conflict in:
include/linux/pipe_fs_i.h
between commit:
f6dd975583bd ("pipe: merge anon_pipe_buf*_ops")
from the vfs tree and commits:
8cfba76383e9 ("pipe: Allow buffers to be marked read-whole-or-error for
notifications")
From: SeongJae Park
This commit adds a tracepoint for DAMON. It traces the monitoring
results of each region for each aggregation interval. Using this, DAMON
will be easily integrated with any tracepoints supporting tools such as
perf.
Signed-off-by: SeongJae Park
---
include/trace/events/da
From: SeongJae Park
This commit adds a debugfs interface for DAMON.
DAMON exports four files, ``attrs``, ``pids``, ``record``, and
``monitor_on`` under its debugfs directory, ``/damon/``.
Attributes
--
Users can read and write the ``sampling interval``, ``aggregation
interval``, ``regi
On Thu, May 21, 2020 at 12:02 AM Drew Fustini wrote:
> I've posted a v2 which I hope improves the intent of the line names. [0]
>
> I'm happy to integrate any feedback and create a v3 - especially if it
> is prefered for me to list the specific peripherial signals instead of
> an abstract term li
From: SeongJae Park
This commit implements the recording feature of DAMON. If this feature
is enabled, DAMON writes the monitored access patterns in its binary
format into a file which specified by the user. This is already able to
be implemented by each user using the callbacks. However, as the
On Fri, May 15, 2020 at 03:43:57AM +0300, Jarkko Sakkinen wrote:
> +config INTEL_SGX
> + bool "Intel SGX"
> + depends on X86_64 && CPU_SUP_INTEL
> + select SRCU
> + select MMU_NOTIFIER
> + help
> + Intel(R) SGX is a set of CPU instructions that can be used by
> + app
From: Zhang Qiang
The callback function "rcu_free_wq" could be called after memory
was released for "rescuer" already, Thus delete a misplaced call
of the function "kfree".
Fixes: 6ba94429c8e7 ("workqueue: Reorder sysfs code")
Signed-off-by: Zhang Qiang
---
v1->v2->v3:
Only commit information
From: SeongJae Park
This commit implements callbacks for DAMON. Using this, DAMON users can
install their callbacks for each step of the access monitoring so that
they can do something interesting with the monitored access patterns
online. For example, callbacks can report the monitored pattern
From: SeongJae Park
Only a number of parts in the virtual address space of the processes is
mapped to physical memory and accessed. Thus, tracking the unmapped
address regions is just wasteful. However, tracking every memory
mapping change might incur an overhead. For the reason, DAMON applies
From: SeongJae Park
At the beginning of the monitoring, DAMON constructs the initial regions
by evenly splitting the memory mapped address space of the process into
the user-specified minimal number of regions. In this initial state,
the assumption of the regions (pages in same region have simil
On Mon, May 25, 2020 at 10:36:05AM +0200, Peter Zijlstra wrote:
> Hi!
>
> Since you seem to care about kgdb, I figured you might want to fix this
> before I mark it broken on x86 (we've been considering doing that for a
> while).
>
> AFAICT the whole debugreg usage of kgdb-x86_64 is completely ho
Hi Dan,
On Wed, May 20, 2020 at 2:08 PM Dan Carpenter wrote:
> The of_find_matching_node() function returns NULL on error, it never
> returns error pointers. This doesn't really impact runtime very much
> because if "syscon" is NULL then syscon_node_to_regmap() will return
> -EINVAL. The only
From: SeongJae Park
This commit implements DAMON's basic access check and region based
sampling mechanisms. This change would seems make no sense, mainly
because it is only a part of the DAMON's logics. Following two commits
will make more sense.
Basic Access Check
--
DAMON ba
JESD216 rev D makes BFPT 20 DWORDs. Update the BFPT size define to
reflect that.
The check for rev A or later compared the BFPT header length with the
maximum BFPT length, BFPT_DWORD_MAX. Since BFPT_DWORD_MAX was 16, and so
was the BFPT length for both rev A and B, this check worked fine. But
now,
Since this flash doesn't have a Profile 1.0 table, the Octal DTR
capabilities are enabled in the post SFDP fixup, along with the 8D-8D-8D
fast read settings.
Enable Octal DTR mode with 20 dummy cycles to allow running at the
maximum supported frequency of 200Mhz.
The flash supports the soft reset
The Cypress Semper flash is an xSPI compliant octal DTR flash. Add
support for using it in octal DTR mode.
The flash by default boots in a hybrid sector mode. But the sector map
table on the part I had was programmed incorrectly and the SMPT values
on the flash don't match the public datasheet. Sp
From: SeongJae Park
This commit exports 'lookup_page_ext()' to GPL modules. This will be
used by DAMON.
Signed-off-by: SeongJae Park
---
mm/page_ext.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/mm/page_ext.c b/mm/page_ext.c
index 4ade843ff588..71169b45bba9 100644
--- a/mm/page_ext.c
On resume, the init procedure will be run that will re-enable it.
Signed-off-by: Pratyush Yadav
---
drivers/mtd/spi-nor/core.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 68559386f6f8..63ab588299f4 100644
-
Double Transfer Rate (DTR) is SPI protocol in which data is transferred
on each clock edge as opposed to on each clock cycle. Make
framework-level changes to allow supporting flashes in DTR mode.
Right now, mixed DTR modes are not supported. So, for example a mode
like 4S-4D-4D will not work. All
This table is indication that the flash is xSPI compliant and hence
supports octal DTR mode. Extract information like the fast read opcode,
dummy cycles, the number of dummy cycles needed for a Read Status
Register command, and the number of address bytes needed for a Read
Status Register command.
From: SeongJae Park
This commit introduces a kernel module named DAMON. Note that this
commit is implementing only the stub for the module load/unload, basic
data structures, and simple manipulation functions of the structures to
keep the size of commit small. The core mechanisms of DAMON will
The xSPI Profile 1.0 table specifies how many dummy cycles and address
bytes are needed for the Read Status Register command in octal DTR mode.
Use that information to send the correct Read SR command.
Signed-off-by: Pratyush Yadav
---
drivers/mtd/spi-nor/core.c | 25 +++--
1
Flashes might want to add a custom setup hook to configure the flash in
the proper mode for operation. But after that, they would still want to
run the default setup hook because it selects the read, program, and
erase operations. Since there is little point in repeating all that
code, expose the s
Hi Wei,
On Wed, May 20, 2020 at 5:18 AM Wei Yongjun wrote:
> In case of error, the function of_find_matching_node() returns NULL
> pointer not ERR_PTR(). The IS_ERR() test in the return value check
> should be replaced with NULL test.
>
> Fixes: ccea5e8a5918 ("bus: Add driver for Integrator/AP l
Perform a Soft Reset on shutdown on flashes that support it so that the
flash can be reset to its initial state and any configurations made by
spi-nor (given that they're only done in volatile registers) will be
reset. This will hand back the flash in pristine state for any further
operations on it
On 2020-05-24 03:11, Richard Cochran wrote:
On Fri, May 22, 2020 at 04:37:23PM +0800, Jianyong Wu wrote:
In general, vm inside will use virtual counter compered with host use
phyical counter. But in some special scenarios, like nested
virtualization, phyical counter maybe used by vm. A interface
A Soft Reset sequence will return the flash to Power-on-Reset (POR)
state. It consists of two commands: Soft Reset Enable and Soft Reset.
Find out if the sequence is supported from BFPT DWORD 16.
Signed-off-by: Pratyush Yadav
---
drivers/mtd/spi-nor/core.h | 1 +
drivers/mtd/spi-nor/sfdp.c | 4 +
The Micron MT35XU512ABA flash does not support the quad enable bit. But
instead of programming the Quad Enable Require field to 000b ("Device
does not have a QE bit"), it is programmed to 111b ("Reserved").
While this is technically incorrect, it is not reason enough to abort
BFPT parsing. Instead
Some devices in DTR mode expect an extra command byte called the
extension. The extension can either be same as the opcode, bitwise
inverse of the opcode, or another additional byte forming a 16-byte
opcode. Get the extension type from the BFPT. For now, only flashes with
"repeat" and "inverse" ext
pt., 22 maj 2020 o 06:12 Tiezhu Yang napisał(a):
>
> When call function devm_platform_ioremap_resource(), we should use IS_ERR()
> to check the return value and return PTR_ERR() if failed.
>
> Fixes: 72d8cb715477 ("drivers: gpio: bcm-kona: use
> devm_platform_ioremap_resource()")
> Signed-off-by:
Some controllers, like the cadence qspi controller, have trouble reading
only 1 byte in DTR mode. So, do 2 byte reads for SR and FSR commands in
DTR mode, and then discard the second byte.
Signed-off-by: Pratyush Yadav
---
drivers/mtd/spi-nor/core.c | 15 +--
1 file changed, 13 inser
In xSPI mode, flashes expect 2-byte opcodes. The second byte is called
the "command extension". There can be 3 types of extensions in xSPI:
repeat, invert, and hex. When the extension type is "repeat", the same
opcode is sent twice. When it is "invert", the second byte is the
inverse of the opcode.
Double Transfer Rate (DTR) ops are added in spi-mem. But this controller
doesn't support DTR transactions. Since we don't use the default
supports_op(), which rejects all DTR ops, do that explicitly in our
supports_op().
Signed-off-by: Pratyush Yadav
---
drivers/spi/spi-mtk-nor.c | 6 ++
1 f
Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.
Signed-off-by: Pratyush Yadav
---
drivers/mtd/spi-nor/core.c | 35 +++
drivers/mtd/spi-nor/core.h | 2 ++
2 files changed, 37 insertions(+)
Double Transfer Rate (DTR) ops are added in spi-mem. But this controller
doesn't support DTR transactions. Since we don't use the default
supports_op(), which rejects all DTR ops, do that explicitly in our
supports_op().
Signed-off-by: Pratyush Yadav
---
drivers/spi/atmel-quadspi.c | 6 ++
1
From: SeongJae Park
Introduction
DAMON is a data access monitoring framework subsystem for the Linux kernel.
The core mechanisms of DAMON called 'region based sampling' and adaptive
regions adjustment' (refer to :doc:`mechanisms` for the detail) make it
accurate, efficient, and scal
From: SeongJae Park
This commit adds typos found from DAMON patchset.
Signed-off-by: SeongJae Park
---
scripts/spelling.txt | 8
1 file changed, 8 insertions(+)
diff --git a/scripts/spelling.txt b/scripts/spelling.txt
index ffa838f3a2b5..a8214d8e8e4b 100644
--- a/scripts/spelling.txt
JESD216D.01 says that when the address width can be 3 or 4, it defaults
to 3 and enters 4-byte mode when given the appropriate command. So, when
we see a configurable width, default to 3 and let flash that default to
4 change it in a post-bfpt fixup.
This fixes SMPT parsing for flashes with config
Hi,
This series adds support for octal DTR flashes in the spi-nor framework,
and then adds hooks for the Cypress Semper and Mircom Xcella flashes to
allow running them in octal DTR mode. This series assumes that the flash
is handed to the kernel in Legacy SPI mode.
Tested on TI J721e EVM with 1-b
Each phase is given a separate 'dtr' field so mixed protocols like
4S-4D-4D can be supported.
Signed-off-by: Pratyush Yadav
---
drivers/spi/spi-mem.c | 3 +++
include/linux/spi/spi-mem.h | 8
2 files changed, 11 insertions(+)
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-m
pt., 22 maj 2020 o 06:12 Tiezhu Yang napisał(a):
>
> Add COMPILE_TEST support to the PXA GPIO driver for better compile
> testing coverage.
>
> Signed-off-by: Tiezhu Yang
> ---
> drivers/gpio/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpio/Kconfig b/
On Sun, May 24, 2020 at 12:35:51PM +, Wei Yang wrote:
> These two cases could be unified into one.
Care to provide a test case which supports your change?
> Signed-off-by: Wei Yang
> ---
> include/linux/bitops.h | 5 +
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/i
sob., 23 maj 2020 o 05:25 Tiezhu Yang napisał(a):
>
> On 05/23/2020 03:07 AM, Robert Jarzmik wrote:
> > Tiezhu Yang writes:
> >
> >> When call function devm_platform_ioremap_resource(), we should use IS_ERR()
> >> to check the return value and return PTR_ERR() if failed.
> >>
> >> Fixes: 542c25b7
From: shengjiu wang
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
sound/soc/fsl/fsl_asrc.c:557:18: warning: no previous prototype for function
'fsl_asrc_get_dma_channel' [-Wmissing-prototypes]
struct dma_chan *fsl_asrc_get_dma_channel(struct fsl_asrc_pair *pair, bool di
On (20/05/25 10:42), Petr Mladek wrote:
> On Sun 2020-05-24 23:50:34, Tetsuo Handa wrote:
> > syzbot found a NULL pointer dereference bug inside mptcp_recvmsg() due to
> > ssock == NULL, but this bug manifested inside selinux_socket_recvmsg()
> > because pr_debug() was no-op [1].
> >
> > pr_debu
On 25/05/2020 08:41, Weiyi Lu wrote:
> It'd be dangerous when struct clk_core have new memebers.
> Add the missing initial value to clk_init_data.
>
Sorry I don't really understand this commit message, can please explain.
In any case if this is a problem, then we probably we should fix it for
On Fri, May 22, 2020 at 04:23:55PM -0700, Steve deRosier wrote:
> On Fri, May 22, 2020 at 2:51 PM Luis Chamberlain wrote:
> I had to go RTFM re: kernel taints because it has been a very long
> time since I looked at them. It had always seemed to me that most were
> caused by "kernel-unfriendly" u
On Mon 2020-05-25 17:41:10, Sergey Senozhatsky wrote:
> On (20/05/25 00:32), Tetsuo Handa wrote:
> > pr_cont_once() does not make sense; at least emitting module name using
> > pr_fmt() into middle of a line (after e.g. pr_info_once()) does not make
> > sense. Let's remove unused pr_cont_once().
>
(+ Eric)
On Mon, 25 May 2020 at 11:01, Nicolas TOROMANOFF
wrote:
>
> > -Original Message-
> > From: Ard Biesheuvel
> > Sent: Monday, May 25, 2020 9:46 AM
> > To: Nicolas TOROMANOFF
> > Subject: Re: [PATCH 5/5] crypto: stm32/crc: protect from concurrent accesses
> >
> > On Mon, 25 May 20
We may want to get rid of the iio_priv_to_dev() helper. The reason is that
we will hide some of the members of the iio_dev structure (to prevent
drivers from accessing them directly), and that will also mean hiding the
implementation of the iio_priv_to_dev() helper inside the IIO core.
Hiding the
Hi!
> > On Tue 2020-05-12 23:10:56, Martin Blumenstingl wrote:
> >> The PRG_ETHERNET registers on Meson8b and newer SoCs can add an RX
> >> delay. Add a property with the known supported values so it can be
> >> configured according to the board layout.
> >>
> >> Reviewed-by: Andrew Lunn
> >> Sig
wt., 12 maj 2020 o 16:41 Michael Walle napisał(a):
>
> >> +
> >> +MODULE_AUTHOR("Michael Walle ");
> >> +MODULE_DESCRIPTION("GPIO generic regmap driver core");
> >> +MODULE_LICENSE("GPL");
> >> diff --git a/include/linux/gpio-regmap.h b/include/linux/gpio-regmap.h
> >> new file mode 100644
> >> in
On Tue, May 19, 2020 at 3:39 AM Bjorn Andersson
wrote:
> @Linus, we started off with something similar for GPIOs and ended up
> with the logic in the core code. Should we somehow try to do the same
> for pinctrl?
msm_pingroup_is_valid() looks very reusable but I'm afraid I do not
understand the
On Thu, May 21, 2020 at 8:38 AM Sumeet Pawnikar
wrote:
>
> Remove unused PLATFORM_POWER_LIMIT MSR local definition from file
> intel_rapl_common.c. This was missed while splitting old RAPL code
> intel_rapl.c file into two new files intel_rapl_msr.c and
> intel_rapl_common.c as per the commit 3382
> -Original Message-
> From: Ard Biesheuvel
> Sent: Monday, May 25, 2020 9:46 AM
> To: Nicolas TOROMANOFF
> Subject: Re: [PATCH 5/5] crypto: stm32/crc: protect from concurrent accesses
>
> On Mon, 25 May 2020 at 09:24, Nicolas TOROMANOFF
> wrote:
> >
> > Hello,
> >
> > > -Original M
On Tue, May 19, 2020 at 10:57 AM Johan Hovold wrote:
> > On Wed, Apr 29, 2020 at 02:12:24PM +0200, Linus Walleij wrote:
> > > to something that is device-unique, like "xr-gpios-"
> > > which makes it easy to locate the GPIOs on a specific serial converter
> > > for lab use. However the USB serial
When clk_set_parent() returns an error code, a pairing
runtime PM usage counter increment is needed to keep the
counter balanced.
Signed-off-by: Dinghao Liu
---
Changelog:
v2: - Fix this in a cleaner way.
---
sound/soc/ti/omap-mcbsp.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-
On Wed, May 20, 2020 at 09:52:21PM +0300, Maxim Levitsky wrote:
> On my machine, a kexec with this driver loaded in the old kernel
> causes a very long delay on boot in the kexec'ed kernel,
> most likely due to unclean shutdown prior to that.
>
> Unloading thunderbolt driver prior to kexec allows
On Mon, May 18, 2020 at 10:50 PM Lars Povlsen
wrote:
> Linus Walleij writes:
>
> > On Wed, May 13, 2020 at 4:11 PM Lars Povlsen
> > wrote:
> >
> >> This adds DT bindings for the Microsemi SGPIO controller, bindings
> >> mscc,ocelot-sgpio and mscc,luton-sgpio.
> >>
> >> Reviewed-by: Alexandre Bel
On Fri, 22 May 2020 at 11:29, 彭浩(Richard) wrote:
>
> The data structure member “rpmb->md” was passed to a call of
> the function “mmc_blk_put” after a call of the function “put_device”.
> Reorder these function calls to keep the data accesses consistent.
>
> Fixes: 1c87f7357849 ("mmc: block: Fi
On Fri, 22 May 2020 at 11:33, Sarthak Garg wrote:
>
> Changes since V1:
> -Splitting documentation change into two patches to
> avoid confusion
> -For the rest of patches retaining Andrians Ack.
>
> Sarthak Garg (7):
> dt-bindings: mmc: Add new compatible string f
On Thu, May 21, 2020 at 8:52 PM Gustavo A. R. Silva
wrote:
> The current codebase makes use of the zero-length array language
> extension to the C90 standard, but the preferred mechanism to declare
> variable-length types such as these ones is a flexible array member[1][2],
> introduced in C99:
>
>
>
> On 25/05/2020 10.22, Dinghao Liu wrote:
> > When clk_set_parent() returns an error code, a pairing
> > runtime PM usage counter increment is needed to keep the
> > counter balanced.
> >
> > Signed-off-by: Dinghao Liu
> > ---
> > sound/soc/ti/omap-mcbsp.c | 1 +
> > 1 file changed, 1 ins
On Sat, May 23, 2020 at 1:15 AM Shuah Khan wrote:
>
> Hi Rafael,
>
> Please pull the following cpupower update for Linux 5.8-rc1.
>
> This cpupower update for Linux 5.8-rc1 consists of a single
> patch to fix coccicheck unneeded semicolon warning.
>
> diff is attached.
Pulled, thanks!
On Wed, 20 May 2020 at 22:09, Sowjanya Komatineni
wrote:
>
> When auto calibration timeouts, calibration is disabled and fail-safe
> drive strength values are programmed based on the signal voltage.
>
> Different fail-safe drive strength values based on voltage are
> applicable only for SoCs suppo
On Fri, 22 May 2020 at 14:14, Thierry Reding wrote:
>
> On Wed, May 20, 2020 at 09:09:33AM -0700, Sowjanya Komatineni wrote:
> >
> > On 5/20/20 4:26 AM, Ulf Hansson wrote:
> > > On Wed, 20 May 2020 at 04:00, Dmitry Osipenko wrote:
> > > > 19.05.2020 23:44, Sowjanya Komatineni пишет:
> > > > > On
On 14.05.20 17:57, Martin Kepplinger wrote:
> From: "Angus Ainslie (Purism)"
>
> Add a devicetree description for the Librem 5 phone. The early batches
> that have been sold are supported as well as the mass-produced device
> available later this year, see https://puri.sm/products/librem-5/
>
>
On Fri, 2020-05-15 at 13:46 -0300, Ramon Fontes wrote:
> Signed-off-by: Ramon Fontes
> ---
> drivers/net/wireless/mac80211_hwsim.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/net/wireless/mac80211_hwsim.c
> b/drivers/net/wireless/mac80211_hwsim.c
> index 0528d4cb4..67f97ac3
On Wed, May 20, 2020 at 8:58 AM Jason Wang wrote:
> The ptr is a pointer to userspace memory. So we need annotate it with
> __user otherwise we may get sparse warnings like:
>
> drivers/vhost/vhost.c:1603:13: sparse: sparse: incorrect type in initializer
> (different address spaces) @@expecte
On Mon, May 25, 2020 at 10:18:16AM +0200, Nicolas Ferre wrote:
> On 07/05/2020 at 12:03, Nicolas Ferre wrote:
> > On 06/05/2020 at 22:18, Jakub Kicinski wrote:
> > > EXTERNAL EMAIL: Do not click links or open attachments unless you know
> > > the content is safe
> > >
> > > On Wed, 6 May 2020 13:
On Wed, May 20, 2020 at 6:41 AM Finn Thain wrote:
> On a Quadra 900/950, the ISM IOP IRQ output pin is connected to an
> edge-triggered input on VIA2. It is theoretically possible that this
> signal could fail to produce the expected VIA2 interrupt.
>
> The two IOP interrupt flags can be asserted
API __get_user_pages_fast() renamed to get_user_pages_fast_only()
to align with pin_user_pages_fast_only().
As part of this we will get rid of write parameter.
Instead caller will pass FOLL_WRITE to get_user_pages_fast_only().
This will not change any existing functionality of the API.
All the ca
On Mon, May 18, 2020 at 3:37 PM Jonathan Albrieux
wrote:
> + reset-gpio:
> +description: an optional pin needed for AK09911 to set the reset state
This kind of properties should always be plural, so
reset-gpios please.
Yours,
Linus Walleij
On Mon, May 25, 2020 at 11:31:23AM +0800, YuanJunQing wrote:
> Register "a1" is unsaved in this function,
> when CONFIG_TRACE_IRQFLAGS is enabled,
> the TRACE_IRQS_OFF macro will call trace_hardirqs_off(),
> and this may change register "a1".
> The variment of register "a1" may send SIGFPE sig
On Sun 2020-05-24 23:50:34, Tetsuo Handa wrote:
> syzbot found a NULL pointer dereference bug inside mptcp_recvmsg() due to
> ssock == NULL, but this bug manifested inside selinux_socket_recvmsg()
> because pr_debug() was no-op [1].
>
> pr_debug("fallback-read subflow=%p",
>mptcp_sub
On Wed, May 20, 2020 at 6:41 AM Finn Thain wrote:
> This code path was tested on a Quadra 950 a long time ago and the
> comment isn't needed.
>
> Cc: Joshua Thompson
> Signed-off-by: Finn Thain
Reviewed-by: Geert Uytterhoeven
i.e. will queue in the m68k for-v5.8 branch.
Gr{oetje,eeting}s,
On Wed, May 13, 2020 at 04:16:04PM +0200, Nicolas Ferre wrote:
> Russell,
>
> Thanks for the feedback.
>
> On 13/05/2020 at 15:05, Russell King - ARM Linux admin wrote:
> > On Wed, May 06, 2020 at 01:37:39PM +0200, nicolas.fe...@microchip.com wrote:
> > > From: Nicolas Ferre
> > >
> > > Keep pr
On Wed, May 20, 2020 at 6:41 AM Finn Thain wrote:
> There is no VIA2 chip on the Mac IIfx, so don't call via_flush_cache().
> This avoids a boot crash which appeared in v5.4.
[...]
> Thanks to Stan Johnson for capturing the console log and running git
> bisect.
>
> Git bisect said commit 8e3a68f
On (20/05/25 00:32), Tetsuo Handa wrote:
> pr_cont_once() does not make sense; at least emitting module name using
> pr_fmt() into middle of a line (after e.g. pr_info_once()) does not make
> sense. Let's remove unused pr_cont_once().
>
> Signed-off-by: Tetsuo Handa
> Cc: Joe Perches
Acked-by:
On 21/05/2020 11.46, Dinghao Liu wrote:
> pm_runtime_get_sync() increments the runtime PM usage counter even
> when it returns an error code. Thus a pairing decrement is needed on
> the error handling path to keep the counter balanced.
Thank you for the patch!
Acked-by: Peter Ujfalusi
> Signe
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