On 30-06-20, 12:18, Pierre-Louis Bossart wrote:
> > > + return 0;
> > > + }
> > > +
> > > + shim = sdw->link_res->shim;
> > > + wake_sts = intel_readw(shim, SDW_SHIM_WAKESTS);
> > > +
> > > + if (!(wake_sts & BIT(sdw->instance)))
> > > + return 0;
> > > +
> > > + /* disable WAKEEN
On Wed 01-07-20 05:12:03, Matthew Wilcox wrote:
> On Tue, Jun 30, 2020 at 08:34:36AM +0200, Michal Hocko wrote:
> > On Mon 29-06-20 22:28:30, Matthew Wilcox wrote:
> > [...]
> > > The documentation is hard to add a new case to, so I rewrote it. What
> > > do you think? (Obviously I'll split this
Hi Rob,
Thank you for the patch.
On Tue, Jun 30, 2020 at 02:02:16PM -0600, Rob Herring wrote:
> Convert the analog TV, DVI, HDMI, and VGA connector bindings to DT schema
> format.
>
> Cc: Sam Ravnborg
> Cc: Laurent Pinchart
> Cc: Maxime Ripard
> Signed-off-by: Rob Herring
Reviewed-by:
On Wed, 1 Jul 2020 at 03:34, Stephen Rothwell wrote:
>
> Hi all,
>
> Today's linux-next merge of the rcu tree got a conflict in:
>
> kernel/kcsan/Makefile
>
> between commit:
>
> f7c28e224da6 ("kbuild: remove cc-option test of -fno-stack-protector")
Is it possible that this patch drops the
On 30/06/2020 23:23, Guenter Roeck wrote:
On Thu, Jun 25, 2020 at 08:04:50PM +0300, Tero Kristo wrote:
On 25/06/2020 16:35, Guenter Roeck wrote:
On 6/25/20 1:32 AM, Tero Kristo wrote:
On 24/06/2020 18:24, Jan Kiszka wrote:
On 24.06.20 13:45, Tero Kristo wrote:
If the RTI watchdog has been
On 01/07/2020 04:39, Neal Liu wrote:
> On Mon, 2020-06-29 at 17:17 +0200, Rafael J. Wysocki wrote:
>> On Monday, June 29, 2020 11:05:40 AM CEST Neal Liu wrote:
>>> Control Flow Integrity(CFI) is a security mechanism that disallows
>>> changes to the original control flow graph of a compiled
On Wed, 24 Jun 2020 at 23:14, Vaibhav Gupta wrote:
>
> With the support of generic PM callbacks, drivers no longer need to use
> legacy .suspend() and .resume() in which they had to maintain PCI states
> changes and device's power state themselves. The required operations are
> done by PCI core.
Hi all,
Changes since 20200630:
My fixes tree contains:
dbf24e30ce2e ("device_cgroup: Fix RCU list debugging warning")
b236d81d9e4f ("powerpc/boot/dts: Fix dtc "pciex" warnings")
The tip tree still had one build failure for which I reverted a commit.
The rcu
Hi Dmitry,
Thank you for the patch.
On Wed, Jul 01, 2020 at 05:16:16AM +0300, Dmitry Osipenko wrote:
> In some case, like a DRM display code for example, it's useful to silently
> check whether port node exists at all in a device-tree before proceeding
> with parsing of the graph.
>
> This
On 30-06-20, 11:46, Pierre-Louis Bossart wrote:
> > Is this called from irq context or irq thread or something else?
>
> from IRQ thread, hence the name, see pointers above.
>
> The key part is that we could only make the hardware work as intended by
> using a single thread for all interrupt
On Tue, 30 Jun 2020, Yang Shi wrote:
> > > From: Dave Hansen
> > >
> > > If a memory node has a preferred migration path to demote cold pages,
> > > attempt to move those inactive pages to that migration node before
> > > reclaiming. This will better utilize available memory, provide a faster
>
On 30-06-20, 11:58, Pierre-Louis Bossart wrote:
> > > +int sdw_startup_stream(void *sdw_substream)
> >
> > Can we have kernel doc style Documentation for exported APIs?
>
> yes, that's a miss indeed.
>
> Though if we follow the existing examples it's not going to be very
> informative, e.g.
On Tue, 2020-06-30 at 14:04 -0600, Jonathan Corbet wrote:
> On Tue, 30 Jun 2020 13:09:17 -0500
> Bjorn Helgaas wrote:
>
> > PCI: Replace lkml.org, spinics, gmane with lore.kernel.org
> >
> > The lkml.org, spinics.net, and gmane.org archives are not very reliable
> > and, in some cases, not even
On Tue, Jun 30, 2020 at 11:49:50AM -0700, t...@redhat.com wrote:
> From: Tom Rix
>
> Create some top level configs the map to dfl pci cards.
>
> Autoselect the parts of fpga that are needed to run these cards
> as well as the defining the other subsystem dependencies.
>
> Signed-off-by: Tom
arm64_feature_bits for a register in arm64_ftr_regs[] are in a descending
order as per their shift values. Validate that these features bits are
defined correctly and do not overlap with each other. This check protects
against any inadvertent erroneous changes to the register definitions.
Cc:
If a system has two GPIO controlled LED, one for mute and another one
for micmute, and both of them are on before system suspend, sometimes
one of them won't be turned off by system suspend.
The codec doesn't seem to be able to control multiple GPIO LEDs at the
same time, so introduce a new mutex
Hi, Arnd
> Subject: Re: [PATCH V3 02/10] init.h: Fix the __setup_param() macro for
> module build
>
> On Mon, Jun 29, 2020 at 1:40 PM Anson Huang
> wrote:
> > > Subject: Re: [PATCH V3 02/10] init.h: Fix the __setup_param() macro
> > > for module build
> > >
> > > On Mon, Jun 29, 2020 at 8:06
On Tue, Jun 30, 2020 at 11:49:50AM -0700, t...@redhat.com wrote:
> From: Tom Rix
>
> Create some top level configs the map to dfl pci cards.
>
> Autoselect the parts of fpga that are needed to run these cards
> as well as the defining the other subsystem dependencies.
>
> Signed-off-by: Tom
The mm-of-the-moment snapshot 2020-06-30-21-52 has been uploaded to
http://www.ozlabs.org/~akpm/mmotm/
mmotm-readme.txt says
README for mm-of-the-moment:
http://www.ozlabs.org/~akpm/mmotm/
This is a snapshot of my -mm patch queue. Uploaded at random hopefully
more than once a week.
You
On 01-07-20, 12:20, Xin Hao wrote:
> The 'caps' variable has been defined, so there is no need to get
> 'highest_perf' value through 'cpu->caps.highest_perf', you can use
> 'caps->highest_perf' instead.
>
> Signed-off-by: Xin Hao
> ---
> drivers/cpufreq/cppc_cpufreq.c | 4 ++--
> 1 file
On 6/30/2020 9:37 PM, Mark Tomlinson wrote:
> On Tue, 2020-06-30 at 20:14 -0700, Florian Fainelli wrote:
>> Sorry, it looks like I made a mistake in my testing (or I was lucky),
>>> and this patch doesn't fix the issue. What is happening is:
>>> 1) nsp-pinmux driver is registered
Currently 'hugetlb_cma=' command line argument does not create CMA area on
ARM64_16K_PAGES and ARM64_64K_PAGES based platforms. Instead, it just ends
up with the following warning message. Reason being, hugetlb_cma_reserve()
never gets called for these huge page sizes.
[ 64.255669] hugetlb_cma:
On Tue 30 Jun 00:43 PDT 2020, Arnaud POULIQUEN wrote:
>
>
> On 6/30/20 7:38 AM, Siddharth Gupta wrote:
> >
> > On 6/17/2020 1:44 AM, Arnaud POULIQUEN wrote:
> >>
> >> On 6/16/20 9:56 PM, risha...@codeaurora.org wrote:
> >>> On 2020-04-30 01:30, Arnaud POULIQUEN wrote:
> Hi Rishabh,
>
This implies something is trying to use one of the old
DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK format modifiers with DRM-KMS without
first checking whether it is supported by the kernel. I had tried to
force an Xorg+Mesa stack without my userspace patches to hit this error
when testing, but must
On Tue, 2020-06-30 at 20:14 -0700, Florian Fainelli wrote:
> Sorry, it looks like I made a mistake in my testing (or I was lucky),
> > and this patch doesn't fix the issue. What is happening is:
> > 1) nsp-pinmux driver is registered (arch_initcall).
> > 2) nsp-gpio-a driver is registered
On Tue, Jun 30, 2020 at 04:42:11PM -0700, Daniel Winkler wrote:
> This reverts commit 0eeaf62981ecc79e8395ca8caa1570eaf3a12257.
That is not an upstream commit. You probably mean:
commit 7b668c064ec33f3d687c3a413d05e355172e6c92
Author: Serge Semin
Date: Thu May 7 02:31:32 2020
The a6xx GMU can vote for ddr and cnoc bandwidth, but it needs to be able
to query the interconnect driver for bcm addresses and commands.
I'm not sure what is the best way to go about implementing this, this is
what I came up with.
I included a quick example of how this can be used by the a6xx
On 07/01, Chao Yu wrote:
> Jaegeuk, could you please help to change __allocate_new_segment() to static
> in your tree?
Sure. :)
>
> On 2020/6/30 4:19, Jaegeuk Kim wrote:
> > On 06/22, Chao Yu wrote:
> >> to two independent functions:
> >> - f2fs_allocate_new_segment() for specified type segment
The 'caps' variable has been defined, so there is no need to get
'highest_perf' value through 'cpu->caps.highest_perf', you can use
'caps->highest_perf' instead.
Signed-off-by: Xin Hao
---
drivers/cpufreq/cppc_cpufreq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
On 6/30/20 6:33 PM, Sebastian Reichel wrote:
Hi,
On Tue, Jun 30, 2020 at 04:54:26PM -0500, Ricardo Rivera-Matos wrote:
Introduce the bq2515x family of chargers.
The BQ2515X family of devices are highly integrated battery management
ICs that integrate the most common functions for wearable
On Wed, Jul 1, 2020 at 6:48 AM Alan Kao wrote:
>
> On Mon, Jun 29, 2020 at 11:19:09AM +0800, Zong Li wrote:
> > This patch set adds raw event support on RISC-V. In addition, we
> > introduce the DT mechanism to make our perf more generic and common.
> >
> > Currently, we set the hardware events
Yes, it's correct.
2020년 7월 1일 (수) 오후 12:35, Chao Yu 님이 작성:
>
> On 2020/6/30 8:54, Daeho Jeong wrote:
> > From: Daeho Jeong
> >
> > Added a new gc_urgent mode, GC_URGENT_LOW, in which mode
> > F2FS will lower the bar of checking idle in order to
> > process outstanding discard commands and GC a
A positive value ENOMEM is returned here. I thinr this is a typo error.
It is necessary to return a negative error value.
Signed-off-by: Tianjia Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 01-07-20, 11:26, Xin Hao wrote:
> The 'caps' variable has been defined, so there is no need to get
> 'highest_perf' value through 'cpu->caps.highest_perf', you can use
> 'caps->highest_perf' instead.
>
> Signed-off-by: Xin Hao
> ---
> drivers/cpufreq/cppc_cpufreq.c | 2 +-
> 1 file
On Tue, Jun 30, 2020 at 08:34:36AM +0200, Michal Hocko wrote:
> On Mon 29-06-20 22:28:30, Matthew Wilcox wrote:
> [...]
> > The documentation is hard to add a new case to, so I rewrote it. What
> > do you think? (Obviously I'll split this out differently for submission;
> > this is just what I
Add ASRC device node.
Signed-off-by: Shengjiu Wang
---
arch/arm/boot/dts/imx6ul.dtsi | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 5379a03391bd..d10d5eb55a88 100644
---
On Tue, Jun 30, 2020 at 08:36:51PM -0700, Eric Dumazet wrote:
>
> If I knew so many people were excited about TCP / MD5, I would have
> posted all my patches on lkml ;)
>
> Without the smp_wmb() we would still need something to prevent KMSAN
> from detecting that we read uninitialized bytes,
> if
On Fri, 2020-06-26 at 17:04 +0900, Alexandre Courbot wrote:
> A default value of 0 means V4L2_FIELD_ANY, which is not correct.
> Reported by v4l2-compliance.
>
Acked-by: Tiffany Lin
> Signed-off-by: Alexandre Courbot
> ---
> drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c | 9 +
>
On Wed, Jul 1, 2020 at 12:42 AM Andy Duan wrote:
> It doesn't break old dtbs, and doesn't break imx6q/dl/solo.
Well, it breaks imx6qp as I said multiple times.
It does not break in your case because you are using NXP U-Boot.
You cannot assume people are using NXP U-Boot.
From: Fabio Estevam Sent: Wednesday, July 1, 2020 11:39 AM
> Hi Andy,
>
> On Wed, Jul 1, 2020 at 12:18 AM Andy Duan wrote:
>
> > --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> > +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> > @@ -202,6 +202,8 @@
> > {
> > pinctrl-names = "default";
Hi Andy,
On Wed, Jul 1, 2020 at 12:18 AM Andy Duan wrote:
> --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> @@ -202,6 +202,8 @@
> {
> pinctrl-names = "default";
> pinctrl-0 = <_enet>;
> + assigned-clocks = <
allmodconfig
powerpc allnoconfig
i386 randconfig-a001-20200630
i386 randconfig-a003-20200630
i386 randconfig-a002-20200630
i386 randconfig-a004-20200630
i386 randconfig-a005-20200630
i386
On Tue, Jun 30, 2020 at 7:59 PM Herbert Xu wrote:
>
> On Tue, Jun 30, 2020 at 07:30:43PM -0700, Eric Dumazet wrote:
> >
> > I made this clear in the changelog, do we want comments all over the places
> > ?
> > Do not get me wrong, we had this bug for years and suddenly this is a
> > big deal...
On 2020/6/30 8:54, Daeho Jeong wrote:
> From: Daeho Jeong
>
> Added a new gc_urgent mode, GC_URGENT_LOW, in which mode
> F2FS will lower the bar of checking idle in order to
> process outstanding discard commands and GC a little bit
> aggressively.
>
> Signed-off-by: Daeho Jeong
> ---
>
On Fri, 2020-06-26 at 17:04 +0900, Alexandre Courbot wrote:
> This control is required by v4l2-compliance for encoders. A value of 1
> should be suitable for all scenarios.
>
Acked-by: Tiffany Lin
> Signed-off-by: Alexandre Courbot
> ---
> drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c |
Currently, the directories of objects are automatically created
only for O= builds.
It should not hurt to cater to this for in-tree builds too.
Signed-off-by: Masahiro Yamada
---
scripts/Makefile.build | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git
On Fri, 2020-06-26 at 17:04 +0900, Alexandre Courbot wrote:
> This reverts commit 81735ecb62f882853a37a8c157407ec4aed44fd0.
>
> The hardware needs data to follow the previous alignment, so this extra
> space was not superfluous after all. Besides, this also made
> v4l2-compliance's G_FMT and
Since commit a85a6c86c25be ("driver core: platform: Clarify that IRQ 0 is
invalid"), the kernel is a bit touchy when it encounters interrupt 0.
As a result, there are lots of warnings such as the following when booting
systems such as 'kzm'.
WARNING: CPU: 0 PID: 1 at drivers/base/platform.c:224
The 'caps' variable has been defined, so there is no need to get
'highest_perf' value through 'cpu->caps.highest_perf', you can use
'caps->highest_perf' instead.
Signed-off-by: Xin Hao
---
drivers/cpufreq/cppc_cpufreq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 6/30/20 3:07 AM, Vitaly Kuznetsov wrote:
Undesired triple fault gets injected to L1 guest on SVM when L2 is
launched with certain CR3 values. It seems the mmu_check_root()
check in fast_pgd_switch() is wrong: first of all we don't know
if 'new_pgd' is a GPA or a nested GPA and, in case it is
On Mon, Jun 29, 2020 at 4:31 PM Anup Patel wrote:
>
> On Mon, Jun 29, 2020 at 12:06 PM Zong Li wrote:
> >
> > On Mon, Jun 29, 2020 at 12:38 PM Anup Patel wrote:
> > >
> > > On Mon, Jun 29, 2020 at 9:58 AM Zong Li wrote:
> > > >
> > > > On Mon, Jun 29, 2020 at 12:09 PM Anup Patel wrote:
> > >
On Tue, Jun 30, 2020 at 11:09:21PM +0200, Pavel Machek wrote:
On Mon 2020-06-29 11:33:02, Sasha Levin wrote:
From: Josef Bacik
[ Upstream commit 6a9fb468f1152d6254f49fee6ac28c3cfa3367e5 ]
extent-tree.c has a find_next_key that just walks up the path to find
the next key, but it is used for
On Fri, 2020-06-26 at 17:04 +0900, Alexandre Courbot wrote:
> From: Yunfei Dong
>
> MT8183's codec firwmare is run by a different remote processor from
> MT8173. While the firmware interface is basically the same, the way to
> invoke it differs. Abstract all firmware calls under a layer that
From: Sven Van Asbroeck Sent: Tuesday, June 30, 2020
11:24 PM
> Andy, Fabio,
>
> On Tue, Jun 30, 2020 at 2:36 AM Andy Duan wrote:
> >
> > Sven, no matter PHY supply 125Mhz clock to pad or not, GPR5[9] is to
> > select RGMII gtx clock source from:
> > - 0 Clock from pad
> > - 1 Clock from PLL
get_dev_cap and set_resources_state functions may return a positive
value because of hardware failure, and the positive return value
can not be passed to ERR_PTR directly.
Fixes: 7dd29ee12865 ("hinic: add sriov feature support")
Signed-off-by: Luo bin
---
On Wed, Jul 1, 2020 at 8:52 AM Alan Kao wrote:
>
> On Mon, Jun 29, 2020 at 11:19:09AM +0800, Zong Li wrote:
> > This patch set adds raw event support on RISC-V. In addition, we
> > introduce the DT mechanism to make our perf more generic and common.
> >
> > Currently, we set the hardware events
On Fri, 2020-06-26 at 17:04 +0900, Alexandre Courbot wrote:
> Different chips have different supported bitrate ranges. Move the list
> of supported formats to the platform data, and split the output and
> capture formats into two lists to make it easier to find the default
> format for each queue.
On 6/30/2020 7:23 PM, Mark Tomlinson wrote:
> On Tue, 2020-06-30 at 15:08 -0700, Ray Jui wrote:
>> May I know which GPIO driver you are referring to on NSP? Both the iProc
>> GPIO driver and the NSP GPIO driver are initialized at the level of
>> 'arch_initcall_sync', which is supposed to be
This sets up bw tables for A640/A650 similar to A618/A630, 0 DDR bandwidth
vote, and the CNOC vote. A640 has the same CNOC addresses as A630 and was
working, but this is required for A650 to work.
Eventually the bw table should be filled by querying the interconnect
driver for each BW in the dts,
On 2020/06/30 18:35, Ignat Korchagin wrote:
[...]
>>> diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c
>>> index 000ddfab5ba0..6924eb49b1df 100644
>>> --- a/drivers/md/dm-crypt.c
>>> +++ b/drivers/md/dm-crypt.c
>>> @@ -69,6 +69,7 @@ struct dm_crypt_io {
>>> u8 *integrity_metadata;
Check for EPROBE_DEFER instead of silently not using icc if the msm driver
probes before the interconnect driver.
Only check for EPROBE_DEFER because of_icc_get can return other errors that
we want to ignore (ENODATA).
Remove the WARN_ON in msm_gpu_cleanup because INIT_LIST_HEAD won't have
been
From: Andrew Jeffery
The default pinmux configuration for Y23 is to route a heartbeat to
drive a LED. Previous revisions of the AST2600 datasheet did not include
a description of this function.
Fixes: 2eda1cdec49f ("pinctrl: aspeed: Add AST2600 pinmux support")
Signed-off-by: Andrew Jeffery
On 6/29/20 8:37 AM, Lai Jiangshan wrote:
> On Mon, Jun 29, 2020 at 8:13 AM Bob Liu wrote:
>>
>> On 6/28/20 11:54 PM, Lai Jiangshan wrote:
>>> On Thu, Jun 11, 2020 at 6:29 PM Bob Liu wrote:
Current code always set 'Unbound && max_active == 1' workqueues to ordered
implicitly, while
On Tue, Jun 30, 2020 at 6:07 PM Jonathan Cameron
wrote:
>
> On Tue, 30 Jun 2020 00:05:52 -0700
> David Gow wrote:
>
> > The Analog Devices AXI ADC driver uses the devm_ioremap_resource
> > function, but does not specify a dependency on IOMEM in Kconfig. This
> > causes a build failure on
From: Andrew Jeffery
We need to iterate over each pin in a group for a function and
disable higher priority mux configurations on the pin before finally
muxing the relevant function's signal. With the current debug output it
is hard to track what register output is relevant to which operation,
On Tue, Jun 30, 2020 at 07:30:43PM -0700, Eric Dumazet wrote:
>
> I made this clear in the changelog, do we want comments all over the places ?
> Do not get me wrong, we had this bug for years and suddenly this is a
> big deal...
I thought you were adding a new pair of smp_rmb/smp_wmb. If they
On 06/30/2020 06:42 PM, maobibo wrote:
>
>
> On 06/30/2020 06:09 PM, Kirill A. Shutemov wrote:
>> On Wed, Jun 24, 2020 at 05:26:30PM +0800, Bibo Mao wrote:
>>> update_mmu_cache_pmd is used to update tlb for the pmd entry by
>>> software. On MIPS system, the tlb entry indexed by page fault
>>>
Signed-off-by: Xin Hao
---
drivers/cpufreq/cppc_cpufreq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
index 257d726a4456..444ee76a6bae 100644
--- a/drivers/cpufreq/cppc_cpufreq.c
+++
On 2020/7/1 0:20, Jakub Kicinski wrote:
> On Tue, 30 Jun 2020 14:35:54 +0800 Luo bin wrote:
>> get_dev_cap and set_resources_state functions may return a positive
>> value because of hardware failure, and the positive return value
>> can not be passed to ERR_PTR directly.
>>
>> Fixes: 7dd29ee12865
On 20-06-30 11:59:49, Philippe Schenker wrote:
> On Tue, 2020-06-30 at 00:43 +, Peter Chen wrote:
> > On 20-06-29 10:04:13, Philippe Schenker wrote:
> > > On Mon, 2020-06-29 at 07:26 +, Peter Chen wrote:
> > > > On 20-06-26 13:03:11, Philippe Schenker wrote:
> > > > > If the hardware is in
Hi Kevin,
On 6/30/20 2:19 PM, Tian, Kevin wrote:
From: Lu Baolu
Sent: Sunday, June 28, 2020 8:34 AM
After a page request is handled, software must response the device which
raised the page request with the handling result. This is done through
the iommu ops.page_response if the request was
On Mon, 29 Jun 2020 16:37:37 -0700 Dave Hansen wrote:
> On 6/29/20 4:30 PM, Baoquan He wrote:
> >> The only way I can plausibly think of "cleaning up" the RECLAIM_ZONE bit
> >> would be to raise our confidence that it is truly unused. That takes
> >> time, and probably a warning if we see it
Ping for comments.
On 5/9/2020 7:05 PM, Xiaoyao Li wrote:
This series aims to add the virtualization of split lock detection in
KVM.
Due to the fact that split lock detection is tightly coupled with CPU
model and CPU model is configurable by host VMM, we elect to use
paravirt method to expose
Hi, list
My x86 machine(linux4.19) sometimes hangs, suddenly not responding in
any way to the mouse or the keyboard.
How can I investigate why it hung up? Is there extra information I can
find for a clue? Is there anything less drastic than power-off to get
some kind of action, if only some
Tue, Jun 30, 2020 at 06:02:43PM -0700, Atish Patra wrote:
> On Tue, Jun 30, 2020 at 5:52 PM Alan Kao wrote:
> >
> > On Mon, Jun 29, 2020 at 11:19:09AM +0800, Zong Li wrote:
> > > This patch set adds raw event support on RISC-V. In addition, we
> > > introduce the DT mechanism to make our perf
On Mon, 2020-06-29 at 17:17 +0200, Rafael J. Wysocki wrote:
> On Monday, June 29, 2020 11:05:40 AM CEST Neal Liu wrote:
> > Control Flow Integrity(CFI) is a security mechanism that disallows
> > changes to the original control flow graph of a compiled binary,
> > making it significantly harder to
On Tue, 2020-06-30 at 19:30 -0700, Eric Dumazet wrote:
> On Tue, Jun 30, 2020 at 7:23 PM Herbert Xu
> wrote:
> > On Tue, Jun 30, 2020 at 07:17:46PM -0700, Eric Dumazet wrote:
> > > The main issue of the prior code was the double read of key->keylen in
> > > tcp_md5_hash_key(), not that few bytes
Ping friendly.
If there is room for improvement, please let me know.
On 2020/6/23 21:13, Like Xu wrote:
On 2020/6/13 16:09, Like Xu wrote:
Hi all,
Please help review this new version for the Kenrel 5.9 release.
Now, you may apply the last two qemu-devel patches to the upstream
qemu and try
In the current setattr implementation in 9p, fid is always retrieved
from dentry no matter file instance exists or not. There may be
some info related to opened file instance dropped. so it's better
to retrieve fid from file instance if file instance is passed to setattr.
for example:
On Mon, 29 Jun 2020 14:09:38 +0200 Pavel Machek wrote:
> > Extend the strings recognised by kstrtobool() to cover:
> >
> > - 1/0
> > - y/n
> > - yes/no (new)
> > - t/f (new)
> > - true/false (new)
> > - on/off
>
> Is it good idea to add more values there? It is easy
On Tue, Jun 30, 2020 at 02:52:35PM +0200, David Hildenbrand wrote:
>On 30.06.20 04:14, Wei Yang wrote:
>> There are two code path which invoke __populate_section_memmap()
>>
>> * sparse_init_nid()
>> * sparse_add_section()
>>
>> For both case, we are sure the memory range is sub-section
Ping...
On 2020/6/20 14:21, Jia Yang wrote:
> I got a use-after-free report when doing some fuzz test:
>
> If ttm_bo_init() fails, the "gbo" and "gbo->bo.base" will be
> freed by ttm_buffer_object_destroy() in ttm_bo_init(). But
> then drm_gem_vram_create() and drm_gem_vram_init() will free
>
Hi Kevin,
Thanks a lot for reviewing my patches.
On 6/30/20 2:01 PM, Tian, Kevin wrote:
From: Lu Baolu
Sent: Sunday, June 28, 2020 8:34 AM
A pasid might be bound to a page table from a VM guest via the iommu
ops.sva_bind_gpasid. In this case, when a DMA page fault is detected
on the physical
On Tue, Jun 30, 2020 at 7:23 PM Herbert Xu wrote:
>
> On Tue, Jun 30, 2020 at 07:17:46PM -0700, Eric Dumazet wrote:
> >
> > The main issue of the prior code was the double read of key->keylen in
> > tcp_md5_hash_key(), not that few bytes could change under us.
> >
> > I used smp_rmb() to ease
If f2fs_grab_cache_page() fails, it needs to return -ENOMEM.
Signed-off-by: Chao Yu
---
fs/f2fs/gc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/fs/f2fs/gc.c b/fs/f2fs/gc.c
index 3b718da69910..11b4adde9baf 100644
--- a/fs/f2fs/gc.c
+++ b/fs/f2fs/gc.c
@@ -849,8 +849,10
On Tue, Jun 30, 2020 at 10:57:32AM +0200, Peter Zijlstra wrote:
> On Tue, Jun 30, 2020 at 09:55:33AM +1000, Dave Chinner wrote:
> > Sure, but that misses the point I was making.
> >
> > I regularly have to look deep into other subsystems to work out what
> > problem the filesystem is tripping
On 6/30/20 5:10 PM, Hao Luo wrote:
Ok, with the help of my colleague Ian Rogers, I think we solved the
mystery. Clang actually inlined hrtimer_nanosleep() inside
SyS_nanosleep(), so there is no call to that function throughout the
path of the nanosleep syscall. I've been looking at the
On Tue, Jun 30, 2020 at 07:09:31PM -0700, Andrew Morton wrote:
> On Tue, 30 Jun 2020 12:08:25 -0700 Roman Gushchin wrote:
>
> > On Sun, Jun 28, 2020 at 07:43:45PM +1200, Barry Song wrote:
> > > Calling cma_declare_contiguous_nid() with false exact_nid for per-numa
> > > reservation can easily
Newer Tegra device-trees will specify a video output graph which involves
a bridge. This patch adds initial support for the DRM bridges to the Tegra
DRM output.
Acked-by: Sam Ravnborg
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/drm.h| 2 ++
drivers/gpu/drm/tegra/output.c | 12
allmodconfig
powerpc defconfig
powerpc rhel-kconfig
powerpc allmodconfig
powerpc allnoconfig
i386 randconfig-a001-20200630
i386 randconfig-a003-20200630
Currently Tegra DRM driver manually manages display panel, but this
management could be moved out into DRM core if we'll wrap panel into
DRM bridge. This patch wraps RGB panel into a DRM bridge and removes
manual handling of the panel from the RGB output code.
Suggested-by: Laurent Pinchart
The OF node should be put before returning error in tegra_output_probe(),
otherwise node's refcount will be leaked.
Reviewed-by: Laurent Pinchart
Reviewed-by: Sam Ravnborg
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/output.c | 9 -
1 file changed, 4 insertions(+), 5
Newer Tegra device-trees will specify a video output graph, which involves
LVDS encoder bridge. This patch adds support for the LVDS encoder bridge
to the RGB output, allowing us to model the display hardware properly.
Reviewed-by: Laurent Pinchart
Acked-by: Sam Ravnborg
Signed-off-by: Dmitry
On Tue, 2020-06-30 at 15:08 -0700, Ray Jui wrote:
> May I know which GPIO driver you are referring to on NSP? Both the iProc
> GPIO driver and the NSP GPIO driver are initialized at the level of
> 'arch_initcall_sync', which is supposed to be after 'arch_initcall' used
> here in the pinmux driver
Hello,
This series adds initial support for the DRM bridges to NVIDIA Tegra DRM
driver. This is required by newer device-trees where we model the LVDS
encoder bridge properly.
Changelog:
v9: - Dropped the of-graph/drm-of patches from this series because they
are now factored out into a
In the function s3c_init_intc_of(), system resource "reg_base", "domain"
and "intc" were not released in a few error cases. Thus add jump targets
for the completion of the desired exception handling.
Fixes: f0774d41da0e ("irqchip: s3c24xx: add devicetree support")
Signed-off-by: Tiezhu Yang
---
On Tue, Jun 30, 2020 at 07:17:46PM -0700, Eric Dumazet wrote:
>
> The main issue of the prior code was the double read of key->keylen in
> tcp_md5_hash_key(), not that few bytes could change under us.
>
> I used smp_rmb() to ease backports, since old kernels had no
> READ_ONCE()/WRITE_ONCE(), but
In the function csky_mpintc_init(), system resources "__trigger",
"INTCG_base" and "root_domain" were not released in a few error
cases. Thus add jump targets for the completion of the desired
exception handling. By the way, do some coding-style cleanups
suggested by Markus.
Fixes: d8a5f5f79122
In the function ck_intc_init_comm(), system resources "reg_base" and
"root_domain" were not released in a few error cases. Thus add jump
targets for the completion of the desired exception handling.
Fixes: edff1b4835b7 ("irqchip: add C-SKY APB bus interrupt controller")
Signed-off-by: Tiezhu Yang
Hi Marc,
On 2020/06/30 22:23, Marc Zyngier wrote:
On 2020-06-29 10:49, Kunihiko Hayashi wrote:
Hi Marc,
On 2020/06/27 18:48, Marc Zyngier wrote:
On Thu, 18 Jun 2020 09:38:09 +0100,
Kunihiko Hayashi wrote:
The misc interrupts consisting of PME, AER, and Link event, is handled
by INTx
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