From: Brijesh Singh
The ioctl can be used to set page encryption bitmap for an
incoming guest.
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: "H. Peter Anvin"
Cc: Paolo Bonzini
Cc: "Radim Krčmář"
Cc: Joerg Roedel
Cc: Borislav Petkov
Cc: Tom Lendacky
Cc: x...@kernel.org
Cc: k...@vger.kernel.org
From: Brijesh Singh
The ioctl can be used to retrieve page encryption bitmap for a given
gfn range.
Return the correct bitmap as per the number of pages being requested
by the user. Ensure that we only copy bmap->num_pages bytes in the
userspace buffer, if bmap->num_pages is not byte aligned we
Andrey Zhizhikin writes:
> Commit 7ecdea4a0226 ("backlight: generic_bl: Remove this driver as it is
> unused") removed geenric_bl driver from the tree, together with
> corresponding config option.
>
> Remove BACKLIGHT_GENERIC config item from generic-64bit_defconfig.
From: Brijesh Singh
This hypercall is used by the SEV guest to notify a change in the page
encryption status to the hypervisor. The hypercall should be invoked
only when the encryption attribute is changed from encrypted -> decrypted
and vice versa. By default all guest pages are considered
From: Brijesh Singh
KVM hypercall framework relies on alternative framework to patch the
VMCALL -> VMMCALL on AMD platform. If a hypercall is made before
apply_alternative() is called then it defaults to VMCALL. The approach
works fine on non SEV guest. A VMCALL would causes #UD, and hypervisor
From: Ashish Kalra
The series add support for AMD SEV page encryption bitmap.
SEV guest VMs have the concept of private and shared memory. Private memory
is encrypted with the guest-specific key, while shared memory may be encrypted
with hypervisor key. The patch series introduces a new
On Sat, 28 Nov 2020, Wu, Hao wrote:
Subject: [PATCH v3 2/2] fpga: dfl: look for vendor specific capability
Maybe we can change the title a little bit, what about
fpga: dfl-pci: locate DFLs by PCIe vendor specific capability
From: Matthew Gerlach
A DFL may not begin at offset 0 of BAR
Define a new rmnet_map_v5_csum_header structure type. It will be
used for inline checksum offload, supported with version 5 of the
QMAP protocol.
Signed-off-by: Alex Elder
---
include/linux/if_rmnet.h | 30 ++
1 file changed, 30 insertions(+)
diff --git
Starting with IPA v4.5, IP payload checksum offload is implemented
differently.
Prior to v4.5, the IPA hardware appends an rmnet_map_dl_csum_trailer
structure to each packet if checksum offload is enabled in the
download direction (modem->AP). In the upload direction (AP->modem)
a
This series includes one changed destined for a central header file
and a second (dependent on the first) that applies to the IPA driver.
If these should be posted a different way, please let me know.
The first patch introduces a new data structure defining the format
of a header that's used for
When building hwmon/pwm-fan the following unused-variable warning shows
up:
/tmp/drivers/hwmon/pwm-fan.c: In function ‘pwm_fan_is_visible’:
/tmp/drivers/hwmon/pwm-fan.c:167:22: warning: unused variable ‘ctx’
[-Wunused-variable]
Remove the unneeded variable declaration 'ctx'.
Fixes:
Dave Hansen writes:
> On 11/25/20 9:32 PM, Huang Ying wrote:
>> --- a/man2/set_mempolicy.2
>> +++ b/man2/set_mempolicy.2
>> @@ -113,6 +113,11 @@ A nonempty
>> .I nodemask
>> specifies node IDs that are relative to the set of
>> node IDs allowed by the process's current cpuset.
>> +.TP
>> +.BR
Stephen Rothwell writes:
> Hi all,
>
> In commit
>
> 9d822ed94237 ("soc: amlogic: canvas: add missing put_device() call in
> meson_canvas_get()")
>
> Fixes tag
>
> Fixes: commit 382f8be04551 ("soc: amlogic: canvas: Fix meson_canvas_get
> when probe failed")
>
> has these problem(s):
>
>
According to the datasheet (Rev. 1.4, page 30) the RTL8211F requires
at least 50ms "for internal circuits settling time" before accessing
the PHY registers. This fixes an issue where the Ethernet link doesn't
come up when using ip link set down/up:
[ 29.360965] meson8b-dwmac ff3f.ethernet
On Mon, Nov 30, 2020 at 07:54:37PM +, Kelley, Sean V wrote:
> > On Nov 24, 2020, at 9:17 AM, Bjorn Helgaas wrote:
> > On Mon, Nov 23, 2020 at 11:57:35PM +, Kelley, Sean V wrote:
> >>> On Nov 23, 2020, at 3:28 PM, Bjorn Helgaas wrote:
> >>> On Fri, Nov 20, 2020 at 04:10:31PM -0800, Sean V
On Tue, Nov 17, 2020 at 06:20:02PM -0500, Joel Fernandes (Google) wrote:
> Tested-by: Julien Desfossez
> Not-Signed-off-by: Peter Zijlstra (Intel)
> ---
May be put it under a #ifdef CONFIG_SCHED_CORE_DEBUG, even then please
make it more driven by selection via tracing rather than just
On Sun, Nov 29, 2020 at 08:17:38AM -0500, Mimi Zohar wrote:
Hi Sasha,
On Wed, 2020-07-08 at 21:27 -0400, Sasha Levin wrote:
On Wed, Jul 08, 2020 at 12:13:13PM -0400, Mimi Zohar wrote:
>Hi Sasha,
>
>On Wed, 2020-07-08 at 11:40 -0400, Sasha Levin wrote:
>> From: Maurizio Drocco
>>
>> [ Upstream
On 11/30/20 6:32 PM, Halil Pasic wrote:
On Mon, 30 Nov 2020 14:36:10 -0500
Tony Krowiak wrote:
On 11/28/20 8:52 PM, Halil Pasic wrote:
[..]
* Unassign adapter from mdev's matrix:
The domain will be hot unplugged from the KVM guest if it is
assigned to the guest's matrix.
*
On Wed, 18 Nov 2020 16:29:33 +0800, Jianjun Wang wrote:
> Add YAML schemas documentation for Gen3 PCIe controller on
> MediaTek SoCs.
>
> Signed-off-by: Jianjun Wang
> Acked-by: Ryder Lee
> ---
> .../bindings/pci/mediatek-pcie-gen3.yaml | 135 ++
> 1 file changed, 135
On Tue, Nov 17, 2020 at 02:15:54PM -0600, Dan Murphy wrote:
> The DP83TD510 is a 10M single twisted pair Ethernet PHY
>
> Signed-off-by: Dan Murphy
> ---
> .../devicetree/bindings/net/ti,dp83td510.yaml | 64 +++
> 1 file changed, 64 insertions(+)
> create mode 100644
IRQ time entry is currently accounted before HARDIRQ_OFFSET or
SOFTIRQ_OFFSET are incremented. This is convenient to decide to which
index the cputime to account is dispatched.
Unfortunately it prevents tick_irq_enter() from being called under
HARDIRQ_OFFSET because tick_irq_enter() has to be
Please excuse me if this is a wrong group.
Please find the log of a system that I am trying to debug.
It is a "soft lockup" issue and the root cause seems to be coming from
the mm unit of the kernel.
I am relatively new to kernel and arm64 platforms.
How do you typically decipher a locking
Now that account_irq_enter_time() is called after HARDIRQ_OFFSET has
been incremented, there is nothing left that prevents us from also
moving tick_irq_enter() after HARDIRQ_OFFSET is incremented.
The desired outcome is to remove the nasty hack that prevents softirqs
from being raised through
The 3 architectures implementing CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
all have their own version of irq time accounting that dispatch the
cputime to the appropriate index: hardirq, softirq, system, idle,
guest... from an all-in-one function.
Instead of having these ad-hoc versions, move the cputime
account_irq_enter_time() and account_irq_exit_time() are not called
from modules. EXPORT_SYMBOL_GPL() can be safely removed from the IRQ
cputime accounting functions called from there.
Signed-off-by: Frederic Weisbecker
Cc: Peter Zijlstra
Cc: Tony Luck
Cc: Fenghua Yu
Cc: Michael Ellerman
Cc:
In this version, the EXPORT_SYMBOL_GPL() on IRQ time accounting have
been removed since no modules should be calling there.
Link to v1 for reference:
https://lore.kernel.org/lkml/20201125021542.30237-1-frede...@kernel.org/
s390 has its own version of IRQ time accounting because it doesn't
account the idle time the same way the other architectures do. Only
the actual idle sleep time is accounted as idle time, the rest of the
idle task execution is accounted as system time.
However converting it to the consolidated
On Wed, Nov 18, 2020 at 5:13 PM Adam Ford wrote:
>
> On Sat, Nov 7, 2020 at 5:58 AM Adam Ford wrote:
> >
> > The driver exists for the Enhanced Asynchronous Sample Rate Converter
> > (EASRC) Controller, but there isn't a device tree entry for it.
> >
> > On the vendor kernel, they put this on a
On Thu, Nov 26, 2020 at 8:44 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/basics/vector.c:55:6: warning: no
> previous prototype for ‘dal_vector_presized_costruct’ [-Wmissing-prototypes]
>
> Cc: Harry Wentland
> Cc: Leo
On Thu, Nov 26, 2020 at 8:44 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/basics/fixpt31_32.c:29:32: warning:
> ‘dc_fixpt_pi’ defined but not used [-Wunused-const-variable=]
>
> Cc: Harry Wentland
> Cc: Leo Li
> Cc: Alex
Amjad Ouled-Ameur writes:
> Hello Felipe and Kevin,
>
>
> Could you please review this patchset ?
The changes are OK with me. Please update based on Martin's
suggestions and this can be queued up by the USB maintainers.
Kevin
> Thank you in advance.
>
> On 13/11/2020 01:05, Amjad Ouled-Ameur
On Thu, Nov 26, 2020 at 8:44 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/basics/conversion.c:34:10: warning:
> no previous prototype for ‘fixed_point_to_int_frac’ [-Wmissing-prototypes]
>
On Thu, Nov 26, 2020 at 8:44 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:664:20:
> warning: no previous prototype for ‘pp_nv_set_pme_wa_enable’
> [-Wmissing-prototypes]
>
> Cc: Harry Wentland
>
On 30/11/2020 23:21, Laurent Pinchart wrote:
>>> Instead, I propose, that you add this as an option to the tps68470 driver
>>> that figures out whether the ACPI device for the tps68470 device actually
>>> describes something else, in a similar fashion you do with the cio2-bridge
>>> driver. I
On Thu, Nov 26, 2020 at 8:44 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:538:6:
> warning: no previous prototype for ‘pp_rv_set_wm_ranges’
> [-Wmissing-prototypes]
>
On Wed, 18 Nov 2020 10:48:20 +0800, Yejune Deng wrote:
> devm_reset_control_array_get_exclusive() looks more readable
Applied, thanks!
[1/1] soc: amlogic: replace devm_reset_control_array_get()
commit: 978d0dbb98c7ce9a5d6897744ac49ac5ff85831e
Best regards,
--
Kevin Hilman
On Thu, Nov 26, 2020 at 8:44 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_color.c:128:
> warning: Function parameter or member 'lut' not described in
> '__drm_lut_to_dc_gamma'
>
On Tue, Nov 17, 2020 at 02:15:53PM -0600, Dan Murphy wrote:
> Per the 802.3cg spec the 10base T1L can operate at 2 different
> differential voltages 1v p2p and 2.4v p2p. The abiility of the PHY to
1.1V?
> drive that output is dependent on the PHY's on board power supply.
> This common feature is
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> 'dpp_input_csc_matrix' is used by some, but not all source files which
> include dpp.h.
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/inc/hw/dpp.h:50:42: warning:
> ‘dpp_input_csc_matrix’
On Mon, Nov 30, 2020 at 09:29:02PM +0100, Paolo Bonzini wrote:
On 30/11/20 20:44, Mike Christie wrote:
I have never seen a public/open-source vhost-scsi testsuite.
For patch 23 (the one that adds the lun reset support which is built on
patch 22), we can't add it to stable right now if you
On Tue, 17 Nov 2020 14:13:52 +0100, Oleksij Rempel wrote:
> "virtual" is used for vendor-less "devices". For example for the GPIO
> based MDIO bus "virtual,mdio-gpio".
>
> This patch is needed to fix the checkpatch warning for the Protonic WD3 board.
>
> Signed-off-by: Oleksij Rempel
> ---
>
On 1/12/20 12:03 pm, Andrew Lunn wrote:
> On Tue, Dec 01, 2020 at 11:35:07AM +1300, Aryan Srivastava wrote:
>> Add device tree file for x530 board. This has an Armada 385 SoC. Has
>> NAND-flash for user storage and SPI for booting. Covers majority of x530
>> and GS980MX variants.
> Hi Aryan
>
>
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> 'link_bandwidth_kbps' is always obtained, but only used if
> CONFIG_DRM_AMD_DC_DCN is defined.
Probably better to just move this under CONFIG_DRM_AMD_DC_DCN. I'll
send a patch.
Thanks,
Alex
>
> Fixes the following W=1 kernel build
On Mon, Nov 30, 2020 at 07:27:00PM +0100, Robert Marko wrote:
> On Mon, Nov 2, 2020 at 6:19 AM Kathiravan T wrote:
> >
> >
> > On 11/2/2020 10:33 AM, Guenter Roeck wrote:
> > > On 11/1/20 7:58 PM, Kathiravan T wrote:
> > >> On 10/31/2020 7:38 PM, Guenter Roeck wrote:
> > >>> On 10/31/20 5:11 AM,
Thanks Martin. I'll work on a fix for this.
- Russ
On 11/26/20 6:02 AM, Martin Hundebøll wrote:
> Hi Russ,
>
> I found another thing while testing this...
>
> On 06/11/2020 02.09, Russ Weight wrote:
>
>
>
>> +static ssize_t filename_store(struct device *dev, struct device_attribute
>> *attr,
On 11/30/2020 3:14 PM, Bjorn Andersson wrote:
On Mon 30 Nov 16:51 CST 2020, Asutosh Das (asd) wrote:
On 11/30/2020 1:16 AM, Stanley Chu wrote:
UFS specficication allows different VCC configurations for UFS devices,
for example,
(1). 2.70V - 3.60V (By default)
(2). 1.70V -
Hi Andy
On 30/11/2020 18:23, Andy Shevchenko wrote:
> On Mon, Nov 30, 2020 at 01:31:25PM +, Daniel Scally wrote:
>> ACPI devices declare themselves dependent on other devices via the _DEP
>> buffer. Fetching the dependee from dependent is a matter of parsing
>> _DEP, but currently there's no
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_thermal.c:63:
> warning: Cannot understand * @fn vega12_enable_fan_control_feature
>
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_thermal.c:217:
> warning: Function parameter or member 'hwmgr' not described in
> 'vega20_thermal_get_temperature'
>
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu_helper.c:112: warning:
> Function parameter or member 'hwmgr' not described in 'phm_wait_on_register'
>
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_hwmgr.c:4403:5:
> warning: no previous prototype for ‘vega20_hwmgr_init’ [-Wmissing-prototypes]
> 4403 | int
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_hwmgr.c:2862:5:
> warning: no previous prototype for ‘vega12_hwmgr_init’ [-Wmissing-prototypes]
> 2862 | int
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_thermal.c:128:
> warning: Function parameter or member 'hwmgr' not described in
> 'vega10_fan_ctrl_set_static_mode'
>
On Mon, 16 Nov 2020 14:34:31 +, Srinivas Kandagatla wrote:
> Add device tree binding Documentation details for Qualcomm SM8250
> LPASS(Low Power Audio Sub System) LPI(Low Power Island) pinctrl driver.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> .../pinctrl/qcom,lpass-lpi-pinctrl.yaml
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_thermal.c:112:
> warning: Function parameter or member 'hwmgr' not described in
> 'smu7_fan_ctrl_set_static_mode'
>
On Sat, 28 Nov 2020, Wu, Hao wrote:
Subject: [PATCH v3 1/2] fpga: dfl: refactor cci_enumerate_feature_devs()
From: Matthew Gerlach
In preparation of looking for dfls based on a vendor
specific pcie capability, move code that assumes
Bar0/offset0 as start of DFL to its own function.
as
On Mon, Nov 30, 2020 at 3:52 AM Will Deacon wrote:
>
> On Wed, Nov 18, 2020 at 02:07:28PM -0800, Sami Tolvanen wrote:
> > Disable LTO for the vDSO by filtering out CC_FLAGS_LTO, as there's no
> > point in using link-time optimization for the small about of C code.
>
> "about" => "amount" ?
Oops,
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_hwmgr.c:202: warning:
> Function parameter or member 'hwmgr' not described in
> 'smu7_get_mc_microcode_version'
>
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_processpptables.c:1148:5:
> warning: no previous prototype for ‘vega10_pp_tables_initialize’
> [-Wmissing-prototypes]
>
> Cc:
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomctrl.c:104: warning:
> Function parameter or member 'reg_block' not described in
> 'atomctrl_set_mc_reg_address_table'
>
On Tue, Dec 01, 2020 at 11:35:07AM +1300, Aryan Srivastava wrote:
> Add device tree file for x530 board. This has an Armada 385 SoC. Has
> NAND-flash for user storage and SPI for booting. Covers majority of x530
> and GS980MX variants.
Hi Aryan
What exactly does that mean, it covers most
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/process_pptables_v1_0.c:41:
> warning: Function parameter or member 'hwmgr' not described in 'set_hw_cap'
>
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/hardwaremanager.c:232:
> warning: Function parameter or member 'hwmgr' not described in
> 'phm_start_thermal_controller'
>
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/iceland_smumgr.c: In
> function ‘iceland_thermal_setup_fan_table’:
>
Change aggr_time_limit_encoded() to properly calculate the
aggregation time limit to use for IPA v4.5.
Older IPA versions program the AGGR_GRANULARITY field of the
of the COUNTER_CFG register to set the granularity of the
aggregation timer, which we configure to be 500 microseconds.
Instead, IPA
Extend ipa_reg_init_hol_block_timer_val() so it properly calculates
the head-of-line block timeout to use for IPA v4.5.
Introduce hol_block_timer_qtime_val() to compute the value to use
for IPA v4.5, where Qtime is used as the basis of the timer. Call
that function from hol_block_timer_val() for
IPA v4.5 introduces a new unified timer architecture driven on the
19.2 MHz SoC crystal oscillator (XO). It is independent of the IPA
core clock and avoids some duplication.
Lower-resolution time stamps are derived from this by using only the
high-order bits of the 19.2 MHz Qtime clock. And
This series updates some IPA register definitions that change in
substantive ways for IPA v4.5.
One register defines parameters used by an endpoint to aggregate
multiple packets into a buffer. The size and position of most
fields in that register have changed with this new hardware version,
and
IPA v4.5 significantly changes the format of the configuration
register used for endpoint aggregation. The AGGR_BYTE_LIMIT field
is now larger, and the positions of other fields are shifted. This
complicates the way we have to access this register because functions
like u32_encode_bits() require
syzbot reported[1] a use-after-free introduced in 0f818c4bc1f3. The bug
is that an ongoing trace event might race with the tracepoint being
disabled (and therefore the _unreg() callback being called). Consider
this ordering:
T1: trace event fires, get_mm_memcg_path() is called
T1:
> Add a NORDY port flag to suppress raising the modem-control lines on
> open to signal DTE readiness.
>
> This can be used to implement a NORDY termios control flag to complement
> HUPCL, which controls lowering of the modem-control lines on final
> close.
>
> Initially drivers can export the
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomfwctrl.c:78: warning:
> Function parameter or member 'hwmgr' not described in
> 'pp_atomfwctrl_is_voltage_controlled_by_gpio_v4'
>
As discussed a few months ago [1][2], virtually mapped shadow call stacks
are better for safety and robustness. This series dusts off the VMAP
option from the original SCS patch series and switches the kernel to use
virtually mapped shadow stacks unconditionally when SCS is enabled.
[1]
Hi Laurent
On 30/11/2020 16:25, Laurent Pinchart wrote:
> Hi Daniel and Heikki,
>
> Thank you for the patch.
>
> On Mon, Nov 30, 2020 at 01:31:18PM +, Daniel Scally wrote:
>> From: Heikki Krogerus
>>
>> From: Heikki Krogerus
>>
> There seems to be one From: line too many. You can drop the
Use scs_alloc() to allocate also IRQ and SDEI shadow stacks instead of
using statically allocated stacks.
Signed-off-by: Sami Tolvanen
Acked-by: Will Deacon
---
arch/arm64/kernel/Makefile | 1 -
arch/arm64/kernel/entry.S | 6 ++--
arch/arm64/kernel/irq.c| 19 +++
On Mon, 30 Nov 2020 14:36:10 -0500
Tony Krowiak wrote:
>
>
> On 11/28/20 8:52 PM, Halil Pasic wrote:
[..]
> >> * Unassign adapter from mdev's matrix:
> >>
> >>The domain will be hot unplugged from the KVM guest if it is
> >>assigned to the guest's matrix.
> >>
> >> * Assign a control
On Mon, Nov 30 2020 at 19:22, Laurențiu Nicola wrote:
> On Mon, Nov 30, 2020, at 18:56, Thomas Gleixner wrote:
>> > That's right, sorry. It still boots, but it's no longer "quiet",
>> > that's what I meant.
>>
>> Right, but surpressing that is not a solution.
>
> I'm just downgrading it from
From: Ashish Kalra
For all explicitly unecrypted guest memory regions such as S/W IOTLB
bounce buffers, dma_decrypted() allocated regions and for guest regions
marked as "__bss_decrypted", ensure that DBG_DECRYPT API calls are
bypassed for such regions. The guest memory regions encryption status
The kernel currently uses kmem_cache to allocate shadow call stacks,
which means an overflows may not be immediately detected and can
potentially result in another task's shadow stack to be overwritten.
This change switches SCS to use virtually mapped shadow stacks for
tasks, which increases
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_hwmgr.c:5696:5:
> warning: no previous prototype for ‘smu7_init_function_pointers’
> [-Wmissing-prototypes]
> 5696 | int
From: Ashish Kalra
Reset the host's page encryption bitmap related to kernel
specific page encryption status settings before we load a
new kernel by kexec. We cannot reset the complete
page encryption bitmap here as we need to retain the
UEFI/OVMF firmware specific settings.
The host's page
From: Ashish Kalra
Ensure that _bss_decrypted section variables such as hv_clock_boot and
wall_clock are marked as decrypted in the page encryption bitmap if
sev liv migration is supported.
Signed-off-by: Ashish Kalra
---
arch/x86/include/asm/mem_encrypt.h | 4
1. the name is a lie. It gives relative paths, e.g. if I run from the
same dir as the test file, it gives './test_data/'
2. it's only used for generating paths to tools/testing/kunit/test_data/
So we can tersen things by making it less general.
Signed-off-by: Daniel Latypov
---
Use self.assertEqual/assertNotEqual() instead.
Besides being more appropriate in a unit test, it'll also give a better
error message by show the unexpected values.
Also
* Delete redundant check of exception types. self.assertRaises does this.
* s/kall/call. There's no reason to name it this way.
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> In file included from
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomctrl.c:31:
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomctrl.c: In function
>
From: Ashish Kalra
Add support for static allocation of the unified Page encryption bitmap by
extending kvm_arch_commit_memory_region() callack to add svm specific x86_ops
which can read the userspace provided memory region/memslots and calculate
the amount of guest RAM managed by the KVM and
The use of manual open() and .close() calls seems to be an attempt to
keep the contents in scope.
But Python doesn't restrict variables like that, so we can introduce new
variables inside of a `with` and use them outside.
Do so to make the code more Pythonic.
Signed-off-by: Daniel Latypov
---
From: Brijesh Singh
The ioctl can be used to set page encryption bitmap for an
incoming guest.
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: "H. Peter Anvin"
Cc: Paolo Bonzini
Cc: "Radim Krčmář"
Cc: Joerg Roedel
Cc: Borislav Petkov
Cc: Tom Lendacky
Cc: x...@kernel.org
Cc: k...@vger.kernel.org
get_absolute_path() makes an attempt to allow for this.
But that doesn't work as soon as os.chdir() gets called.
So make it so that os.chdir() does nothing to avoid this.
Note: mock.patch.object() doesn't seem to work in setUpModule(), hence
the introduction of a new base class instead.
Fixes:
From: Brijesh Singh
This hypercall is used by the SEV guest to notify a change in the page
encryption status to the hypervisor. The hypercall should be invoked
only when the encryption attribute is changed from encrypted -> decrypted
and vice versa. By default all guest pages are considered
From: Brijesh Singh
Invoke a hypercall when a memory region is changed from encrypted ->
decrypted and vice versa. Hypervisor needs to know the page encryption
status during the guest migration.
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: "H. Peter Anvin"
Cc: Paolo Bonzini
Cc: "Radim Krčmář"
* Stop leaking file objects.
* Use self.addCleanup() to ensure we call cleanup functions even if
setUp() fails.
* use mock.patch.stopall instead of more error-prone manual approach
Signed-off-by: Daniel Latypov
---
tools/testing/kunit/kunit_tool_test.py | 14 ++
1 file changed, 6
Hi Andy,
On Mon, Nov 30, 2020 at 10:07:19PM +0200, Andy Shevchenko wrote:
> On Mon, Nov 30, 2020 at 01:31:29PM +, Daniel Scally wrote:
> > On platforms where ACPI is designed for use with Windows, resources
> > that are intended to be consumed by sensor devices are sometimes in
> > the _CRS
From: Brijesh Singh
KVM hypercall framework relies on alternative framework to patch the
VMCALL -> VMMCALL on AMD platform. If a hypercall is made before
apply_alternative() is called then it defaults to VMCALL. The approach
works fine on non SEV guest. A VMCALL would causes #UD, and hypervisor
From: Brijesh Singh
The ioctl can be used to retrieve page encryption bitmap for a given
gfn range.
Return the correct bitmap as per the number of pages being requested
by the user. Ensure that we only copy bmap->num_pages bytes in the
userspace buffer, if bmap->num_pages is not byte aligned we
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppevvmath.h: In function
> ‘fMultiply’:
> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppevvmath.h:336:22:
> warning: variable
From: Ashish Kalra
The series add support for AMD SEV page encryption bitmap.
SEV guest VMs have the concept of private and shared memory. Private memory
is encrypted with the guest-specific key, while shared memory may be encrypted
with hypervisor key. The patch series introduces a new
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> They are used by some source files which include pp_thermal.h, but not all.
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../pm/inc/pp_thermal.h:28:41: warning:
> ‘SMU7ThermalWithDelayPolicy’ defined but
On Thu, Nov 26, 2020 at 8:43 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> Cc: Evan Quan
> Cc: Alex Deucher
> Cc: "Christian König"
> Cc: David Airlie
> Cc: Daniel Vetter
> Cc: amd-...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org
> Signed-off-by:
When enabling the interrupt code for the tpm_tis driver we have
noticed some systems have a bios issue causing an interrupt storm to
occur. The issue isn't limited to a single tpm or system vendor
so keeping a denylist of systems with the issue isn't optimal. Instead
try to detect the problem
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