>On Wed, Dec 09, 2020 at 03:05:17PM +1000, Pavana Sharma wrote:
> Returning 0 is no more an error case with MV88E6393 family
> which has serdes lane numbers 0, 9 or 10.
> So with this change .serdes_get_lane will return lane number
> or -errno (-ENODEV or -EOPNOTSUPP).
>
> Signed-off-by: Pavana Sh
On Wed, Dec 09, 2020 at 06:51:20PM +0100, Vlastimil Babka wrote:
> On 12/9/20 2:13 AM, paul...@kernel.org wrote:
> > From: "Paul E. McKenney"
> >
> > This commit adds vmalloc() support to mem_dump_obj(). Note that the
> > vmalloc_dump_obj() function combines the checking and dumping, in
> > cont
On Wed, 9 Dec 2020 19:51:05 +0100 Marco Elver wrote:
> > This is no logner the case: in-kernel MTE is never enabled unless the
> > CONFIG_KASAN_HW_TAGS is enabled, so there are no more conflicts with
> > CONFIG_KASAN_SW_TAGS.
> >
> > Allow CONFIG_KASAN_SW_TAGS to be enabled even when CONFIG_ARM64
On Wed, Dec 09, 2020 at 03:04:23PM +1000, Pavana Sharma wrote:
> Add 5GBASE-R phy interface mode
>
> Signed-off-by: Pavana Sharma
> ---
> include/linux/phy.h | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/include/linux/phy.h b/include/linux/phy.h
> index 56563e5e0dc7..8151e6ecf1b
On Fri, Dec 04, 2020 at 11:13:47AM +0530, Vinod Koul wrote:
> Add basic devicetree support for Qualcomm Technologies, Inc SM8350 SoC
> MTP board. This enabled uart node and adds rpmh-regulators present for
> this board.
Please make sure this is warning free with dtbs_check.
>
> Signed-off-by: Vi
On Tue, 8 Dec 2020 10:45:29 +0100 SeongJae Park wrote:
> From: SeongJae Park
>
> In 'fqdir_exit()', a work for destruction of the 'fqdir' is enqueued.
> The work function, 'fqdir_work_fn()', calls 'rcu_barrier()'. In case of
> intensive 'fqdir_exit()' (e.g., frequent 'unshare(CLONE_NEWNET)'
> sy
On Wed, Dec 09, 2020 at 03:03:47PM +1000, Pavana Sharma wrote:
> Add 5gbase-r PHY interface mode.
>
> Signed-off-by: Pavana Sharma
> ---
> Documentation/devicetree/bindings/net/ethernet-controller.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/
> On Dec 9, 2020, at 2:36 PM, Mike Snitzer wrote:
>
> On Wed, Dec 09 2020 at 4:58pm -0500,
> Song Liu wrote:
>
>> This reverts commit f0e90b6c663a7e3b4736cb318c6c7c589f152c28.
>>
>> Matthew Ruffell reported data corruption in raid10 due to the changes
>> in discard handling [1]. Revert the
On Fri, 04 Dec 2020 11:13:44 +0530, Vinod Koul wrote:
> Document the SM8350 SoC binding and also the boards using it.
>
> Signed-off-by: Vinod Koul
> ---
> Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++
> 1 file changed, 6 insertions(+)
>
Acked-by: Rob Herring
On Wed, Dec 9, 2020 at 2:39 PM Babu Moger wrote:
>
>
>
> On 12/7/20 5:22 PM, Jim Mattson wrote:
> > On Mon, Dec 7, 2020 at 2:38 PM Babu Moger wrote:
> >>
> >> Newer AMD processors have a feature to virtualize the use of the SPEC_CTRL
> >> MSR. This feature is identified via CPUID 0x800A_EDX[2
Hello:
This series was applied to netdev/net-next.git (refs/heads/master):
On Tue, 8 Dec 2020 10:41:54 -0500 you wrote:
> From: Min Li
>
> SM_RESET device only when loading full configuration and check
> for BOOT_STATUS. Also remove polling for write trigger done in
> _idtcm_settime().
>
> Cha
Instead of using special-casing retrieval of number of X/Y electrodes
based on the firmware, let's select default values and mark registers as
non-existent on firmwares that do not support this operation.
Also mark "report rate" register as non-existent for generic firmwares as
having it set to 0
On Wed, Dec 09, 2020 at 03:01:36PM -0800, Linus Torvalds wrote:
> On Wed, Dec 9, 2020 at 2:58 PM Al Viro wrote:
> >
> > On Wed, Dec 09, 2020 at 07:49:38PM +, Matthew Wilcox wrote:
> > >
> > > Assuming this is safe, you can use RCU_INIT_POINTER() here because you're
> > > storing NULL, so you d
On Wed, Dec 09, 2020 at 05:04:59PM +0300, Ivan Mikhaylov wrote:
> In KSZ9131 PHY it is possible to control LEDs blink behavior via
> LED mode behavior and select registers. Add DTS properties plus handles
> of them inside micrel PHY driver.
>
> I've some concerns about passing raw register values
On Wed, Dec 9, 2020 at 3:01 PM Linus Torvalds
wrote:
>
> rcu_assign_pointer() itself already does the optimization for the case
> of a constant NULL pointer assignment.
>
> So there's no need to manually change things to RCU_INIT_POINTER().
Side note: what should be done instead is to delete the
On Wed, Dec 09, 2020 at 06:28:50PM +0100, Vlastimil Babka wrote:
> On 12/9/20 2:12 AM, paul...@kernel.org wrote:
> > From: "Paul E. McKenney"
> >
> > There are kernel facilities such as per-CPU reference counts that give
> > error messages in generic handlers or callbacks, whose messages are
> >
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: ca4bbdaf171604841f77648a2877e2e43db69b71
commit: eaa6bcb71ef6ed3dc18fc525ee7e293b06b4882b bpf: Introduce
bpf_per_cpu_ptr()
date: 10 weeks ago
config: mips-randconfig-r026-20201209 (attached as .config
Very sorry to ping. Is there anything I can do to help get this reviewed?
-Evan
On Mon, Nov 30, 2020 at 11:11 AM Evan Green wrote:
>
> Hi Andy, Peter,
>
> On Fri, Nov 20, 2020 at 10:59 AM Evan Green wrote:
> >
> > On Thu, Nov 19, 2020 at 7:24 AM Andy Shevchenko
> > wrote:
> > >
> > > On Thu, No
On Wed, Dec 9, 2020 at 2:58 PM Al Viro wrote:
>
> On Wed, Dec 09, 2020 at 07:49:38PM +, Matthew Wilcox wrote:
> >
> > Assuming this is safe, you can use RCU_INIT_POINTER() here because you're
> > storing NULL, so you don't need the wmb() before storing the pointer.
>
> fs/file.c:pick_file() wo
Hi Konstantin,
We tested this patch set recently and found it limiting negative dentry
to a small part of total memory. And also we don't see any performance
regression on it. Do you have any plan to integrate it into mainline? It
will help a lot on memory fragmentation issue causing by dentry
Hi Heikki,
On Wed, Dec 9, 2020 at 9:15 AM Heikki Krogerus
wrote:
>
> Hi Prashant,
>
> On Wed, Dec 09, 2020 at 08:22:52AM -0800, Prashant Malani wrote:
> > Hi Heikki,
> >
> > On Wed, Dec 9, 2020 at 8:14 AM Heikki Krogerus
> > wrote:
> > >
> > > On Tue, Dec 08, 2020 at 03:45:19PM -0800, Prashant M
On Wed, Dec 09, 2020 at 07:49:38PM +, Matthew Wilcox wrote:
> On Wed, Dec 09, 2020 at 12:04:38PM -0600, Eric W. Biederman wrote:
> > @@ -397,8 +397,9 @@ static struct fdtable *close_files(struct files_struct
> > * files)
> > set = fdt->open_fds[j++];
> > while (set) {
>
On Wed, Dec 9, 2020 at 1:21 PM David Laight wrote:
>
> I always wondered about running Class 2 transport directly over LLC2
> (rather than Class 4 over LLC1).
> But the only LLC2 user was netbios - and microsoft's LLC2 was broken.
> Not to mention the window probing needed to handle systems that
>
Fixed - thx
On Wed, Dec 9, 2020 at 3:23 PM Stephen Rothwell wrote:
>
> Hi all,
>
> Commits
>
> d24e661920cb ("cifs: Enable sticky bit with cifsacl mount option.")
> 4bcfb51f82f0 ("cifs: Fix unix perm bits to cifsacl conversion for "other"
> bits.")
>
> are missing a Signed-off-by from their
On Wed, Dec 9, 2020 at 2:07 PM Arnd Bergmann wrote:
>
> Stephen Rothwell just pointed out that one of the fixes I added today
> was missing a Signed-off-by. I corrected that and uploaded a new tag
Gaah. I had already pulled, but since I hadn't pushed out, I undid it
and re-pulled..
Lin
Greg K-H wrote:
> I think we need more review for the rest of the series. This does
> change the way serial ports work in a non-traditional way (i.e. using
> sysfs instead of terminal settings).
But the problem is that the current status quo is fundamentally broken
for those hardware devices in
On 09/12/2020 22:20, Jernej Škrabec wrote:
> Dne sreda, 09. december 2020 ob 22:35:51 CET je André Przywara napisal(a):
>> On 09/12/2020 14:33, Clément Péron wrote:
>>
>> Hi,
>>
>>> I try to review this, and compare against the vendor Kernel>
>>>
>>> On Wed, 2 Dec 2020 at 14:54, Andre Przywara
>
Assign stmmac's mdio_bus probe capabilities to MDIOBUS_C22_C45.
This extended the probing of C45 PHY devices on the MDIO bus.
Signed-off-by: Wong Vee Khee
---
v2 changelog:
- Added conditional check for gmac4.
---
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 3 +++
1 file changed, 3 inser
Explain no_user_shstk/no_user_ibt kernel parameters, and introduce a new
document on Control-flow Enforcement Technology (CET).
Signed-off-by: Yu-cheng Yu
---
.../admin-guide/kernel-parameters.txt | 6 +
Documentation/x86/index.rst | 1 +
Documentation/x86/intel_cet
Control-flow Enforcement Technology (CET) introduces these MSRs:
MSR_IA32_U_CET (user-mode CET settings),
MSR_IA32_PL3_SSP (user-mode shadow stack pointer),
MSR_IA32_PL0_SSP (kernel-mode shadow stack pointer),
MSR_IA32_PL1_SSP (Privilege Level 1 shadow stack pointer),
MSR_IA32
On Wed, Dec 09, 2020 at 07:06:58PM -, tip-bot2 for Xiaochen Shen wrote:
> diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c
> b/arch/x86/kernel/cpu/resctrl/monitor.c
> index 622073f..93a33b7 100644
> --- a/arch/x86/kernel/cpu/resctrl/monitor.c
> +++ b/arch/x86/kernel/cpu/resctrl/monitor.c
> @
There is essentially no room left in the x86 hardware PTEs on some OSes
(not Linux). That left the hardware architects looking for a way to
represent a new memory type (shadow stack) within the existing bits.
They chose to repurpose a lightly-used state: Write=0, Dirty=1.
The reason it's lightly
Shadow Stack provides protection against function return address
corruption. It is active when the processor supports it, the kernel has
CONFIG_X86_CET_USER, and the application is built for the feature.
This is only implemented for the 64-bit kernel. When it is enabled, legacy
non-Shadow Stack a
On 12/7/20 5:22 PM, Jim Mattson wrote:
> On Mon, Dec 7, 2020 at 2:38 PM Babu Moger wrote:
>>
>> Newer AMD processors have a feature to virtualize the use of the SPEC_CTRL
>> MSR. This feature is identified via CPUID 0x800A_EDX[20]. When present,
>> the SPEC_CTRL MSR is automatically virtual
Control-flow Enforcement (CET) is a new Intel processor feature that blocks
return/jump-oriented programming attacks. Details are in "Intel 64 and
IA-32 Architectures Software Developer's Manual" [1].
CET can protect applications and the kernel. This series enables only
application-level protect
On Wed, Dec 09 2020 at 4:58pm -0500,
Song Liu wrote:
> This reverts commit f0e90b6c663a7e3b4736cb318c6c7c589f152c28.
>
> Matthew Ruffell reported data corruption in raid10 due to the changes
> in discard handling [1]. Revert these changes before we find a proper fix.
>
> [1] https://bugs.launc
On Tue, Dec 8, 2020 at 4:24 PM Ben Widawsky wrote:
>
> The CXL memory device send interface will have a number of supported
> commands. The raw command is not such a command. Raw commands allow
> userspace to send a specified opcode to the underlying hardware and
> bypass all driver checks on the
When Shadow Stack is introduced, [R/O + _PAGE_DIRTY] PTE is reserved for
shadow stack. Copy-on-write PTEs have [R/O + _PAGE_COW].
When a PTE goes from [R/W + _PAGE_DIRTY] to [R/O + _PAGE_COW], it could
become a transient shadow stack PTE in two cases:
The first case is that some processors can s
On Wed, Dec 09 2020 at 4:58pm -0500,
Song Liu wrote:
> This reverts commit f0e90b6c663a7e3b4736cb318c6c7c589f152c28.
>
> Matthew Ruffell reported data corruption in raid10 due to the changes
> in discard handling [1]. Revert these changes before we find a proper fix.
>
> [1] https://bugs.launc
On Wed, Dec 09, 2020 at 10:03:54PM +, Evan Benn wrote:
> The host_event_code enum is 1-based, use EC_HOST_EVENT_MASK not BIT to
> generate the intended mask. This patch changes the behaviour of the
> mask, a following patch will restore the intended behaviour:
> 'Add LID and BATTERY to default
> -Original Message-
> From: Andrew Lunn
> Sent: Thursday, December 10, 2020 12:09 AM
> To: Wong, Vee Khee
> Cc: Giuseppe Cavallaro ; Alexandre Torgue
> ; Jose Abreu ; David
> S . Miller ; Jakub Kicinski ;
> Maxime Coquelin ; Voon, Weifeng
> ; net...@vger.kernel.org; linux-
> ker...@vg
Hi Luben,
On Wed, 9 Dec 2020 16:58:07 -0500 Luben Tuikov wrote:
>
> Add a missing structure comment for the recently
> added @list member.
>
> Signed-off-by: Luben Tuikov
>
> Cc: Stephen Rothwell
> Cc: Daniel Vetter
> Cc: Christian König
The commit message tags should all be together at t
When serving a page fault, maybe_mkwrite() makes a PTE writable if it is in
a writable vma. A shadow stack vma is writable, but its PTEs need
_PAGE_DIRTY to be set to become writable. For this reason, maybe_mkwrite()
has been updated.
There are a few places that call pte_mkwrite() directly, but
Introduce a software-defined X86_FEATURE_CET, which indicates either Shadow
Stack or Indirect Branch Tracking (or both) is present. Also introduce
related cpu init/setup functions.
Signed-off-by: Yu-cheng Yu
---
arch/x86/include/asm/cpufeatures.h | 2 +-
arch/x86/include/asm/disabled-
The x86 family of processors do not directly create read-only and Dirty
PTEs. These PTEs are created by software. One such case is that kernel
read-only pages are historically setup as Dirty.
New processors that support Shadow Stack regard read-only and Dirty PTEs as
shadow stack pages. This re
Can_follow_write_pte() ensures a read-only page is COWed by checking the
FOLL_COW flag, and uses pte_dirty() to validate the flag is still valid.
Like a writable data page, a shadow stack page is writable, and becomes
read-only during copy-on-write, but it is always dirty. Thus, in the
can_follow
There was no more caller passing vm_flags to do_mmap(), and vm_flags was
removed from the function's input by:
commit 45e55300f114 ("mm: remove unnecessary wrapper function
do_mmap_pgoff()").
There is a new user now. Shadow stack allocation passes VM_SHSTK to
do_mmap(). Re-introduce vm_fla
A control-protection fault is triggered when a control-flow transfer
attempt violates Shadow Stack or Indirect Branch Tracking constraints.
For example, the return address for a RET instruction differs from the copy
on the shadow stack; or an indirect JMP instruction, without the NOTRACK
prefix, ar
The read-only and Dirty PTE has been used to indicate copy-on-write pages.
However, newer x86 processors also regard a read-only and Dirty PTE as a
shadow stack page. In order to separate the two, the software-defined
_PAGE_COW is created to replace _PAGE_DIRTY for the copy-on-write case, and
pte_
An ELF file's .note.gnu.property indicates arch features supported by the
file. These features are extracted by arch_parse_elf_property() and stored
in 'arch_elf_state'. Introduce arch_setup_elf_property() for enabling such
features. The first use-case of this function is shadow stack.
ARM64 is
Introduce basic shadow stack enabling/disabling/allocation routines.
A task's shadow stack is allocated from memory with VM_SHSTK flag and has
a fixed size of min(RLIMIT_STACK, 4GB).
Signed-off-by: Yu-cheng Yu
---
arch/x86/include/asm/cet.h | 28 ++
arch/x86/include/asm/processor.h |
On Wed, Dec 09, 2020 at 06:05:52PM +, Christoph Hellwig wrote:
> On Wed, Dec 09, 2020 at 04:51:48PM +0100, Stanislaw Gruszka wrote:
> > On Wed, Dec 09, 2020 at 03:08:26PM +, Matthew Wilcox wrote:
> > > On Wed, Dec 09, 2020 at 03:46:28PM +0100, Stanislaw Gruszka wrote:
> > > > At this point
Add a missing structure comment for the recently
added @list member.
Cc: Stephen Rothwell
Cc: Daniel Vetter
Cc: Christian König
Fixes: 8935ff00e3b1 ("drm/scheduler: "node" --> "list"")
Reported-by: Stephen Rothwell
Signed-off-by: Luben Tuikov
---
include/drm/gpu_scheduler.h | 2 +-
1 file c
Shadow stack accesses are those that are performed by the CPU where it
expects to encounter a shadow stack mapping. These accesses are performed
implicitly by CALL/RET at the site of the shadow stack pointer. These
accesses are made explicitly by shadow stack management instructions like
WRUSSQ.
A shadow stack PTE must be read-only and have _PAGE_DIRTY set. However,
read-only and Dirty PTEs also exist for copy-on-write (COW) pages. These
two cases are handled differently for page faults. Introduce VM_SHSTK to
track shadow stack VMAs.
Signed-off-by: Yu-cheng Yu
Reviewed-by: Kees Cook
Control-flow Enforcement (CET) is a new Intel processor feature that blocks
return/jump-oriented programming attacks. Details are in "Intel 64 and
IA-32 Architectures Software Developer's Manual" [1].
This is the second part of CET and enables Indirect Branch Tracking (IBT).
It is built on top of
Indirect branch tracking is a hardware security feature that verifies near
indirect call/jump instructions arrive at intended targets, which are
labeled by the compiler with ENDBR opcodes. If such instructions reach
unlabeled locations, the processor raises control-protection faults.
Check the co
From: "H.J. Lu"
Add ENDBR32 to __kernel_vsyscall entry point.
Signed-off-by: H.J. Lu
Signed-off-by: Yu-cheng Yu
Acked-by: Andy Lutomirski
---
arch/x86/entry/vdso/vdso32/system_call.S | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/entry/vdso/vdso32/system_call.S
b/arch/x86/e
From: "H.J. Lu"
When Indirect Branch Tracking (IBT) is enabled, vDSO functions may be
called indirectly, and must have ENDBR32 or ENDBR64 as the first
instruction. The compiler must support -fcf-protection=branch so that it
can be used to compile vDSO.
Signed-off-by: H.J. Lu
Signed-off-by: Yu-
An ELF file's .note.gnu.property indicates features the file supports.
The property is parsed at loading time and passed to arch_setup_elf_
property(). Update it for Indirect Branch Tracking.
Signed-off-by: Yu-cheng Yu
---
arch/x86/kernel/process_64.c | 8
1 file changed, 8 insertions(
From: "H.J. Lu"
Update ARCH_X86_CET_STATUS and ARCH_X86_CET_DISABLE for Indirect Branch
Tracking.
Signed-off-by: H.J. Lu
Signed-off-by: Yu-cheng Yu
---
arch/x86/kernel/cet_prctl.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/x86/kernel/cet_prctl.c b/arch/x86/kernel/cet_prctl.
When an indirect CALL/JMP instruction is executed and before it reaches
the target, it is in 'WAIT_ENDBR' status, which can be read from
MSR_IA32_U_CET. The status is part of a task's status before a signal is
raised and preserved in the signal frame. It is restored for sigreturn.
IBT state mach
Introduce user-mode Indirect Branch Tracking (IBT) support. Add routines
for the setup/disable of IBT.
Signed-off-by: Yu-cheng Yu
---
arch/x86/include/asm/cet.h | 3 +++
arch/x86/kernel/cet.c | 33 +
2 files changed, 36 insertions(+)
diff --git a/arch/x86/
On 2020-12-09 5:24 p.m., Stephen Rothwell wrote:
> Hi Luben,
>
> On Wed, 9 Dec 2020 16:58:07 -0500 Luben Tuikov wrote:
>>
>> Add a missing structure comment for the recently
>> added @list member.
>>
>> Signed-off-by: Luben Tuikov
>>
>> Cc: Stephen Rothwell
>> Cc: Daniel Vetter
>> Cc: Christi
Hi Andrew,
Please queue this, a gcc warning fix, for the next merge window.
Thanks,
Ryusuke Konishi
On Thu, Dec 10, 2020 at 7:25 AM Ryusuke Konishi
wrote:
>
> From: Alex Shi
>
> There some macros are unused and cause gcc warning. Remove them.
>
> fs/nilfs2/segment.c:137:0: warning: macro "nilf
INCSSP(Q/D) increments shadow stack pointer and 'pops and discards' the
first and the last elements in the range, effectively touches those memory
areas.
The maximum moving distance by INCSSPQ is 255 * 8 = 2040 bytes and
255 * 4 = 1020 bytes by INCSSPD. Both ranges are far from PAGE_SIZE.
Thus, p
On Wed, Dec 09, 2020 at 11:23:28PM +0100, Borislav Petkov wrote:
> and you should remove the chunks assignment too.
Yah, ignore that part - mbm_bw_count() does need chunks for cur_bw. Oh
well.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
An ELF file's .note.gnu.property indicates architecture features of the
file. Introduce feature definitions for Shadow Stack and Indirect Branch
Tracking.
Signed-off-by: Yu-cheng Yu
---
include/uapi/linux/elf.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/uapi/linux/elf.
The kernel allocates (and frees on thread exit) a new shadow stack for a
pthread child.
It is possible for the kernel to complete the clone syscall and set the
child's shadow stack pointer to NULL and let the child thread allocate
a shadow stack for itself. There are two issues in thi
To deliver a signal, create a shadow stack restore token and put a restore
token and the signal restorer address on the shadow stack. For sigreturn,
verify the token and restore the shadow stack pointer.
Introduce WRUSS, which is a kernel-mode instruction but writes directly to
user shadow stack.
From: Alex Shi
There some macros are unused and cause gcc warning. Remove them.
fs/nilfs2/segment.c:137:0: warning: macro "nilfs_cnt32_gt" is not used
[-Wunused-macros]
fs/nilfs2/segment.c:144:0: warning: macro "nilfs_cnt32_le" is not used
[-Wunused-macros]
fs/nilfs2/segment.c:143:0: warning: ma
arch_prctl(ARCH_X86_CET_STATUS, u64 *args)
Get CET feature status.
The parameter 'args' is a pointer to a user buffer. The kernel returns
the following information:
*args = shadow stack/IBT status
*(args + 1) = shadow stack base address
*(args + 2) = shadow stack size
ar
There are three possible options to create a shadow stack allocation API:
an arch_prctl, a new syscall, or adding PROT_SHSTK to mmap()/mprotect().
Each has its advantages and compromises.
An arch_prctl() is the least intrusive. However, the existing x86
arch_prctl() takes only two parameters. Mu
Account shadow stack pages to stack memory.
Signed-off-by: Yu-cheng Yu
---
arch/x86/mm/pgtable.c | 7 +++
include/linux/pgtable.h | 11 +++
mm/mmap.c | 5 +
3 files changed, 23 insertions(+)
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index a9666
When serving a page fault, maybe_mkwrite() makes a PTE writable if its vma
has VM_WRITE.
A shadow stack vma has VM_SHSTK. Its PTEs have _PAGE_DIRTY, but not
_PAGE_WRITE. In fork(), _PAGE_DIRTY is cleared to effect copy-on-write,
and in page fault, _PAGE_DIRTY is restored and the shadow stack pag
After the introduction of _PAGE_COW, a modified page's PTE can have either
_PAGE_DIRTY or _PAGE_COW. Change _PAGE_DIRTY to _PAGE_DIRTY_BITS.
Signed-off-by: Yu-cheng Yu
Reviewed-by: Kees Cook
Cc: David Airlie
Cc: Joonas Lahtinen
Cc: Jani Nikula
Cc: Daniel Vetter
Cc: Rodrigo Vivi
Cc: Zhenyu
Add CPU feature flags for Control-flow Enforcement Technology (CET).
CPUID.(EAX=7,ECX=0):ECX[bit 7] Shadow stack
CPUID.(EAX=7,ECX=0):EDX[bit 20] Indirect Branch Tracking
Signed-off-by: Yu-cheng Yu
---
arch/x86/include/asm/cpufeatures.h | 2 ++
arch/x86/include/asm/disabled-features.h | 1
Building the BPF selftests with clang 11, I'm getting the following
error:
CLNG-LLC [test_maps] profiler1.o
In file included from progs/profiler1.c:6:
progs/profiler.inc.h:260:17: error: use of unknown builtin
'__builtin_preserve_enum_value' [-Wimplicit-function-declaration]
Dne sreda, 09. december 2020 ob 22:35:51 CET je André Przywara napisal(a):
> On 09/12/2020 14:33, Clément Péron wrote:
>
> Hi,
>
> > I try to review this, and compare against the vendor Kernel>
> >
> > On Wed, 2 Dec 2020 at 14:54, Andre Przywara
wrote:
> >> While the clocks are fairly similar
Hi all,
On Wed, 9 Dec 2020 12:14:39 -0800 Randy Dunlap wrote:
>
> On 12/9/20 2:44 AM, Stephen Rothwell wrote:
> > Hi all,
> >
> > Changes since 20201208:
> >
>
> on i386:
>
> I see this warning:/note: repeated 106 times on i386 build:
>
> from ../drivers/net/ethernet/mella
On Tue, 2020-12-08 at 22:58 -0800, Can Guo wrote:
> ufshcd_hba_exit() is always called after ufshcd_exit_clk_scaling()
> and
> ufshcd_exit_clk_gating(), so no need to suspend clock scaling again
> in
> ufshcd_hba_exit().
>
> Signed-off-by: Can Guo
Reviewed-by: Bean Huo
On Thu, Dec 10, 2020 at 12:34:53AM +0530, Sumera Priyadarsini wrote:
> Update the vkms documentation to contain steps to:
>
> - setup the vkms driver
> - run tests using igt
>
> Signed-off-by: Sumera Priyadarsini
> ___
> Changes in v2:
> - Change heading to title case (Daniel)
> - Add exampl
Dear Community,
> This patch adds DTS definition of the imx278 based XEA board.
>
> Signed-off-by: Lukasz Majewski
> ---
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/imx28-lwe.dtsi | 185
> +++ arch/arm/boot/dts/imx28-xea.dts |
> 99 ++
On Wed, Dec 9, 2020 at 1:47 AM Xie He wrote:
>
> On Wed, Dec 9, 2020 at 1:41 AM Martin Schiller wrote:
> >
> > Right.
> > By the way: A "Restart Collision" is in practice a very common event to
> > establish the Layer 3.
>
> Oh, I see. Thanks!
Hi Martin,
When you submit future patch series, can
From: Mans Rullgard
Add pinmux setting for USB1 overcurrent on pwm2 pad.
Signed-off-by: Mans Rullgard
Signed-off-by: Lukasz Majewski
---
Changes for v2:
- Add S-o-B
---
arch/arm/boot/dts/imx28.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/imx28.dtsi b/
On Wed, 2020-12-09 at 07:40 +, Avri Altman wrote:
> > From: Bean Huo
> >
> > According to the JEDEC UFS 3.1 Spec, If
> > fWriteBoosterBufferFlushDuringHibernate
> > is set to one, the device flushes the WriteBooster Buffer data
> > automatically
> > whenever the link enters the hibernate (HIB
From: Steven Rostedt (VMware)
Running my yearly branch profiling code, it detected a 100% wrong branch
condition in name.c for lookup_fast(). The code in question has:
status = d_revalidate(dentry, nd->flags);
if (likely(status > 0))
retur
> Am 09.12.2020 um 22:28 schrieb Sven Van Asbroeck :
>
> On Wed, Dec 9, 2020 at 3:08 PM H. Nikolaus Schaller
> wrote:
>>
>> But I have tested with
>>
>>> spi->mode |= SPI_MODE_3;
>>
>> which should keep the mode intact. Right? That did not work either.
>>
>
> - make sure ("spi: fix client
Matthew Wilcox writes:
> On Wed, Dec 09, 2020 at 12:04:38PM -0600, Eric W. Biederman wrote:
>> @@ -397,8 +397,9 @@ static struct fdtable *close_files(struct files_struct *
>> files)
>> set = fdt->open_fds[j++];
>> while (set) {
>> if (set & 1) {
>>
On Tue, Dec 8, 2020 at 4:24 PM Ben Widawsky wrote:
>
> The send command allows userspace to issue mailbox commands directly to
> the hardware. The driver will verify basic properties of the command but
> otherwise pass any input payload untouched to the hardware, and return
> the output payload to
Linus Torvalds writes:
> On Wed, Dec 9, 2020 at 10:05 AM Eric W. Biederman
> wrote:
>>
>> - struct file * file = xchg(&fdt->fd[i], NULL);
>> + struct file * file = fdt->fd[i];
>> if (file) {
>> +
> On Dec 8, 2020, at 8:17 PM, Song Liu wrote:
>
> Hi Matthew,
>
>> On Dec 8, 2020, at 7:46 PM, Matthew Ruffell
>> wrote:
>>
>> Hello,
>>
>> I recently backported the following patches into the Ubuntu stable kernels:
>>
>> md: add md_submit_discard_bio() for submitting discard bio
>> md/r
After 'platform/chrome: cros_ec_proto: Use EC_HOST_EVENT_MASK not BIT'
some of the flags are not quite correct.
LID_CLOSED is used to suspend the device, so it makes sense to ignore that.
BATTERY events are also frequent and causing spurious wakes on elm/hana
mt8173 devices.
Fixes: c214e564acb2ad9
The host_event_code enum is 1-based, use EC_HOST_EVENT_MASK not BIT to
generate the intended mask. This patch changes the behaviour of the
mask, a following patch will restore the intended behaviour:
'Add LID and BATTERY to default mask'
Fixes: c214e564acb2ad9463293ab9c109bfdae91fbeaf
Signed-off-b
This reverts commit f0e90b6c663a7e3b4736cb318c6c7c589f152c28.
Matthew Ruffell reported data corruption in raid10 due to the changes
in discard handling [1]. Revert these changes before we find a proper fix.
[1] https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1907262/
Cc: Matthew Ruffell
Cc:
On Wed, 2020-12-09 at 07:40 +, Avri Altman wrote:
> > According to the JEDEC UFS 3.1 Spec, If
> > fWriteBoosterBufferFlushDuringHibernate
> > is set to one, the device flushes the WriteBooster Buffer data
> > automatically
> > whenever the link enters the hibernate (HIBERN8) state. While the
>
From: Dominique Martinet
> Sent: 09 December 2020 17:43
>
> I've suggested either just reverting this (I'll keep my local
> workaround) or going through /bin/sh which is always safe like the
> following patch -- leaving this to maintainers.
>
> Thanks!
> -
> From d53ef3b4c55aa2ea5f9ae887b3e1a
On Wed, Dec 9, 2020 at 10:35 PM Stephen Rothwell wrote:
>
> 2305d20f251d ("firmware: xilinx: Mark pm_api_features_map with static
> keyword")
>
> is missing a Signed-off-by from its committer.
Thanks for pointing it out. Just when I apply two last fixes before
sending out the
fixes pull reques
This documents close_range(2) based on information in
278a5fbaed89dacd04e9d052f4594ffd0e0585de and
60997c3d45d9a67daf01c56d805ae4fec37e0bd8.
Signed-off-by: Stephen Kitt
---
V2: unsigned int to match the kernel declarations
groff and grammar tweaks
CLOSE_RANGE_UNSHARE unshares *and* closes
Hello,
Starting from kernel 5.8 all non-optimized kretprobes don't work. Until 5.8,
when #DB exception was raised, entry to the NMI was not fully performed. Among
others, the following logic was executed:
https://elixir.bootlin.com/linux/v5.7.19/source/arch/x86/kernel/traps.c#L589
if (!user_m
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