Commit 90b0f71d62df ("hwmon: (pmbus/max16601) Determine and use number of
populated phases") adjusts content in the table of
./Documentation/hwmon/max16601.rst, but one row went beyond the column's
length.
Hence, make htmldocs warns:
Documentation/hwmon/max16601.rst:94: WARNING: Malformed
Commit 8ba59e9dee31 ("misc: pti: Remove driver for deprecated platform")
removed ./Documentation/driver-api/pti_intel_mid.rst, but missed to remove
it from the index at ./Documentation/driver-api/index.rst.
Hence, make htmldocs warns:
WARNING: toctree contains reference to nonexisting document
On Sat, Jan 30, 2021 at 07:14:29PM +, Jonathan Cameron wrote:
> On Sat, 30 Jan 2021 18:25:30 +0800
> Ye Xiang wrote:
>
> > Currently, the proxy sensor scale is zero because it just return the
> > exponent directly. To fix this issue, this patch use
> > hid_sensor_format_scale to process the
On Sun, Jan 31, 2021 at 07:25:37AM +, Avri Altman wrote:
> > >
> > > + if (ufshpb_mode == HPB_HOST_CONTROL)
> > > + reads = atomic64_inc_return(>reads);
> > > +
> > > if (!ufshpb_is_support_chunk(transfer_len))
> > > return;
> > >
> > > + if (ufshpb_mode
> > + /* region "cold" timer - for host mode */
> > + ktime_t read_timeout;
> > + atomic_t read_timeout_expiries;
>
> Why does this have to be an atomic when you have a lock to protect this
> structure already taken?
Done.
You are right, it is protected by the hpb state lock. Will
> >
> > + if (ufshpb_mode == HPB_HOST_CONTROL)
> > + reads = atomic64_inc_return(>reads);
> > +
> > if (!ufshpb_is_support_chunk(transfer_len))
> > return;
> >
> > + if (ufshpb_mode == HPB_HOST_CONTROL) {
> > + /*
> > + * in host
Thanks Johns.
We could see a kernel crash while testing this patch.
[ 246.724632] scsi host10: pm80xx
[ 248.005258] sas: Enter sas_scsi_recover_host busy: 0 failed: 0
[ 248.168973] BUG: kernel NULL pointer dereference, address: 0110
[ 248.175926] #PF: supervisor read access in
> On Sun, Jan 31, 2021 at 07:08:00AM +, Avri Altman wrote:
> > > >
> > > > +static enum UFSHPB_MODE ufshpb_mode;
> > >
> > > How are you allowed to have a single variable for a device-specific
> > > thing? What happens when you have two controllers or disks or whatever
> > > you are binding
On Sat, Jan 30, 2021 at 07:14:29PM +, Jonathan Cameron wrote:
> On Sat, 30 Jan 2021 18:25:30 +0800
> Ye Xiang wrote:
>
> > Currently, the proxy sensor scale is zero because it just return the
> > exponent directly. To fix this issue, this patch use
> > hid_sensor_format_scale to process the
>
>
> On Wed, Jan 27, 2021 at 05:12:11PM +0200, Avri Altman wrote:
> > There are some limitations to activations / inactivations in host
> > control mode - Add those.
>
> I can not understand this changelog text, please make it more
> descriptive as I have no way to know how to review this
On Sun, Jan 31, 2021 at 07:08:00AM +, Avri Altman wrote:
> > >
> > > +static enum UFSHPB_MODE ufshpb_mode;
> >
> > How are you allowed to have a single variable for a device-specific
> > thing? What happens when you have two controllers or disks or whatever
> > you are binding to here? How
> >
> > +static enum UFSHPB_MODE ufshpb_mode;
>
> How are you allowed to have a single variable for a device-specific
> thing? What happens when you have two controllers or disks or whatever
> you are binding to here? How does this work at all?
>
> This should be per-device, right?
Right.
Hi Sven,
Looks good.
see comments below.
> static int lan743x_rx_process_packet(struct lan743x_rx *rx) {
It looks like this function no longer processes a packet, but rather only
processes a single buffer.
So perhaps it should be renamed to lan743x_rx_process_buffer, so it is not
Hi Willem,
> -Original Message-
> From: Willem de Bruijn
> Sent: Saturday, January 30, 2021 7:57 PM
> To: Hariprasad Kelam
> Cc: Network Development ; LKML ker...@vger.kernel.org>; David Miller ; Jakub
> Kicinski ; Sunil Kovvuri Goutham
> ; Linu Cherian ;
> Geethasowjanya Akula ; Jerin
Sort the bindings before adding new SM1 devices.
Signed-off-by: Christian Hewitt
Acked-by: Neil Armstrong
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml
ODROID-HC4 is a derivative of the C4 with minor differences:
- 16MB XT25F128B SPI-NOR flash
- 2x SATA ports via ASM1061 PCIe to SATA controller
- 7-pin header with SPI and I2C for 1-inch OLED display and RTC
- 1x USB 2.0 host port
Signed-off-by: Christian Hewitt
Reviewed-by: Neil Armstrong
---
Convert the ODROID-C4 dts to meson-sm1-odroid.dtsi and C4 board dts in
preparation for adding additional C4 family boards.
Signed-off-by: Christian Hewitt
Reviewed-by: Neil Armstrong
---
.../boot/dts/amlogic/meson-sm1-odroid-c4.dts | 427 +
Add the board bindings for the ODROID-HC4 device.
Signed-off-by: Christian Hewitt
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml
b/Documentation/devicetree/bindings/arm/amlogic.yaml
Sort the Makefile before adding new SM1 devices.
Signed-off-by: Christian Hewitt
Acked-by: Neil Armstrong
---
arch/arm64/boot/dts/amlogic/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/Makefile
b/arch/arm64/boot/dts/amlogic/Makefile
This series fixes minor sort-order issues in the Amlogic bindings yaml and
dtb Makefile, then converts the existing ODROID-C2 dts into dtsi so we can
support its new sister product the ODROID-HC4.
I've also given the devices different audio card names. This is partly
cosmetic, but also because
Hi,
On Sun, Jan 31, 2021 at 12:54 AM Corentin Labbe
wrote:
>
> Hello
>
> When booting next-20210128, I got the following warning on by bpim3
> 6.148421] [ cut here ]
> [6.153145] WARNING: CPU: 2 PID: 57 at drivers/thermal/thermal_core.c:563
>
On Sat, Jan 30, 2021 at 04:18:04PM -0800, Mychaela Falconia wrote:
> Greg K-H wrote:
>
> > our job is to make Linux work for everyone.
>
> But as your refusal to accept the purely additive (zero impact on
> anything other than specific hw in question) patch adding support for
> a new hardware
On Sun, Jan 31, 2021 at 11:40 AM Chun-Kuang Hu wrote:
>
> Hi, Hsin-Yi:
>
> Hsin-Yi Wang 於 2021年1月29日 週五 下午5:23寫道：
> >
> > From: Yongqiang Niu
> >
> > Enable dither function to improve the display quality for dither
> > supported bpc 4, 6, 8. For not supported bpc, use relay mode.
> >
> >
From: Yongqiang Niu
Enable dither function to improve the display quality.
Signed-off-by: Yongqiang Niu
Signed-off-by: Hsin-Yi Wang
---
Previous version:
https://patchwork.kernel.org/project/linux-mediatek/patch/20210129092209.2584718-7-hsi...@chromium.org/
---
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 6642d600b541b81931fb1ab0c041b0d68f77be7e
commit: fcf77be87eacb8f305528d24d892dfcf15cf0341 clk: fsl-flexspi: new driver
date: 8 weeks ago
config: arm64-randconfig-r013-20210130 (attached as .config
On 1/30/21 1:22 PM, Jakub Kicinski wrote:
On Sat, 30 Jan 2021 10:25:16 -0500 Willem de Bruijn wrote:
@@ -894,12 +894,16 @@ int gsi_channel_start(struct gsi *gsi, u32 channel_id)
struct gsi_channel *channel = >channel[channel_id];
int ret;
- /* Enable the completion
> functions that caused recursion
> date: 3 months ago
> config: arm64-randconfig-r013-20210130 (attached as .config)
> compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project
> 275c6af7d7f1ed63a03d05b4484413e447133269)
> reproduce (this is a W=1 b
LiteUART driver
> date: 3 months ago
> config: arm64-randconfig-r013-20210130 (attached as .config)
> compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project
> 275c6af7d7f1ed63a03d05b4484413e447133269)
> reproduce (this is a W=1 build):
> wget
> https:/
Hi all,
Commit
ca7222dcfff4 ("parisc: Bump 64-bit IRQ stack size to 64 KB")
is missing a Signed-off-by from its committer.
--
Cheers,
Stephen Rothwell
pgpOlEOC_U0dq.pgp
Description: OpenPGP digital signature
On 1/30/21 9:25 AM, Willem de Bruijn wrote:
On Fri, Jan 29, 2021 at 3:29 PM Alex Elder wrote:
The channel stop and suspend paths both call __gsi_channel_stop(),
which quiesces channel activity, disables NAPI, and (on other than
SDM845) stops the channel. Similarly, the start and resume paths
On Sat, 2021-01-30 at 19:36 -0800, Guenter Roeck wrote:
> On 1/30/21 4:41 PM, James Bottomley wrote:
> > On Sat, 2021-01-30 at 15:49 -0800, Guenter Roeck wrote:
> > > On 1/29/21 2:59 PM, Jarkko Sakkinen wrote:
> > > > On Tue, Jan 26, 2021 at 04:46:07PM +0100, Łukasz Majczak wrote:
> > > > > Hi
config: powerpc64-randconfig-c003-20210130 (attached as .config)
compiler: powerpc64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https
Hi, Hsin-Yi:
Hsin-Yi Wang 於 2021年1月29日 週五 下午3:35寫道：
>
> From: Yongqiang Niu
>
> ccorr ctm matrix bits will be different in mt8192
>
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Hsin-Yi Wang
> ---
> drivers/gpu/drm/mediatek/Makefile | 3 +-
>
Hi, Hsin-Yi:
CK Hu 於 2021年1月29日 週五 下午4:21寫道：
>
> Hi, Hsin-Yi:
>
> On Fri, 2021-01-29 at 15:34 +0800, Hsin-Yi Wang wrote:
> > From: Yongqiang Niu
> >
> > enable OVL_LAYER_SMI_ID_EN for multi-layer usecase, without this patch,
> > ovl will hang up when more than 1 layer enabled.
>
> Reviewed-by:
Hi, Hsin-Yi:
Hsin-Yi Wang 於 2021年1月29日 週五 下午5:23寫道：
>
> From: Yongqiang Niu
>
> Enable dither function to improve the display quality for dither
> supported bpc 4, 6, 8. For not supported bpc, use relay mode.
>
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Hsin-Yi Wang
> ---
>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 6642d600b541b81931fb1ab0c041b0d68f77be7e
commit: 1da81e5562fac8286567422cc56a7fbd0dc646d4 drivers/tty/serial: add
LiteUART driver
date: 3 months ago
config: arm64-randconfig-r013-20210130 (attached
On 1/30/21 4:41 PM, James Bottomley wrote:
> On Sat, 2021-01-30 at 15:49 -0800, Guenter Roeck wrote:
>> On 1/29/21 2:59 PM, Jarkko Sakkinen wrote:
>>> On Tue, Jan 26, 2021 at 04:46:07PM +0100, Łukasz Majczak wrote:
Hi Jarkko, Guenter
Yes, here are the logs when failure occurs -
Excerpts from Nadav Amit's message of January 31, 2021 10:11 am:
> From: Nadav Amit
>
> There are currently (at least?) 5 different TLB batching schemes in the
> kernel:
>
> 1. Using mmu_gather (e.g., zap_page_range()).
>
> 2. Using {inc|dec}_tlb_flush_pending() to inform other threads on the
On Sat, Jan 30, 2021 at 11:16 AM Jakub Kicinski wrote:
>
> Sounds like too much afford for a sub-optimal workaround.
> The qdisc semantics are borken in the proposed scheme (double
> counting packets) - both in term of statistics and if user decides
> to add a policer, filter etc.
Hmm...
On 1/30/21 4:26 PM, Jarkko Sakkinen wrote:
On Wed, 2021-01-27 at 07:33 -0500, Stefan Berger wrote:
From: Stefan Berger
Detect whether a key is an sm2 type of key by its OID in the parameters
array rather than assuming that everything under OID_id_ecPublicKey
is sm2, which is not the case.
On Sat, Jan 30, 2021 at 5:17 PM Nadav Amit wrote:
>
> > On Jan 30, 2021, at 5:07 PM, Andy Lutomirski wrote:
> >
> > Adding Andrew Cooper, who has a distressingly extensive understanding
> > of the x86 PTE magic.
> >
> > On Sat, Jan 30, 2021 at 4:16 PM Nadav Amit wrote:
> >> From: Nadav Amit
>
On Sat, Jan 30, 2021 at 5:19 PM Nadav Amit wrote:
>
> > On Jan 30, 2021, at 5:02 PM, Andy Lutomirski wrote:
> >
> > On Sat, Jan 30, 2021 at 4:16 PM Nadav Amit wrote:
> >> From: Nadav Amit
> >>
> >> fullmm in mmu_gather is supposed to indicate that the mm is torn-down
> >> (e.g., on process
On Sat, Jan 30, 2021 at 5:56 PM Linus Torvalds
wrote:
>
> On Sat, Jan 30, 2021 at 5:32 PM Kyle Huey wrote:
> >
> > I tested that with 2991552447707d791d9d81a5dc161f9e9e90b163 reverted
> > and Yuxuan's patch applied to Linus's tip rr works and passes all
> > tests.
>
> There's a patch in the -tip
The pull request you sent on Sat, 30 Jan 2021 12:49:45 -0600:
> git://git.samba.org/sfrench/cifs-2.6.git tags/5.11-rc5-smb3
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/6642d600b541b81931fb1ab0c041b0d68f77be7e
Thank you!
--
Deet-doot-dot, I am a bot.
The pull request you sent on Sat, 30 Jan 2021 10:38:05 -0800:
> git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi.git scsi-fixes
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/ad8b3c1e637cf7b827d26917034fa686af74896b
Thank you!
--
Deet-doot-dot, I am a bot.
The pull request you sent on Sun, 31 Jan 2021 07:44:42 +0900:
> git://github.com/openrisc/linux.git tags/for-linus
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/03e319e5465a2da6fb188c77043775f2888df529
Thank you!
--
Deet-doot-dot, I am a bot.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 8c947645151cc2c279c75c7f640dd8f0fc0b9aa2
commit: 773c16705058e9be7b0f4ce124e89cd231c120a2 ftrace: Add recording of
functions that caused recursion
date: 3 months ago
config: arm64-randconfig-r013-20210130
Acked-by
Thx
On Sun, Jan 31, 2021 at 7:50 AM Randy Dunlap wrote:
>
> e1000's #define of CONFIG_RAM_BASE conflicts with a Kconfig symbol in
> arch/csky/Kconfig.
> The symbol in e1000 has been around longer, so change arch/csky/
> to use DRAM_BASE instead of RAM_BASE to remove the conflict.
>
On Sat, Jan 30, 2021 at 5:32 PM Kyle Huey wrote:
>
> I tested that with 2991552447707d791d9d81a5dc161f9e9e90b163 reverted
> and Yuxuan's patch applied to Linus's tip rr works and passes all
> tests.
There's a patch in the -tip tree that hasn't been merged yet:
months ago
config: powerpc-randconfig-c003-20210130 (attached as .config)
compiler: powerpc64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
From: Gustave Monce
* Move 35500 clock-frequency to kitakami (turns out it's a Sony specific)
* Add missing interfaces
* Fix the naming scheme
* Fix up pin assignments to make all BLSPs work
* Add DMA where previously omitted
Co-authored-by: Konrad Dybcio
Signed-off-by: Gustave Monce
From: Gustave Monce
Configure and enable QCA6174 Bluetooth and required pins.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 44 +++
1 file changed, 44 insertions(+)
diff --git
From: Gustave Monce
The driver is not available yet, so hardcode the pins.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git
From: Gustave Monce
Octagon devices have a Lattice iCE40 FPGA connected over SPI.
Configure it.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 21 +++
1 file changed, 21 insertions(+)
diff --git
From: Gustave Monce
Both the power key and the vol- key are connected over PON.
Configure them.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 16
arch/arm64/boot/dts/qcom/pm8994.dtsi | 2 +-
2
From: Gustave Monce
Lumia 950/XL, like other phones, ship with different storage chips.
Some of them are not capable of stable operation at HS400. Disable it.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 21 +++
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/msm8994.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi
b/arch/arm64/boot/dts/qcom/msm8994.dtsi
index a6148b00e82c..60e04514af70 100644
---
From: Gustave Monce
Octagon devices use PN544 connected over I2C. Configure it.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 16
1 file changed, 16 insertions(+)
diff --git
FAN53526 and SI470X are both connected over blsp2_i2c5. Configure them.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 26 +++
1 file changed, 26 insertions(+)
diff --git
From: Gustave Monce
Lumia 950/XL feature a TAS2553 codec. Configure it using the
TAS2552 driver.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 20 +++
1 file changed, 20 insertions(+)
diff --git
This saves a good thousand lines of code, perhaps even
more in the long run.
Co-authored-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8992-bullhead-rev-101.dts | 2 +-
.../boot/dts/qcom/msm8992-xiaomi-libra.dts| 39 +-
arch/arm64/boot/dts/qcom/msm8992.dtsi
From: Gustave Monce
Add and configure AD7147 grip sensor and APDS9930 proximity sensor.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 50 +++
1 file changed, 50 insertions(+)
diff --git
From: Gustave Monce
Add AK09912 magnetometer, ZPA2326 barometer and MPU6500 accelerometer
nodes.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 36 +++
1 file changed, 36 insertions(+)
diff --git
From: Gustave Monce
Windows-based devices have a far different memory map than
the standard LA one.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 166 ++
1 file changed, 166 insertions(+)
diff --git
From: Gustave Monce
This enables tje hardware keys as well as the Hall sensor.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 77 +++
1 file changed, 77 insertions(+)
diff --git
They will be required for bringup of remote processors.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/msm8994.dtsi | 49 +++
1 file changed, 49 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi
b/arch/arm64/boot/dts/qcom/msm8994.dtsi
index
From: Gustave Monce
Lumia 950 and 950XL are both based on the Octagon board, sharing
the vast majority of components, configuration etc. Commonize it.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/Makefile | 4 +-
From: Gustave Monce
Configure the regulators to ensure proper voltages across
the board.
Signed-off-by: Gustave Monce
Signed-off-by: Konrad Dybcio
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 314 ++
1 file changed, 314 insertions(+)
diff --git
This series enabled already-supported hardware on Lumia 950/XL
and adds SMP2P configuration on 8992/4, as well as cleaning up
the DTs massively by transforming the 8992 dt into an overlay
on top of 8994 (they are *almost* the same silicon).
Gustave Monce (14):
arm64: dts: qcom: msm8994: Fix
This SoC while being from 8916 era, makes use of the
newer-style, floor-level management, instead of the older
floor-corner.
Signed-off-by: Konrad Dybcio
---
.../devicetree/bindings/power/qcom,rpmpd.yaml | 1 +
drivers/soc/qcom/rpmpd.c | 22 +++
Yuxuan Shui previous reported a regression in single step reporting,
introduced in 64eb35f701f04b30706e21d1b02636b5d31a37d2, with a patch
to fix it.
However, after that is fixed, there is another regression introduced
later in the same series, in 2991552447707d791d9d81a5dc161f9e9e90b163,
that
This is required to bring up the PHY on MDM9607-based boards.
Signed-off-by: Konrad Dybcio
---
.../devicetree/bindings/phy/qcom,usb-hs-28nm.yaml | 1 +
drivers/phy/qualcomm/phy-qcom-usb-hs-28nm.c | 13 +
2 files changed, 14 insertions(+)
diff --git
Add support for RPM-managed clocks on the MDM9607 platform.
Signed-off-by: Konrad Dybcio
---
.../devicetree/bindings/clock/qcom,rpmcc.txt | 1 +
drivers/clk/qcom/clk-smd-rpm.c| 32 +++
2 files changed, 33 insertions(+)
diff --git
Add a compatible for MDM9607. It uses the "legacy" calling
convention.
Signed-off-by: Konrad Dybcio
---
Documentation/devicetree/bindings/firmware/qcom,scm.txt | 1 +
drivers/firmware/qcom_scm.c | 3 +++
2 files changed, 4 insertions(+)
diff --git
> On Jan 30, 2021, at 5:02 PM, Andy Lutomirski wrote:
>
> On Sat, Jan 30, 2021 at 4:16 PM Nadav Amit wrote:
>> From: Nadav Amit
>>
>> fullmm in mmu_gather is supposed to indicate that the mm is torn-down
>> (e.g., on process exit) and can therefore allow certain optimizations.
>> However,
On Mon, 25 Jan 2021, Dave Hansen wrote:
> diff -puN mm/migrate.c~0006-node-Define-and-export-memory-migration-path
> mm/migrate.c
> --- a/mm/migrate.c~0006-node-Define-and-export-memory-migration-path
> 2021-01-25 16:23:09.553866709 -0800
> +++ b/mm/migrate.c2021-01-25 16:23:09.558866709
> On Jan 30, 2021, at 5:07 PM, Andy Lutomirski wrote:
>
> Adding Andrew Cooper, who has a distressingly extensive understanding
> of the x86 PTE magic.
>
> On Sat, Jan 30, 2021 at 4:16 PM Nadav Amit wrote:
>> From: Nadav Amit
>>
>> Currently, using mprotect() to unprotect a memory region or
On Sun, Jan 31, 2021 at 8:39 AM Vladimir Oltean wrote:
>
> Tobias has a point in a way too, you should get used to adding the
> 'master static' flags to your bridge fdb commands, otherwise weird
> things like this could happen. The faulty code can only be triggered
> when going through
On Mon, 25 Jan 2021, Dave Hansen wrote:
> This also contains a few prerequisite patches that fix up an issue
> with the vm.zone_reclaim_mode sysctl ABI.
>
I think these patches (patches 1-3) can be staged in -mm now since they
fix vm.zone_reclaim_mode correctness and consistency.
Andrew,
On Mon, 25 Jan 2021, Dave Hansen wrote:
>
> From: Dave Hansen
>
> RECLAIM_ZONE was assumed to be unused because it was never explicitly
> used in the kernel. However, there were a number of places where it
> was checked implicitly by checking 'node_reclaim_mode' for a zero
> value.
>
> These
> On Jan 30, 2021, at 4:39 PM, Andy Lutomirski wrote:
>
> On Sat, Jan 30, 2021 at 4:16 PM Nadav Amit wrote:
>> From: Nadav Amit
>>
>> There are currently (at least?) 5 different TLB batching schemes in the
>> kernel:
>>
>> 1. Using mmu_gather (e.g., zap_page_range()).
>>
>> 2. Using
Adding Andrew Cooper, who has a distressingly extensive understanding
of the x86 PTE magic.
On Sat, Jan 30, 2021 at 4:16 PM Nadav Amit wrote:
>
> From: Nadav Amit
>
> Currently, using mprotect() to unprotect a memory region or uffd to
> unprotect a memory region causes a TLB flush. At least on
On Thu, 28 Jan 2021, Michel Dänzer wrote:
> From: Michel Dänzer
>
> Without __GFP_NOWARN, attempts at allocating huge pages can trigger
> dmesg splats like below (which are essentially noise, since TTM falls
> back to normal pages if it can't get a huge one).
>
> [ 9556.710241] clinfo: page
On Sat, 30 Jan 2021, David Rientjes wrote:
> On Sun, 31 Jan 2021, Mikhail Gavrilov wrote:
>
> > The 5.11-rc5 (git 76c057c84d28) brought a new issue.
> > Now the kernel log is flooded with the message "page allocation failure".
> >
> > Trace:
> > msedge:cs0: page allocation failure: order:10,
>
On Sat, Jan 30, 2021 at 4:16 PM Nadav Amit wrote:
>
> From: Nadav Amit
>
> fullmm in mmu_gather is supposed to indicate that the mm is torn-down
> (e.g., on process exit) and can therefore allow certain optimizations.
> However, tlb_finish_mmu() sets fullmm, when in fact it want to say that
>
On Sun, 31 Jan 2021, Mikhail Gavrilov wrote:
> The 5.11-rc5 (git 76c057c84d28) brought a new issue.
> Now the kernel log is flooded with the message "page allocation failure".
>
> Trace:
> msedge:cs0: page allocation failure: order:10,
Order-10, wow!
ttm_pool_alloc() will start at order-10 and
-r013-20210130 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project
275c6af7d7f1ed63a03d05b4484413e447133269)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod
On Sat, Jan 30, 2021 at 09:37:55PM +0100, Bartosz Golaszewski wrote:
> On Fri, Jan 29, 2021 at 4:57 PM Andy Shevchenko
> wrote:
> >
> > On Fri, Jan 29, 2021 at 02:46:24PM +0100, Bartosz Golaszewski wrote:
> > > From: Bartosz Golaszewski
> > ...
> >
[snip]
> > Honestly, I don't like the idea of
On Sat, 2021-01-30 at 15:49 -0800, Guenter Roeck wrote:
> On 1/29/21 2:59 PM, Jarkko Sakkinen wrote:
> > On Tue, Jan 26, 2021 at 04:46:07PM +0100, Łukasz Majczak wrote:
> > > Hi Jarkko, Guenter
> > >
> > > Yes, here are the logs when failure occurs -
> > >
On Sun, Jan 31, 2021 at 1:37 AM Fāng-ruì Sòng wrote:
>
> On Sat, Jan 30, 2021 at 3:10 PM Sedat Dilek wrote:
> >
> > On Sat, Jan 30, 2021 at 1:44 AM Nick Desaulniers
> > wrote:
> > >
> > > DWARF v5 is the latest standard of the DWARF debug info format.
> > >
> > > Feature detection of DWARF5 is
On Sat, Jan 30, 2021 at 09:43:34PM +0800, DENG Qingfang wrote:
> Having multiple destination ports for a unicast address does not make
> sense.
> Make port_db_load_purge override existent unicast portvec instead of
> adding a new port bit.
>
> Fixes: 884729399260 ("net: dsa: mv88e6xxx: handle
On Sat, Jan 30, 2021 at 2:10 PM Mike Rapoport wrote:
>
> In either case, e820__memblock_setup() won't add the range 0x - 0x1000
> to memblock.memory and later during memory map initialization this range is
> left outside any zone.
Honestly, this just sounds like memblock being stupid in the
On Sat, Jan 30, 2021 at 4:16 PM Nadav Amit wrote:
>
> From: Nadav Amit
>
> There are currently (at least?) 5 different TLB batching schemes in the
> kernel:
>
> 1. Using mmu_gather (e.g., zap_page_range()).
>
> 2. Using {inc|dec}_tlb_flush_pending() to inform other threads on the
>ongoing
On Sat, Jan 30, 2021 at 3:10 PM Sedat Dilek wrote:
>
> On Sat, Jan 30, 2021 at 1:44 AM Nick Desaulniers
> wrote:
> >
> > DWARF v5 is the latest standard of the DWARF debug info format.
> >
> > Feature detection of DWARF5 is onerous, especially given that we've
> > removed $(AS), so we must query
On Sat, Jan 30, 2021 at 09:47:02PM +0100, Tobias Waldekranz wrote:
> root@envoy:~# bridge fdb add 02:00:de:ad:00:01 dev eth1 static vlan 1
> Why does the second add operation succeed? Am I missing some magic flag?
Yes, 'master'.
We talked about this before. 'bridge fdb add' is implicitly 'self'
Greg K-H wrote:
> our job is to make Linux work for everyone.
But as your refusal to accept the purely additive (zero impact on
anything other than specific hw in question) patch adding support for
a new hardware device clearly indicates, your job is NOT to make Linux
work for everyone, but
From: Nadav Amit
mm_cpumask() is volatile: a bit might be turned on or off at any given
moment, and it is not protected by any lock. While the kernel coding
guidelines are very prohibitive against the use of volatile, not marking
mm_cpumask() as volatile seems wrong.
Cpumask and bitmap
From: Nadav Amit
Detecting deferred TLB flushes per-VMA has two drawbacks:
1. It requires an atomic cmpxchg to record mm's TLB generation at the
time of the last TLB flush, as two deferred TLB flushes on the same VMA
can race.
2. It might be in coarse granularity for large VMAs.
On 64-bit
From: Nadav Amit
Introduce cpumask_atomic_or() and bitmask_atomic_or() to allow to
perform atomic or operations atomically on cpumasks. This will be used
by the next patch.
To be more efficient, skip atomic operations when no changes are needed.
Signed-off-by: Nadav Amit
Cc: Mel Gorman
Cc:
From: Nadav Amit
flush_tlb_batched_pending() appears to have a theoretical race:
tlb_flush_batched is being cleared after the TLB flush, and if in
between another core calls set_tlb_ubc_flush_pending() and sets the
pending TLB flush indication, this indication might be lost. Holding the
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