This patch fixes a coding style issue found by the checkpatch.pl tool in
amplc_dio200_common.c by removing the unnecessary parentheses around the
expression in a return statement.
Signed-off-by: Aapo Vienamo
---
drivers/staging/comedi/drivers/amplc_dio200_common.c | 2 +-
1 file changed, 1
On Thu, Dec 18, 2014 at 02:45:01PM -0800, Jeremiah Mahler wrote:
> Aapo,
>
> On Thu, Dec 18, 2014 at 05:32:52PM +0200, Aapo Vienamo wrote:
> > This patch fixes a coding style issue found by the checkpatch.pl tool in
> > amplc_dio200_common.c by removing the unnecessary p
On Fri, Dec 19, 2014 at 06:13:10AM -0800, Jeremiah Mahler wrote:
> Aapo,
>
> On Fri, Dec 19, 2014 at 12:37:16PM +0200, Aapo Vienamo wrote:
> > On Thu, Dec 18, 2014 at 02:45:01PM -0800, Jeremiah Mahler wrote:
> > > Aapo,
> > >
> > > On Thu, Dec 18, 20
From: Peter De-Schrijver
These clocks have low jitter paths to certain parents. To model these
correctly, use the sdmmc mux divider clock type.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/clk-id.h | 2
Add the missing linux/delay.h include statement for udelay() used by
fence_udelay() macro.
Signed-off-by: Aapo Vienamo
---
drivers/clk/tegra/clk.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index e1f8846..e3b9c22 100644
--- a/drivers
will be selected. Otherwise this clock behaves as a normal peripheral
clock.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/Makefile| 1 +
drivers/clk/tegra/clk-sdmmc-mux.c | 250
From: Peter De Schrijver
Move this to a separate file so it can be used to calculate the sdmmc
clock dividers.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/Makefile | 1 +
drivers/clk/tegra/clk-divider.c | 30
From: Peter De-Schrijver
These clocks have low jitter paths to certain parents. To model these
correctly, use the sdmmc mux divider clock type.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/clk-id.h | 2
Add the missing linux/delay.h include statement for udelay() used by
fence_udelay() macro.
Signed-off-by: Aapo Vienamo
---
drivers/clk/tegra/clk.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index e1f8846..e3b9c22 100644
--- a/drivers
includes for fence_udelay() in a separate patch
v2:
- Fix the type compatibility error on do_div
Aapo Vienamo (1):
clk: tegra: Fix includes required by fence_udelay()
Peter De Schrijver (1):
clk: tegra: refactor 7.1 div calculation
Peter De-Schrijver (2):
clk: tegra: Add sdmmc mux divider
will be selected. Otherwise this clock behaves as a normal peripheral
clock.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/Makefile| 1 +
drivers/clk/tegra/clk-sdmmc-mux.c | 250
From: Peter De Schrijver
Move this to a separate file so it can be used to calculate the sdmmc
clock dividers.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/Makefile | 1 +
drivers/clk/tegra/clk-divider.c | 30
Hi all,
The Tegra Power Management Controller (PMC) can set pad power states
and voltage configuration. This series implements pinctrl interfaces
for configuring said pad properties.
Aapo Vienamo (6):
soc/tegra: pmc: Fix pad voltage configuration for Tegra186
soc/tegra: pmc: Factor out DPD
Implement a function to query whether a pad is in deep power down mode.
Signed-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 17 +
include/soc/tegra/pmc.h | 1 +
2 files changed, 18 insertions(+)
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 83b39cd
Refactor the IO pad tables into macro tables so that they can be reused
to generate pinctrl pin descriptors. Also add a name field which is
needed by pinctrl.
Signed-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 231 ++--
1 file changed, 126
Factor out the the code to calculate the correct DPD register and bit
number for a given pad. This logic will be needed to query the status
register.
Signed-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a
Implement support for the PMC_IMPL_E_33V_PWR register which replaces
PMC_PWR_DET register interface of the SoC generations preceding
Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[]
table.
Signed-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 54
: Aapo Vienamo
---
.../bindings/arm/tegra/nvidia,tegra186-pmc.txt | 84 +++
.../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 95 ++
include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h | 18
3 files changed, 197 insertions(+)
create mode 100644
Register a pinctrl device and implement get and set functions for
PIN_CONFIG_LOW_POWER_MODE and PIN_CONFIG_POWER_SOURCE parameters.
Signed-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 192 +++-
1 file changed, 190 insertions(+), 2 deletions
On Wed, 11 Jul 2018 09:30:57 +0100
Jon Hunter wrote:
> On 10/07/18 13:47, Aapo Vienamo wrote:
> > Refactor the IO pad tables into macro tables so that they can be reused
> > to generate pinctrl pin descriptors. Also add a name field which is
> > needed by pinctrl.
> &g
On Wed, 11 Jul 2018 09:40:01 +0100
Jon Hunter wrote:
> On 10/07/18 13:54, Aapo Vienamo wrote:
> > Register a pinctrl device and implement get and set functions for
> > PIN_CONFIG_LOW_POWER_MODE and PIN_CONFIG_POWER_SOURCE parameters.
> >
> > Signed-off-by: Aapo Vienam
On Wed, 11 Jul 2018 10:46:21 +0100
Jon Hunter wrote:
> On 11/07/18 10:38, Aapo Vienamo wrote:
> > On Wed, 11 Jul 2018 09:40:01 +0100
> > Jon Hunter wrote:
> >
> >> On 10/07/18 13:54, Aapo Vienamo wrote:
> >>> Register a pinctrl devi
Implement support for the PMC_IMPL_E_33V_PWR register which replaces
PMC_PWR_DET register interface of the SoC generations preceding
Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[]
table and the AO_HV pad.
Signed-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 55
TEGRA_IO_PAD() and TEGRA_IO_PIN_DESC()
- Fix a typo in the dt-bindings docs
- Remove old pmc pad voltage configuration APIs
- Check return value of tegra_io_pad_find() in
tegra_io_pad_pinconf_get()/_set()
Aapo Vienamo (7):
soc/tegra: pmc: Fix pad voltage
Factor out the the code to calculate the correct DPD register and bit
number for a given pad. This logic will be needed to query the status
register.
Signed-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 20 +---
1 file changed, 17 insertions(+), 3
Implement a function to query whether a pad is in deep power down mode.
Signed-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 17 +
include/soc/tegra/pmc.h | 1 +
2 files changed, 18 insertions(+)
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc
Refactor the IO pad tables into macro tables so that they can be reused
to generate pinctrl pin descriptors. Also add a name field which is
needed by pinctrl.
Signed-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 233 ++--
1 file changed, 127
: Aapo Vienamo
Acked-by: Jon Hunter
---
.../bindings/arm/tegra/nvidia,tegra186-pmc.txt | 84 +++
.../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 95 ++
include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h | 18
3 files changed, 197 insertions
igned-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 17 -
include/soc/tegra/pmc.h | 13 -
2 files changed, 8 insertions(+), 22 deletions(-)
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index f68dbfa..8926831 100644
--- a/drivers/soc/tegra/pmc.c
Register a pinctrl device and implement get and set functions for
PIN_CONFIG_LOW_POWER_MODE and PIN_CONFIG_POWER_SOURCE parameters.
Signed-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 187 +++-
1 file changed, 185 insertions(+), 2 deletions
mux_non_lj_idx[] const
- Make tegra_clk_sdmmc_mux_ops static
- Fix the includes for fence_udelay() in a separate patch
v2:
- Fix the type compatibility error on do_div
Aapo Vienamo (1):
clk: tegra: Fix includes required by fence_udelay()
Peter De Schrijver (1):
clk: tegra
From: Peter De Schrijver
Move this to a separate file so it can be used to calculate the sdmmc
clock dividers.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/Makefile | 1 +
drivers/clk/tegra/clk-divider.c | 30
From: Peter De-Schrijver
These clocks have low jitter paths to certain parents. To model these
correctly, use the sdmmc mux divider clock type.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/clk-id.h | 2
will be selected. Otherwise this clock behaves as a normal peripheral
clock.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/Makefile| 1 +
drivers/clk/tegra/clk-sdmmc-mux.c | 249
Add the missing linux/delay.h include statement for udelay() used by
fence_udelay() macro.
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/clk.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index e1f8846
8 at 05:17:05PM +0100, Jon Hunter wrote:
> >>>>
> >>>> On 09/07/18 17:38, Aapo Vienamo wrote:
> >>>>> From: Peter De Schrijver
> >>>>>
> >>>>> Move this to a separate file so it can be used to calculate the sdmmc
> &
On Wed, 11 Jul 2018 16:26:42 +0100
Jon Hunter wrote:
> On 11/07/18 16:23, Jon Hunter wrote:
> >
> > On 11/07/18 15:01, Aapo Vienamo wrote:
> >> Implement a function to query whether a pad is in deep power down mode.
> > Can you elaborate on why this public func
will be selected. Otherwise this clock behaves as a normal peripheral
clock.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/Makefile| 1 +
drivers/clk/tegra/clk-sdmmc-mux.c | 251
From: Peter De Schrijver
Move this to a separate file so it can be used to calculate the sdmmc
clock dividers.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
Acked-by: Jon Hunter
---
drivers/clk/tegra/Makefile | 1 +
drivers/clk/tegra/clk
From: Peter De-Schrijver
These clocks have low jitter paths to certain parents. To model these
correctly, use the sdmmc mux divider clock type.
Signed-off-by: Peter De-Schrijver
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
---
drivers/clk/tegra/clk-id.h | 2
files
- Make mux_lj_idx[] and mux_non_lj_idx[] const
- Make tegra_clk_sdmmc_mux_ops static
- Fix the includes for fence_udelay() in a separate patch
v2:
- Fix the type compatibility error on do_div
Aapo Vienamo (1):
clk: tegra: Fix includes required by fence_udelay
Add the missing linux/delay.h include statement for udelay() used by
fence_udelay() macro.
Signed-off-by: Aapo Vienamo
Acked-by: Peter De Schrijver
Acked-by: Jon Hunter
---
drivers/clk/tegra/clk.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra
c pad voltage configuration APIs
- Check return value of tegra_io_pad_find() in
tegra_io_pad_pinconf_get()/_set()
Aapo Vienamo (7):
soc/tegra: pmc: Fix pad voltage configuration for Tegra186
soc/tegra: pmc: Factor out DPD register bit calculation
soc/tegra: pmc: Impl
Refactor the IO pad tables into macro tables so that they can be reused
to generate pinctrl pin descriptors. Also add a name field which is
needed by pinctrl.
Signed-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 233 ++--
1 file changed, 127
Register a pinctrl device and implement get and set functions for
PIN_CONFIG_LOW_POWER_MODE and PIN_CONFIG_POWER_SOURCE parameters.
Signed-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 187 +++-
1 file changed, 185 insertions(+), 2 deletions
Factor out the the code to calculate the correct DPD register and bit
number for a given pad. This logic will be needed to query the status
register.
Signed-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 20 +---
1 file changed, 17 insertions(+), 3
Implement a function to query whether a pad is in deep power down mode.
This will is needed by the pinctrl callbacks.
Signed-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/soc/tegra/pmc.c b
igned-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 17 -
include/soc/tegra/pmc.h | 19 ---
2 files changed, 8 insertions(+), 28 deletions(-)
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 38cb915..7d3c3de 100644
: Aapo Vienamo
Acked-by: Jon Hunter
---
.../bindings/arm/tegra/nvidia,tegra186-pmc.txt | 84 +++
.../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 95 ++
include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h | 18
3 files changed, 197 insertions
Implement support for the PMC_IMPL_E_33V_PWR register which replaces
PMC_PWR_DET register interface of the SoC generations preceding
Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[]
table and the AO_HV pad.
Signed-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
drivers/soc
Implement support for the PMC_IMPL_E_33V_PWR register which replaces
PMC_PWR_DET register interface of the SoC generations preceding
Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[]
table and the AO_HV pad.
Signed-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
drivers/soc
-off-by: Aapo Vienamo
Acked-by: Jon Hunter
Reviewed-by: Rob Herring
---
.../bindings/arm/tegra/nvidia,tegra186-pmc.txt | 92 ++
.../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 103 +
include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h | 18
3 files
Add bindings documentation for pad pull up and pull down offset values to be
programmed before executing automatic pad drive strength calibration.
Signed-off-by: Aapo Vienamo
---
.../bindings/mmc/nvidia,tegra20-sdhci.txt | 36 ++
1 file changed, 36 insertions
Factor out the the code to calculate the correct DPD register and bit
number for a given pad. This logic will be needed to query the status
register.
Signed-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 20 +---
1 file changed, 17 insertions(+), 3
Implement a function to query whether a pad is in deep power down mode.
This will is needed by the pinctrl callbacks.
Signed-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/soc/tegra/pmc.c b
Refactor the IO pad tables into macro tables so that they can be reused
to generate pinctrl pin descriptors. Also add a name field which is
needed by pinctrl.
Signed-off-by: Aapo Vienamo
---
drivers/soc/tegra/pmc.c | 233 ++--
1 file changed, 127
igned-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 17 -
include/soc/tegra/pmc.h | 19 ---
2 files changed, 8 insertions(+), 28 deletions(-)
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 38cb915..979f4b4 100644
Configure the voltage reference used by the automatic pad drive strength
calibration procedure. The value is a magic number from the TRM.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 56 +-
1 file changed, 33 insertions(+), 23
Implement polling with 10 ms timeout for automatic pad drive strength
calibration.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci
Automatic pad drive strength calibration is performed on a separate pad
identical to the ones used for driving the actual bus. Power on the
calibration pad during the calibration procedure and power it off
afterwards to save power.
Signed-off-by: Aapo Vienamo
Reviewed-by: Mikko Perttunen
Add a new sdhci_ops struct for Tegra210 and Tegra186 which doesn't
set the custom tuning callback used on previous SoC generations.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/driver
Register a pinctrl device and implement get and set functions for
PIN_CONFIG_LOW_POWER_MODE and PIN_CONFIG_POWER_SOURCE parameters.
Signed-off-by: Aapo Vienamo
Acked-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 187 +++-
1 file changed, 185
Disable the card clock during automatic pad drive strength calibration
and re-enable it afterwards.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host
for Tegra210 and Tegra186.
The pad configuration is done in the mmc callback because the order of
pad reconfiguration and sdhci voltage switch depend on the voltage to
which the transition occurs.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 138
Add SDHCI_QUIRK2_TUNE_SKIP_XFERRMODE_REG_PROG to skip programming the
SDHCI_TRANSFER_MODE in sdhci_set_transfer_mode() if tuning command is
being sent.
On Tegra210 and Tegra186 the tuning sequence hangs if the SDHCI
transfer mode register is touched.
Signed-off-by: Aapo Vienamo
---
drivers/mmc
Parse the pad drive strength calibration offsets from the device tree.
Program the calibration offsets in accordance with the current signaling
mode.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 152 -
1 file changed, 151 insertions
Run the automatic pad calibration after voltage switching if
tegra_host->pad_calib_required is set.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
in
Set NVQUIRK_HAS_PADCALIB on Tegra210 and Tegra186 to enable automatic
pad drive strength calibration.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci
.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci.c | 15 +++
drivers/mmc/host/sdhci.h | 2 ++
2 files changed, 17 insertions(+)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 04dc443..166b16f 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host
Set the default inbound timing adjustment tap value on reset and on
non-tunable modes.
The default tap value is not programmed on tunable modes because the
tuning sequence is used instead to determine the tap value.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 131
Add quirk to disable the card clock during configuration of the tap
value in tegra_sdhci_set_tap() and issue sdhci_reset() after value
change. This is a workaround to avoid propagation of a potential
glitch caused by setting the tap value.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci
Parse the default inbound and outbound sampling trimmer values from
the device tree.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index
Set SDHCI_QUIRK2_TUNE_SKIP_XFERMODE_REG_PROG on Tegra210 and Tegra186.
This prevents the controller from hanging during tuning. This bug does
not seem to be documented but it's handled in a similar way in the
downstream kernel.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.
Program the outbound sampling trim value in tegra_sdhci_reset(). Unlike
the outbound tap value this does not depend on the signaling mode and
needs to be only programmed once.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion
Add pad voltage configuration nodes for sdmmc pads with configurable
voltages on Tegra210.
Signed-off-by: Aapo Vienamo
Reviewed-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 27 +++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts
This prevents a possible hardware hang during tuning.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 6daee7e..2e07dcd 100644
--- a/drivers
applies.
Signed-off-by: Aapo Vienamo
Reviewed-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
Document the pinctrl bindings used by the SDHCI driver to reconfigure
pad voltages on controllers supporting multiple voltage levels.
Signed-off-by: Aapo Vienamo
Reviewed-by: Mikko Perttunen
Reviewed-by: Rob Herring
---
.../bindings/mmc/nvidia,tegra20-sdhci.txt | 22
Allow sdmmc1 to set the signaling voltage to 1.8 V in order to support
faster signaling modes.
Signed-off-by: Aapo Vienamo
---
arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
b/arch/arm64/boot/dts
Set nvquirks to enable higher speed modes.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 2e07dcd..03a6bf7 100644
--- a/drivers/mmc/host
Add pad voltage configuration nodes for sdmmc pads with configurable
voltages on Tegra186.
Signed-off-by: Aapo Vienamo
Reviewed-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 40
1 file changed, 40 insertions(+)
diff --git a/arch/arm64/boot
On p2180 sdmmc4 is powered from a fixed 1.8 V regulator.
Signed-off-by: Aapo Vienamo
Reviewed-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
b/arch/arm64/boot/dts/nvidia
- Only call udelay(1) on enable in tegra_sdhci_configure_cal_pad()
- Add nvidia, prefix to pad autocal offset dt props in the example
See the original patch sets for earlier changelogs.
Aapo Vienamo (40):
dt-bindings: Add Tegra PMC pad configuration bindings
dt-bindings: mmc: tegra: Add pad voltage con
Set nvquirks to enable higher speed modes.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 03a6bf7..7f1ac4a 100644
--- a/drivers/mmc/host
Configure sdmmc4 parent clock to pllc4 and sdmmc1 to pllp_out0 by
setting the assigned-clocks device tree properties. pllc4 offer
better jitter performance and should be used with higher speed
modes like HS200 and HS400.
Signed-off-by: Aapo Vienamo
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi
Add the calibration offset properties used for automatic pad drive
strength calibration.
Signed-off-by: Aapo Vienamo
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
b/arch/arm64/boot/dts
Use assigned-clock properties to configure pllc4 as the parent clock
for sdmmc4 on Tegra210. pllc4 offers better jitter perfomance than
the default pllp and is required by HS200 and HS400 modes.
Signed-off-by: Aapo Vienamo
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 8
1 file
Add the calibration offset properties used for automatic pad drive
strength calibration.
Signed-off-by: Aapo Vienamo
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot
Add SDHCI inbound and outbound SDHCI sampling trimmer values for
Tegra210.
Signed-off-by: Aapo Vienamo
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
Add SDHCI inbound and outbound SDHCI sampling trimmer values for
Tegra186.
Signed-off-by: Aapo Vienamo
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
Document the Tegra SDHCI inbound and outbound sampling trimmer values.
Signed-off-by: Aapo Vienamo
---
.../devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 11 +++
1 file changed, 11 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
b
Hi all,
This series implements support for HS400 signaling on Tegra210 and
Tegra186. This includes programming the DQS trimmer values, implementing
enhanced strobe and HS400 delay line calibration.
This series depends on the "Tegra SDHCI add support for HS200 and UHS
signaling" ser
Document HS400 DQS trim value device tree property.
Signed-off-by: Aapo Vienamo
---
Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
b/Documentation/devicetree
Parse and program the HS400 DQS trim value from dt. Program a fallback
value in case the property is missing.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 32 +---
1 file changed, 29 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host
Implement HS400 specific delay line calibration procedure.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index d81143b..d0b68b7
Implement HS400 enhanced strobe.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 426f7ea..d81143b 100644
--- a/drivers/mmc/host/sdhci
Add the HS400 DQS trim value for Tegra186 SDMMC4.
Signed-off-by: Aapo Vienamo
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 6e9ef26..9e07bc6 100644
--- a
Add the HS400 DQS trim value for Tegra210 SDMMC4.
Signed-off-by: Aapo Vienamo
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 14da98a..f8e5f09 100644
--- a
Enable HS400 signaling on Tegra186 SDMMC4 controller.
Signed-off-by: Aapo Vienamo
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 9e07bc6..2f3c8e2 100644
Enable HS400 signaling on Tegra210 SDMMC4 controller.
Signed-off-by: Aapo Vienamo
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index f8e5f09..8fe47d6 100644
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