- Original Message -
> From: "Giulio Benetti"
> Sent: Friday, June 1, 2018 7:40:19 AM
> RS485 can modify mctrl on startup, especially when RTS_AFTER_SEND is on
> TIOCM_RTS is set, then need to keep it set when registering port.
>
> Copy mctrl to new port too.
>
> Signed-off-by: Giulio
- Original Message -
> From: "Giulio Benetti"
> Sent: Friday, June 1, 2018 7:40:19 AM
> RS485 can modify mctrl on startup, especially when RTS_AFTER_SEND is on
> TIOCM_RTS is set, then need to keep it set when registering port.
>
> Copy mctrl to new port too.
>
> Signed-off-by: Giulio
future) or the individual bit level (giving a
time in the past). We catch both these cases by reading until we get
two equal or consecutive values. After five unsuccessful attempts we
give up.
Signed-off-by: Thomas VanSelus <tvanse...@xes-inc.com>
Signed-off-by: Aaron Sierra <asie...@xes-inc.com>
(giving a
time in the past). We catch both these cases by reading until we get
two equal or consecutive values. After five unsuccessful attempts we
give up.
Signed-off-by: Thomas VanSelus
Signed-off-by: Aaron Sierra
---
drivers/misc/ds1682.c | 19 ++-
1 file changed, 18 insertions
This patch leverages the fact that all DS1682 registers are unsigned to
merge two return paths into one. It also introduces val_le as used in
ds1682_store() to merge two endianness conversions into one.
Signed-off-by: Aaron Sierra <asie...@xes-inc.com>
---
drivers/misc/ds1682.
This patch leverages the fact that all DS1682 registers are unsigned to
merge two return paths into one. It also introduces val_le as used in
ds1682_store() to merge two endianness conversions into one.
Signed-off-by: Aaron Sierra
---
drivers/misc/ds1682.c | 18 +-
1 file
gt; possible without fear of overflow, and elsewhere it just makes life a
> little more straightforward.
>
> Reported-by: Aaron Sierra <asie...@xes-inc.com>
> Signed-off-by: Robin Murphy <robin.mur...@arm.com>
> ---
>
> I've now run this through some more targeted
ear of overflow, and elsewhere it just makes life a
> little more straightforward.
>
> Reported-by: Aaron Sierra
> Signed-off-by: Robin Murphy
> ---
>
> I've now run this through some more targeted testing, and I'm
> confident that it works as intended - Aaron, can you
- Original Message -
> From: "Rafael J. Wysocki" <r...@rjwysocki.net>
> Sent: Thursday, December 1, 2016 5:27:03 PM
> On Thursday, December 01, 2016 05:16:00 PM Aaron Sierra wrote:
>> - Original Message -
>> > From: "Thomas Gleix
- Original Message -
> From: "Rafael J. Wysocki"
> Sent: Thursday, December 1, 2016 5:27:03 PM
> On Thursday, December 01, 2016 05:16:00 PM Aaron Sierra wrote:
>> - Original Message -
>> > From: "Thomas Gleixner"
>> > Sent:
- Original Message -
> From: "Thomas Gleixner" <t...@linutronix.de>
> Sent: Thursday, December 1, 2016 5:21:20 PM
> On Thu, 1 Dec 2016, Aaron Sierra wrote:
>> - Original Message -
>> > From: "Thomas Gleixner" <t...@linutronix
- Original Message -
> From: "Thomas Gleixner"
> Sent: Thursday, December 1, 2016 5:21:20 PM
> On Thu, 1 Dec 2016, Aaron Sierra wrote:
>> - Original Message -
>> > From: "Thomas Gleixner"
>> > Sent: Thursday, December 1, 2016
- Original Message -
> From: "Thomas Gleixner" <t...@linutronix.de>
> Sent: Thursday, December 1, 2016 8:52:48 AM
> On Wed, 30 Nov 2016, Aaron Sierra wrote:
>> When testing GPE interrupts with CONFIG_PREEMPT_RT_FULL enabled, a
>> verbose WARN_ONCE
- Original Message -
> From: "Thomas Gleixner"
> Sent: Thursday, December 1, 2016 8:52:48 AM
> On Wed, 30 Nov 2016, Aaron Sierra wrote:
>> When testing GPE interrupts with CONFIG_PREEMPT_RT_FULL enabled, a
>> verbose WARN_ONCE message would print t
/0xe8
---[ end trace 0002 ]---
Signed-off-by: Aaron Sierra <asie...@xes-inc.com>
---
drivers/acpi/acpica/acglobal.h | 2 +-
drivers/acpi/acpica/evgpe.c | 15 +++
drivers/acpi/acpica/evgpeblk.c | 8
drivers/acpi/acpica/evgpeutil.c | 12 ++--
d
/0xe8
---[ end trace 0002 ]---
Signed-off-by: Aaron Sierra
---
drivers/acpi/acpica/acglobal.h | 2 +-
drivers/acpi/acpica/evgpe.c | 15 +++
drivers/acpi/acpica/evgpeblk.c | 8
drivers/acpi/acpica/evgpeutil.c | 12 ++--
drivers/acpi/acpica/evsci.c
- Original Message -
> From: "Lee Jones"
> Sent: Tuesday, September 22, 2015 7:31:19 PM
>
> On Tue, 22 Sep 2015, Aaron Sierra wrote:
>
> > The lpc_ich_cells array gives the wrong impression about the
> > relationship between the watchdog and
- Original Message -
> From: "Lee Jones" <lee.jo...@linaro.org>
> Sent: Tuesday, September 22, 2015 7:31:19 PM
>
> On Tue, 22 Sep 2015, Aaron Sierra wrote:
>
> > The lpc_ich_cells array gives the wrong impression about the
> > relatio
is no longer needed.
Signed-off-by: Aaron Sierra
---
v2 - rebase onto 4.3-rc2
drivers/mfd/lpc_ich.c | 42 ++
1 file changed, 18 insertions(+), 24 deletions(-)
diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
index c5a9a08..b514f3c 100644
is no longer needed.
Signed-off-by: Aaron Sierra <asie...@xes-inc.com>
---
v2 - rebase onto 4.3-rc2
drivers/mfd/lpc_ich.c | 42 ++
1 file changed, 18 insertions(+), 24 deletions(-)
diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
index c
- Original Message -
> From: "Lee Jones"
> Sent: Saturday, September 19, 2015 5:16:06 AM
>
> On Thu, 03 Sep 2015, Aaron Sierra wrote:
>
> > The lpc_ich_cells array gives the wrong impression about the
> > relationship between the watchdog and
- Original Message -
> From: "Lee Jones" <lee.jo...@linaro.org>
> Sent: Saturday, September 19, 2015 5:16:06 AM
>
> On Thu, 03 Sep 2015, Aaron Sierra wrote:
>
> > The lpc_ich_cells array gives the wrong impression about the
> > relatio
is no longer needed.
Signed-off-by: Aaron Sierra
---
drivers/mfd/lpc_ich.c | 42 ++
1 file changed, 18 insertions(+), 24 deletions(-)
diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
index 8de3439..7a01d430 100644
--- a/drivers/mfd/lpc_ich.c
+++ b
is no longer needed.
Signed-off-by: Aaron Sierra <asie...@xes-inc.com>
---
drivers/mfd/lpc_ich.c | 42 ++
1 file changed, 18 insertions(+), 24 deletions(-)
diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
index 8de3439..7a01d430 100644
--- a/d
- Original Message -
> From: "Guenter Roeck"
> Sent: Wednesday, July 29, 2015 11:38:08 AM
>
> On 07/29/2015 09:20 AM, Aaron Sierra wrote:
> >> From: "Lee Jones"
> >> Sent: Wednesday, July 29, 2015 10:32:26 AM
> >>
> >
> From: "Lee Jones"
> Sent: Wednesday, July 29, 2015 10:32:26 AM
>
> On Wed, 29 Jul 2015, Aaron Sierra wrote:
>
> > > From: "Lee Jones"
> > > Sent: Wednesday, July 29, 2015 2:38:41 AM
> > >
> > > On Tue, 28 Jul 2015, A
> From: "Lee Jones"
> Sent: Wednesday, July 29, 2015 2:38:41 AM
>
> On Tue, 28 Jul 2015, Aaron Sierra wrote:
>
> > > > > > @@ -933,7 +956,7 @@ gpe0_done:
> > > > > > lpc_chipset_info[priv->chipse
- Original Message -
From: Guenter Roeck li...@roeck-us.net
Sent: Wednesday, July 29, 2015 11:38:08 AM
On 07/29/2015 09:20 AM, Aaron Sierra wrote:
From: Lee Jones lee.jo...@linaro.org
Sent: Wednesday, July 29, 2015 10:32:26 AM
On Wed, 29 Jul 2015, Aaron Sierra wrote:
From
From: Lee Jones lee.jo...@linaro.org
Sent: Wednesday, July 29, 2015 10:32:26 AM
On Wed, 29 Jul 2015, Aaron Sierra wrote:
From: Lee Jones lee.jo...@linaro.org
Sent: Wednesday, July 29, 2015 2:38:41 AM
On Tue, 28 Jul 2015, Aaron Sierra wrote:
@@ -933,7 +956,7
From: Lee Jones lee.jo...@linaro.org
Sent: Wednesday, July 29, 2015 2:38:41 AM
On Tue, 28 Jul 2015, Aaron Sierra wrote:
@@ -933,7 +956,7 @@ gpe0_done:
lpc_chipset_info[priv-chipset].use_gpio = ret;
lpc_ich_enable_gpio_space(dev
> > > > @@ -933,7 +956,7 @@ gpe0_done:
> > > > lpc_chipset_info[priv->chipset].use_gpio = ret;
> > > > lpc_ich_enable_gpio_space(dev);
> > > >
> > > > - lpc_ich_finalize_cell(dev, _ich_cells[LPC_GPIO]);
> > > > + lpc_ich_finalize_gpio_cell(dev);
> > > > ret =
@@ -933,7 +956,7 @@ gpe0_done:
lpc_chipset_info[priv-chipset].use_gpio = ret;
lpc_ich_enable_gpio_space(dev);
- lpc_ich_finalize_cell(dev, lpc_ich_cells[LPC_GPIO]);
+ lpc_ich_finalize_gpio_cell(dev);
ret = mfd_add_devices(dev-dev,
- Original Message -
> From: "Nicholas Mc Guire"
> Sent: Wednesday, April 1, 2015 9:24:44 AM
>
> On Wed, 01 Apr 2015, Aaron Sierra wrote:
>
> > - Original Message -
> > > From: "Nicholas Mc Guire"
> > > Sent: Friday,
- Original Message -
> From: "Nicholas Mc Guire"
> Sent: Friday, March 13, 2015 6:23:47 AM
>
> This is only an API consolidation and should make things more readable
> it replaces var * HZ / 1000 by msecs_to_jiffies(var) which helps readability
> and also handles all corner-cases
- Original Message -
From: Nicholas Mc Guire hof...@osadl.org
Sent: Friday, March 13, 2015 6:23:47 AM
This is only an API consolidation and should make things more readable
it replaces var * HZ / 1000 by msecs_to_jiffies(var) which helps readability
and also handles all corner-cases
- Original Message -
From: Nicholas Mc Guire der.h...@hofr.at
Sent: Wednesday, April 1, 2015 9:24:44 AM
On Wed, 01 Apr 2015, Aaron Sierra wrote:
- Original Message -
From: Nicholas Mc Guire hof...@osadl.org
Sent: Friday, March 13, 2015 6:23:47 AM
This is only
- Original Message -
> From: "DaeSeok Youn"
> Sent: Wednesday, March 26, 2014 8:47:51 PM
>
> 2014-03-27 3:51 GMT+09:00 Aaron Sierra :
> > - Original Message -
> >> From: "Daeseok Youn"
> >> Sent: Tuesday, March 25, 2014 10
- Original Message -
From: DaeSeok Youn daeseok.y...@gmail.com
Sent: Wednesday, March 26, 2014 8:47:51 PM
2014-03-27 3:51 GMT+09:00 Aaron Sierra asie...@xes-inc.com:
- Original Message -
From: Daeseok Youn daeseok.y...@gmail.com
Sent: Tuesday, March 25, 2014 10:01:48 PM
- Original Message -
> From: "Daeseok Youn"
> Sent: Tuesday, March 25, 2014 10:01:48 PM
> Subject: [PATCH] staging: vme: fix memory leak in vme_user_probe()
>
>
> If vme_master_request() returns NULL when it failed,
> it need to free buffers for master.
>
> And also removes unreachable
- Original Message -
From: Daeseok Youn daeseok.y...@gmail.com
Sent: Tuesday, March 25, 2014 10:01:48 PM
Subject: [PATCH] staging: vme: fix memory leak in vme_user_probe()
If vme_master_request() returns NULL when it failed,
it need to free buffers for master.
And also removes
CONFIG_LOWMEM_CAM_NUM was unnecessarily restricted to one fewer than
NUM_TLBCAMS. However, all comparisons to CONFIG_LOWMEM_CAM_NUM are
"less than" tests, so comparing 0-based CAM indexes to the maximum
number of CAMs is safe.
Signed-off-by: Aaron Sierra
---
arch/powerpc/mm/fsl_b
-by: Aaron Sierra
---
arch/powerpc/mm/fsl_booke_mmu.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index 92685d8..44378ac 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
-by: Aaron Sierra asie...@xes-inc.com
---
arch/powerpc/mm/fsl_booke_mmu.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index 92685d8..44378ac 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm
CONFIG_LOWMEM_CAM_NUM was unnecessarily restricted to one fewer than
NUM_TLBCAMS. However, all comparisons to CONFIG_LOWMEM_CAM_NUM are
less than tests, so comparing 0-based CAM indexes to the maximum
number of CAMs is safe.
Signed-off-by: Aaron Sierra asie...@xes-inc.com
---
arch/powerpc/mm
- Original Message -
> From: "Aaron Sierra"
> To: "Samuel Ortiz"
> Cc: "LKML"
> Sent: Thursday, February 14, 2013 11:35:04 AM
> Subject: [PATCH] lpc_ich: use devres API to allocate private data
>
>
> Signed-off-by: Aaron Sierra
&g
- Original Message -
From: Aaron Sierra asie...@xes-inc.com
To: Samuel Ortiz sa...@linux.intel.com
Cc: LKML linux-kernel@vger.kernel.org
Sent: Thursday, February 14, 2013 11:35:04 AM
Subject: [PATCH] lpc_ich: use devres API to allocate private data
Signed-off-by: Aaron Sierra
Signed-off-by: Aaron Sierra
---
drivers/mfd/lpc_ich.c |7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
index a0cfdf9..1264b68 100644
--- a/drivers/mfd/lpc_ich.c
+++ b/drivers/mfd/lpc_ich.c
@@ -878,7 +878,8 @@ static int
Signed-off-by: Aaron Sierra asie...@xes-inc.com
---
drivers/mfd/lpc_ich.c |7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
index a0cfdf9..1264b68 100644
--- a/drivers/mfd/lpc_ich.c
+++ b/drivers/mfd/lpc_ich.c
@@ -878,7
> On Thu, Jan 24, 2013 at 02:52:39PM -0600, Aaron Sierra wrote:
> > In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found
> > at
> > offsets 0x58 and 0x5C, respectively. This patch allows GPIO access
> > to
> > properly be enabled (and disabled) for th
On Thu, Jan 24, 2013 at 02:52:39PM -0600, Aaron Sierra wrote:
In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found
at
offsets 0x58 and 0x5C, respectively. This patch allows GPIO access
to
properly be enabled (and disabled) for these chipsets.
Signed-off-by: Agócs Pál
> On Fri, 2013-01-25 at 14:25 +0100, Paul Bolle wrote:
> > 0) insmod-ing an updated lpc_ich.ko generated quite a bit of noise
> > in
> > dmesg:
> > <6>[19913.247530] iTCO_wdt: Found a ICH8M-E TCO device
> > (Version=2, TCOBASE=0x1060)
> > <6>[19913.249310] iTCO_wdt: initialized.
On Fri, 2013-01-25 at 14:25 +0100, Paul Bolle wrote:
0) insmod-ing an updated lpc_ich.ko generated quite a bit of noise
in
dmesg:
6[19913.247530] iTCO_wdt: Found a ICH8M-E TCO device
(Version=2, TCOBASE=0x1060)
6[19913.249310] iTCO_wdt: initialized. heartbeat=30 sec
In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at
offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to
properly be enabled (and disabled) for these chipsets.
Signed-off-by: Agócs Pál
Signed-off-by: Aaron Sierra
---
drivers/mfd/lpc_ich.c | 109
In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at
offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to
properly be enabled (and disabled) for these chipsets.
Signed-off-by: Agócs Pál agocs.pal...@gmail.com
Signed-off-by: Aaron Sierra asie...@xes-inc.com
In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at
offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to
properly be enabled (and disabled) for these chipsets.
Signed-off-by: Agócs Pál
Signed-off-by: Aaron Sierra
---
drivers/mfd/lpc_ich.c | 40
> > #define ACPIBASE_GCS_END 0x3414
> >
> > #define GPIOBASE 0x48
> > +#define GPIOBASE_ICH5 0x58
> > #define GPIOCTRL 0x4C
> > +#define GPIOCTRL_ICH5 0x58
> >
> > #define RCBABASE 0xf0
>
> Aaron,
> A like this corrected patch and
On 01/15/2013 01:12 PM, Aaron Sierra wrote:
static int lpc_ich_acpi_save = -1;
static int lpc_ich_gpio_save = -1;
+static unsigned long lpc_ich_chipset = -1;
All,
Any concerns apart from my nonsense of assigning -1 to an unsigned type?
Agócs,
Does this patch still perform as you expect
In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at
offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to
properly be enabled (and disabled) for these chipsets.
Signed-off-by: Agócs Pál
Signed-off-by: Aaron Sierra
---
drivers/mfd/lpc_ich.c | 40
> In ICH5 and before the GPIOBASE and GPIOCTRL are 0x58 and 0x5C. This
> patch updates lpc_ich.c that supports ICH5 and before GPIO. This
> patch
> fix the "I/O space for GPIO uninitialized" message.
> Reference: 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R)
> documents from
In ICH5 and before the GPIOBASE and GPIOCTRL are 0x58 and 0x5C. This
patch updates lpc_ich.c that supports ICH5 and before GPIO. This
patch
fix the I/O space for GPIO uninitialized message.
Reference: 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R)
documents from developer.intel.com.
In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at
offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to
properly be enabled (and disabled) for these chipsets.
Signed-off-by: Agócs Pál agocs.pal...@gmail.com
Signed-off-by: Aaron Sierra asie...@xes-inc.com
On 01/15/2013 01:12 PM, Aaron Sierra wrote:
static int lpc_ich_acpi_save = -1;
static int lpc_ich_gpio_save = -1;
+static unsigned long lpc_ich_chipset = -1;
All,
Any concerns apart from my nonsense of assigning -1 to an unsigned type?
Agócs,
Does this patch still perform as you expect
#define ACPIBASE_GCS_END 0x3414
#define GPIOBASE 0x48
+#define GPIOBASE_ICH5 0x58
#define GPIOCTRL 0x4C
+#define GPIOCTRL_ICH5 0x58
#define RCBABASE 0xf0
Aaron,
A like this corrected patch and a little fix that
In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at
offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to
properly be enabled (and disabled) for these chipsets.
Signed-off-by: Agócs Pál agocs.pal...@gmail.com
Signed-off-by: Aaron Sierra asie...@xes-inc.com
> v2: post-decrement to match existing style
> retitle patch subject
>
> drivers/mfd/lpc_ich.c | 3 +++
> 1 file changed, 3 insertions(+)
Acked-by: Aaron Sierra
You could make Samuel's job easier by sending a new e-mail
with the latest patch and the correct subject in the e
> The older southbridges supported by the lpc_ich driver do not
> provide memory-mapped space of the root complex. The driver
> correctly avoids computing the iomem address in this case, yet
> submits a zeroed resource request anyway (via mfd_add_devices()).
>
> Remove the iomem resource from the
The older southbridges supported by the lpc_ich driver do not
provide memory-mapped space of the root complex. The driver
correctly avoids computing the iomem address in this case, yet
submits a zeroed resource request anyway (via mfd_add_devices()).
Remove the iomem resource from the
v2: post-decrement to match existing style
retitle patch subject
drivers/mfd/lpc_ich.c | 3 +++
1 file changed, 3 insertions(+)
Acked-by: Aaron Sierra asie...@xes-inc.com
You could make Samuel's job easier by sending a new e-mail
with the latest patch and the correct subject in the e
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