s and some
common sysfs attributes.
Signed-off-by: Alexander Shishkin
---
.../ABI/testing/sysfs-bus-intel_th-output-devices | 13 +
Documentation/trace/intel_th.txt | 99 +++
drivers/Kconfig| 2 +
drivers/Mak
some of the parameters of its output ports,
called "outputs". Via these the user can set up data retention policy for
an individual output port or check if it is in reset state.
Signed-off-by: Alexander Shishkin
---
.../ABI/testing/sysfs-bus-intel_th-devices-gt
This patch adds basic support for PCI-based Intel TH devices. It requests
2 bars (configuration registers for the subdevices and STH channel MMIO
region) and calls into Intel TH core code to create the bus with subdevices
etc.
Signed-off-by: Alexander Shishkin
---
drivers/intel_th/Kconfig | 9
This is a simple stm_source class device driver (kernelspace stm trace
source) that registers a console and sends kernel messages over STM
devices.
Cc: Pratik Patel
Cc: Mathieu Poirier
Signed-off-by: Alexander Shishkin
---
drivers/stm/Kconfig | 10 +++
drivers/stm/Makefile | 2
Software Trace Hub (STH) is a trace source device in the Intel TH
architecture, it generates data that then goes through the switch into
one or several output ports.
STH collects data from software sources using the stm device class
abstraction.
Signed-off-by: Alexander Shishkin
---
drivers
This is a simple module that pretends to be an stm device and discards
all the data that comes in. Useful for testing stm class and its users.
Cc: Pratik Patel
Cc: Mathieu Poirier
Signed-off-by: Alexander Shishkin
---
drivers/stm/Kconfig | 9
drivers/stm/Makefile| 2
Add myself as a maintainer for the stm class framework.
Signed-off-by: Alexander Shishkin
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index eaf999638a..dc5429cd6f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8515,6 +8515,14 @@ S
connected to an stm device at run time.
Cc: linux-...@vger.kernel.org
Cc: Pratik Patel
Cc: Mathieu Poirier
Signed-off-by: Alexander Shishkin
---
Documentation/ABI/testing/configfs-stp-policy| 44 ++
Documentation/ABI/testing/sysfs-class-stm| 14 +
Documentation/ABI/testing/s
el-th-developer-manual.pdf
Alexander Shishkin (11):
stm class: Introduce an abstraction for System Trace Module devices
MAINTAINERS: add an entry for System Trace Module device class
stm class: dummy_stm: Add dummy driver for testing stm class
stm class: stm_console: Add kernel-console-
ff-by: Alexander Shishkin
---
arch/x86/kernel/cpu/Makefile | 2 +-
arch/x86/kernel/cpu/perf_event.h | 7 +
arch/x86/kernel/cpu/perf_event_intel.c | 6 +-
arch/x86/kernel/cpu/perf_event_intel_bts.c | 525 +
arch/x86/kerne
ff-by: Alexander Shishkin
---
arch/x86/include/uapi/asm/msr-index.h | 18 +
arch/x86/kernel/cpu/Makefile |1 +
arch/x86/kernel/cpu/intel_pt.h| 131
arch/x86/kernel/cpu/perf_event.h |2 +
arch/x86/kernel/cpu/perf_event_intel.c|8 +
arch/x86/k
capability that indicates such constraint on event
creation.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 2 +
kernel/events/core.c | 119 -
2 files changed, 119 insertions(+), 2 deletions(-)
diff --git a/include/linux
On 29 January 2015 at 17:20, Peter Zijlstra wrote:
> On Thu, Jan 29, 2015 at 05:03:21PM +0200, Alexander Shishkin wrote:
>> > We're already holding ctx->mutex, this should have made lockdep scream.
>>
>> As I mentioned offline, cpuctx->ctx.mutex is set to a lock
On 29 January 2015 at 13:59, Peter Zijlstra wrote:
> I think that logic fails for per-task events that have a cpu set.
True.
>> +static bool exclusive_event_ok(struct perf_event *event,
>> +struct perf_event_context *ctx)
>> +{
>> + struct pmu *pmu = event->pmu;
>
s an atomic counter to struct pmu to account for
per-task events.
If this looks all right to you, I can resend the patchset.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 1 +
kernel/events/core.c | 87 ++
2 files changed, 81
Alexander Shishkin writes:
> Peter Zijlstra writes:
>
>> On Wed, Jan 14, 2015 at 02:18:21PM +0200, Alexander Shishkin wrote:
>>> +static __init int pt_init(void)
>>> +{
>>
>>> + pt_pmu.pmu.attr_groups = pt_attr_groups;
>>> + pt_pmu.pm
Peter Zijlstra writes:
> On Wed, Jan 14, 2015 at 02:18:21PM +0200, Alexander Shishkin wrote:
>> +static __init int pt_init(void)
>> +{
>
>> +pt_pmu.pmu.attr_groups = pt_attr_groups;
>> +pt_pmu.pmu.task_ctx_nr = perf_hw_context;
>
> I just noticed
ll have to skip forward to the nearest sched_switch
to figure out which task it was, then go back to the actual trace to
decode it) and it completely misses the case when the tracing is enabled
and disabled before sched_switch, for example, via PERF_EVENT_IOC_DISABLE.
Signed-off-by: Alexande
Alexander Shishkin writes:
> * added a comment for the ITRACE_START record.
...and I messed it up so the last change didn't make it,
apologies. Should I resend the whole series as v10, for consistency?
Regards,
--
Alex
--
To unsubscribe from this list: send the line "unsubscribe
ff-by: Alexander Shishkin
---
arch/x86/kernel/cpu/Makefile | 2 +-
arch/x86/kernel/cpu/perf_event.h | 7 +
arch/x86/kernel/cpu/perf_event_intel.c | 6 +-
arch/x86/kernel/cpu/perf_event_intel_bts.c | 525 +
arch/x86/kerne
ff-by: Alexander Shishkin
---
arch/x86/include/uapi/asm/msr-index.h | 18 +
arch/x86/kernel/cpu/Makefile |1 +
arch/x86/kernel/cpu/intel_pt.h| 131
arch/x86/kernel/cpu/perf_event.h |2 +
arch/x86/kernel/cpu/perf_event_intel.c|8 +
arch/x86/k
Intel Processor Trace is an architecture extension that allows for program
flow tracing.
Signed-off-by: Alexander Shishkin
---
arch/x86/include/asm/cpufeature.h | 1 +
arch/x86/kernel/cpu/scattered.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/x86/include/asm/cpufeature.h
b
Intel PT cannot be used at the same time as LBR or BTS and will cause a
general protection fault if they are used together. In order to avoid
fixing up GPs in the fast path, instead we disallow creating LBR/BTS
events when PT events are present and vice versa.
Signed-off-by: Alexander Shishkin
ll have to skip forward to the nearest sched_switch
to figure out which task it was, then go back to the actual trace to
decode it) and it completely misses the case when the tracing is enabled
and disabled before sched_switch, for example, via PERF_EVENT_IOC_DISABLE.
Signed-off-by: Alexande
nt where it can generate an interrupt.
We repurpose __reserved_2 in the event attribute for this, even though
it was never checked to be zero before, aux_watermark will only matter
for new AUX-aware code, so the old code should still be fine.
Signed-off-by: Alexander Shishkin
---
include/uapi/lin
;s alignment constraints.
Nested writers are forbidden and guards are in place to catch such
attempts.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 23 +++-
kernel/events/core.c| 5 +-
kernel/events/internal.h| 4 ++
old one, for example, by means of time stamps if
such are provided in the trace.
Consumer is also responsible for disabling any events that might write
to the AUX area (thus potentially racing with the consumer) before
collecting the data.
Signed-off-by: Alexander Shishkin
---
include/uapi/lin
the total requested buffer size, thus making sure
that the buffer has at least two high order allocations.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 1 +
kernel/events/ring_buffer.c | 15 ++-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/inc
capability that indicates such constraint on event
creation.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 1 +
kernel/events/core.c | 45 +
2 files changed, 46 insertions(+)
diff --git a/include/linux/perf_event.h b/include/linux
Some pmus (such as BTS or Intel PT without multiple-entry ToPA capability)
don't support scatter-gather and will prefer larger contiguous areas for
their output regions.
This patch adds a new pmu capability to request higher order allocations.
Signed-off-by: Alexander Shishkin
---
in
to be page aligned.
Then, same aux_offset and aux_size should be passed to mmap() call and
if everything adds up, you should have an AUX buffer as a result.
Pages that are mapped into this buffer also come out of user's mlock
rlimit plus perf_event_mlock_kb allowance.
Signed-off-by: Ale
When there's new data in the AUX space, output a record indicating its
offset and size and a set of flags, such as PERF_AUX_FLAG_TRUNCATED, to
mean the described data was truncated to fit in the ring buffer.
Signed-off-by: Alexander Shishkin
Cc: Arnaldo Carvalho de Melo
---
include/uapi/
mapping existing or shared buffers if their size is not
known in advance.
Right now, it is made to follow the existing convention that
data_offset == PAGE_SIZE and
data_offset + data_size == mmap_size.
Signed-off-by: Alexander Shishkin
---
include/uapi/linux/perf_event.h | 5
per-manual-325462.pdf
[2] http://github.com/virtuoso/linux-perf/tree/intel_pt
Alexander Shishkin (13):
perf: Add data_{offset,size} to user_page
perf: Support high-order allocations for AUX space
perf: Add a capability for AUX_NO_SG pmus to do software double
buffering
perf: Add a pmu cap
Peter Zijlstra writes:
> On Fri, Nov 14, 2014 at 03:43:45PM +0200, Alexander Shishkin wrote:
>> +static void pt_event_stop(struct perf_event *event, int mode)
>> +{
>> +struct pt *pt = this_cpu_ptr(&pt_ctx);
>> +
>> +ACCESS_ONCE(pt->handle_nm
Peter Zijlstra writes:
> Also, if its already enabled, should we not return ENODEV as well, no
> saying who or what programmed it, we should not be touching it.
Or EBUSY?
Regards,
--
Alex
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majo
Peter Zijlstra writes:
> On Mon, Jan 12, 2015 at 03:12:58PM +0200, Alexander Shishkin wrote:
>> > I suppose we could; I'm trying to remember why I did it like this, I'm
>> > failing to remember much past yesterday atm :/
>>
>> Well, right now we
Peter Zijlstra writes:
> On Mon, Nov 17, 2014 at 09:33:00AM +, Metzger, Markus T wrote:
>> > From: Peter Zijlstra
>> >
>> > This patch introduces "AUX space" in the perf mmap buffer, intended for
>> > exporting high bandwidth data streams to userspace, such as instruction
>> > flow traces.
Peter Zijlstra writes:
> On Fri, Nov 14, 2014 at 03:43:45PM +0200, Alexander Shishkin wrote:
>> +static __init int pt_init(void)
>> +{
>> +int ret, cpu, prior_warn = 0;
>> +
>> +BUILD_BUG_ON(sizeof(struct topa) > PAGE_SIZE);
>> +get_onli
Peter Zijlstra writes:
> On Fri, Nov 14, 2014 at 03:43:45PM +0200, Alexander Shishkin wrote:
>> +static void pt_handle_status(struct pt *pt)
>> +{
>> +struct pt_buffer *buf = perf_get_aux(&pt->handle);
>> +int advance = 0;
>> +u64 status;
Peter Zijlstra writes:
> On Fri, Nov 14, 2014 at 03:43:45PM +0200, Alexander Shishkin wrote:
>> +static void pt_event_stop(struct perf_event *event, int mode)
>> +{
>> +struct pt *pt = this_cpu_ptr(&pt_ctx);
>> +
>> +ACCESS_ONCE(pt->handle_nm
Alexander Shishkin writes:
> Alexander Shishkin writes:
>
>> Hi Peter and all,
>
> Hi again,
Ping^2
Regards,
--
Alex
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo inf
Alexander Shishkin writes:
> Hi Peter and all,
Hi again,
> Since there weren't too many review comments on the two previous
> versions, here's another one with a couple more fixes.
This patchset is one month old now, I thought somebody might want to
take a look before a
Intel Processor Trace is an architecture extension that allows for program
flow tracing.
Signed-off-by: Alexander Shishkin
---
arch/x86/include/asm/cpufeature.h | 1 +
arch/x86/kernel/cpu/scattered.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/x86/include/asm/cpufeature.h
b
nt where it can generate an interrupt.
We repurpose __reserved_2 in the event attribute for this, even though
it was never checked to be zero before, aux_watermark will only matter
for new AUX-aware code, so the old code should still be fine.
Signed-off-by: Alexander Shishkin
---
include/uapi/lin
ff-by: Alexander Shishkin
---
arch/x86/include/uapi/asm/msr-index.h | 18 +
arch/x86/kernel/cpu/Makefile |1 +
arch/x86/kernel/cpu/intel_pt.h| 131
arch/x86/kernel/cpu/perf_event.h |2 +
arch/x86/kernel/cpu/perf_event_intel.c|8 +
arch/x86/k
;s alignment constraints.
Nested writers are forbidden and guards are in place to catch such
attempts.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 23 +++-
kernel/events/core.c| 5 +-
kernel/events/internal.h| 4 ++
the total requested buffer size, thus making sure
that the buffer has at least two high order allocations.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 1 +
kernel/events/ring_buffer.c | 15 ++-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/inc
ll have to skip forward to the nearest sched_switch
to figure out which task it was, then go back to the actual trace to
decode it) and it completely misses the case when the tracing is enabled
and disabled before sched_switch, for example, via PERF_EVENT_IOC_DISABLE.
Signed-off-by: Alexande
ff-by: Alexander Shishkin
---
arch/x86/kernel/cpu/Makefile | 2 +-
arch/x86/kernel/cpu/perf_event.h | 7 +
arch/x86/kernel/cpu/perf_event_intel.c | 6 +-
arch/x86/kernel/cpu/perf_event_intel_bts.c | 525 +
arch/x86/kerne
to be page aligned.
Then, same aux_offset and aux_size should be passed to mmap() call and
if everything adds up, you should have an AUX buffer as a result.
Pages that are mapped into this buffer also come out of user's mlock
rlimit plus perf_event_mlock_kb allowance.
Signed-off-by: Ale
When there's new data in the AUX space, output a record indicating its
offset and size and a set of flags, such as PERF_AUX_FLAG_TRUNCATED, to
mean the described data was truncated to fit in the ring buffer.
Signed-off-by: Alexander Shishkin
Cc: Arnaldo Carvalho de Melo
---
include/uapi/
old one, for example, by means of time stamps if
such are provided in the trace.
Consumer is also responsible for disabling any events that might write
to the AUX area (thus potentially racing with the consumer) before
collecting the data.
Signed-off-by: Alexander Shishkin
---
include/uapi/lin
Intel PT cannot be used at the same time as LBR or BTS and will cause a
general protection fault if they are used together. In order to avoid
fixing up GPs in the fast path, instead we disallow creating LBR/BTS
events when PT events are present and vice versa.
Signed-off-by: Alexander Shishkin
Some pmus (such as BTS or Intel PT without multiple-entry ToPA capability)
don't support scatter-gather and will prefer larger contiguous areas for
their output regions.
This patch adds a new pmu capability to request higher order allocations.
Signed-off-by: Alexander Shishkin
---
in
capability that indicates such constraint on event
creation.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 1 +
kernel/events/core.c | 45 +
2 files changed, 46 insertions(+)
diff --git a/include/linux/perf_event.h b/include/linux
-developer-manual-325462.pdf
[2] http://github.com/virtuoso/linux-perf/tree/intel_pt
Alexander Shishkin (13):
perf: Add data_{offset,size} to user_page
perf: Support high-order allocations for AUX space
perf: Add a capability for AUX_NO_SG pmus to do software double
buffering
perf: Add a pmu
mapping existing or shared buffers if their size is not
known in advance.
Right now, it is made to follow the existing convention that
data_offset == PAGE_SIZE and
data_offset + data_size == mmap_size.
Signed-off-by: Alexander Shishkin
---
include/uapi/linux/perf_event.h | 5
Intel Processor Trace is an architecture extension that allows for program
flow tracing.
Signed-off-by: Alexander Shishkin
---
arch/x86/include/asm/cpufeature.h | 1 +
arch/x86/kernel/cpu/scattered.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/x86/include/asm/cpufeature.h
b
the total requested buffer size, thus making sure
that the buffer has at least two high order allocations.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 1 +
kernel/events/ring_buffer.c | 15 ++-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/inc
nt where it can generate an interrupt.
We repurpose __reserved_2 in the event attribute for this, even though
it was never checked to be zero before, aux_watermark will only matter
for new AUX-aware code, so the old code should still be fine.
Signed-off-by: Alexander Shishkin
---
include/uapi/lin
Some pmus (such as BTS or Intel PT without multiple-entry ToPA capability)
don't support scatter-gather and will prefer larger contiguous areas for
their output regions.
This patch adds a new pmu capability to request higher order allocations.
Signed-off-by: Alexander Shishkin
---
in
Intel PT cannot be used at the same time as LBR or BTS and will cause a
general protection fault if they are used together. In order to avoid
fixing up GPs in the fast path, instead we disallow creating LBR/BTS
events when PT events are present and vice versa.
Signed-off-by: Alexander Shishkin
When there's new data in the AUX space, output a record indicating its
offset and size and a set of flags, such as PERF_AUX_FLAG_TRUNCATED, to
mean the described data was truncated to fit in the ring buffer.
Signed-off-by: Alexander Shishkin
Cc: Arnaldo Carvalho de Melo
---
include/uapi/
capability that indicates such constraint on event
creation.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 1 +
kernel/events/core.c | 45 +
2 files changed, 46 insertions(+)
diff --git a/include/linux/perf_event.h b/include/linux
ff-by: Alexander Shishkin
---
arch/x86/kernel/cpu/Makefile | 2 +-
arch/x86/kernel/cpu/perf_event.h | 7 +
arch/x86/kernel/cpu/perf_event_intel.c | 6 +-
arch/x86/kernel/cpu/perf_event_intel_bts.c | 525 +
arch/x86/kerne
;s alignment constraints.
Nested writers are forbidden and guards are in place to catch such
attempts.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 23 +++-
kernel/events/core.c| 5 +-
kernel/events/internal.h| 4 ++
old one, for example, by means of time stamps if
such are provided in the trace.
Consumer is also responsible for disabling any events that might write
to the AUX area (thus potentially racing with the consumer) before
collecting the data.
Signed-off-by: Alexander Shishkin
---
include/uapi/lin
ll have to skip forward to the nearest sched_switch
to figure out which task it was, then go back to the actual trace to
decode it) and it completely misses the case when the tracing is enabled
and disabled before sched_switch, for example, via PERF_EVENT_IOC_DISABLE.
Signed-off-by: Alexande
ff-by: Alexander Shishkin
---
arch/x86/include/uapi/asm/msr-index.h | 18 +
arch/x86/kernel/cpu/Makefile |1 +
arch/x86/kernel/cpu/intel_pt.h| 131
arch/x86/kernel/cpu/perf_event.h |2 +
arch/x86/kernel/cpu/perf_event_intel.c|8 +
arch/x86/k
mapping existing or shared buffers if their size is not
known in advance.
Right now, it is made to follow the existing convention that
data_offset == PAGE_SIZE and
data_offset + data_size == mmap_size.
Signed-off-by: Alexander Shishkin
---
include/uapi/linux/perf_event.h | 5
[1] http://software.intel.com/en-us/intel-isa-extensions
[2] http://github.com/virtuoso/linux-perf/tree/intel_pt
Alexander Shishkin (13):
perf: Add data_{offset,size} to user_page
perf: Support high-order allocations for AUX space
perf: Add a capability for AUX_NO_SG pmus to do software double
to be page aligned.
Then, same aux_offset and aux_size should be passed to mmap() call and
if everything adds up, you should have an AUX buffer as a result.
Pages that are mapped into this buffer also come out of user's mlock
rlimit plus perf_event_mlock_kb allowance.
Signed-off-by: Ale
Alexander Shishkin writes:
> Hi Peter and all,
>
> [full description below the changelog]
>
> This version of the patchset addresses comments from the previous (v5)
> version. Changes:
>
> * dropped "bypass mask", bits that a privileged user could s
Peter Zijlstra writes:
> On Tue, Nov 11, 2014 at 01:24:43PM +0200, Alexander Shishkin wrote:
>> Peter Zijlstra writes:
>
>> > Now I'm not sure we want to export all the bits you're using though.
>> > Like the topa_multiple_entires, that appears an impleme
to be page aligned.
Then, same aux_offset and aux_size should be passed to mmap() call and
if everything adds up, you should have an AUX buffer as a result.
Pages that are mapped into this buffer also come out of user's mlock
rlimit plus perf_event_mlock_kb allowance.
Signed-off-by: Ale
nt where it can generate an interrupt.
We repurpose __reserved_2 in the event attribute for this, even though
it was never checked to be zero before, aux_watermark will only matter
for new AUX-aware code, so the old code should still be fine.
Signed-off-by: Alexander Shishkin
---
include/uapi/lin
ff-by: Alexander Shishkin
---
arch/x86/include/uapi/asm/msr-index.h | 18 +
arch/x86/kernel/cpu/Makefile |1 +
arch/x86/kernel/cpu/intel_pt.h| 131
arch/x86/kernel/cpu/perf_event.h |2 +
arch/x86/kernel/cpu/perf_event_intel.c|8 +
arch/x86/k
ll have to skip forward to the nearest sched_switch
to figure out which task it was, then go back to the actual trace to
decode it) and it completely misses the case when the tracing is enabled
and disabled before sched_switch, for example, via PERF_EVENT_IOC_DISABLE.
Signed-off-by: Alexande
ff-by: Alexander Shishkin
---
arch/x86/kernel/cpu/Makefile | 2 +-
arch/x86/kernel/cpu/perf_event.h | 7 +
arch/x86/kernel/cpu/perf_event_intel.c | 6 +-
arch/x86/kernel/cpu/perf_event_intel_bts.c | 525 +
arch/x86/kerne
Intel PT cannot be used at the same time as LBR or BTS and will cause a
general protection fault if they are used together. In order to avoid
fixing up GPs in the fast path, instead we disallow creating LBR/BTS
events when PT events are present and vice versa.
Signed-off-by: Alexander Shishkin
Some pmus (such as BTS or Intel PT without multiple-entry ToPA capability)
don't support scatter-gather and will prefer larger contiguous areas for
their output regions.
This patch adds a new pmu capability to request higher order allocations.
Signed-off-by: Alexander Shishkin
---
in
the total requested buffer size, thus making sure
that the buffer has at least two high order allocations.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 1 +
kernel/events/ring_buffer.c | 15 ++-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/inc
When there's new data in the AUX space, output a record indicating its
offset and size and a set of flags, such as PERF_AUX_FLAG_TRUNCATED, to
mean the described data was truncated to fit in the ring buffer.
Signed-off-by: Alexander Shishkin
Cc: Arnaldo Carvalho de Melo
---
include/uapi/
old one, for example, by means of time stamps if
such are provided in the trace.
Consumer is also responsible for disabling any events that might write
to the AUX area (thus potentially racing with the consumer) before
collecting the data.
Signed-off-by: Alexander Shishkin
---
include/uapi/lin
Intel Processor Trace is an architecture extension that allows for program
flow tracing.
Signed-off-by: Alexander Shishkin
---
arch/x86/include/asm/cpufeature.h | 1 +
arch/x86/kernel/cpu/scattered.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/x86/include/asm/cpufeature.h
b
mapping existing or shared buffers if their size is not
known in advance.
Right now, it is made to follow the existing convention that
data_offset == PAGE_SIZE and
data_offset + data_size == mmap_size.
Signed-off-by: Alexander Shishkin
---
include/uapi/linux/perf_event.h | 5
capability that indicates such constraint on event
creation.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 1 +
kernel/events/core.c | 45 +
2 files changed, 46 insertions(+)
diff --git a/include/linux/perf_event.h b/include/linux
;s alignment constraints.
Nested writers are forbidden and guards are in place to catch such
attempts.
Signed-off-by: Alexander Shishkin
---
include/linux/perf_event.h | 23 +++-
kernel/events/core.c| 5 +-
kernel/events/internal.h| 4 ++
tp://github.com/virtuoso/linux-perf/tree/intel_pt
Alexander Shishkin (13):
perf: Add data_{offset,size} to user_page
perf: Support high-order allocations for AUX space
perf: Add a capability for AUX_NO_SG pmus to do software double
buffering
perf: Add a pmu capability for "exclusi
Peter Zijlstra writes:
> On Fri, Oct 31, 2014 at 03:13:35PM +0200, Alexander Shishkin wrote:
>> >> + if (test_cpu_cap(&boot_cpu_data, X86_FEATURE_INTEL_PT)) {
>> >> + for (i = 0; i < PT_CPUID_LEAVES; i++)
>>
Peter Zijlstra writes:
> On Mon, Oct 13, 2014 at 04:45:40PM +0300, Alexander Shishkin wrote:
>> +
>> +enum cpuid_regs {
>> +CR_EAX = 0,
>> +CR_ECX,
>> +CR_EDX,
>> +CR_EBX
>> +};
>> +
>> +/*
>> + * Capab
Peter Zijlstra writes:
> On Fri, Oct 24, 2014 at 10:44:54AM +0300, Alexander Shishkin wrote:
>> Peter Zijlstra writes:
>>
>> > On Mon, Oct 13, 2014 at 04:45:46PM +0300, Alexander Shishkin wrote:
>> >> Normally, per-task events can't be inherited pare
Peter Zijlstra writes:
> On Fri, Oct 24, 2014 at 03:13:19PM +0300, Alexander Shishkin wrote:
>> Peter Zijlstra writes:
>>
>> > On Fri, Oct 24, 2014 at 11:22:20AM +0300, Alexander Shishkin wrote:
>> >> > The fact that the hardware cannot even tell you the
Peter Zijlstra writes:
> On Fri, Oct 24, 2014 at 11:22:20AM +0300, Alexander Shishkin wrote:
>> > The fact that the hardware cannot even tell you the supported mask is
>> > further fail.
>
>> The problem with this is that some bits go in groups, there'd be 2..
Peter Zijlstra writes:
> On Fri, Oct 24, 2014 at 10:49:33AM +0300, Alexander Shishkin wrote:
>> Peter Zijlstra writes:
>>
>> > On Mon, Oct 13, 2014 at 04:45:40PM +0300, Alexander Shishkin wrote:
>> >> +++ b/arch/x86/kernel/cpu/perf_event_intel.
Peter Zijlstra writes:
> On Mon, Oct 13, 2014 at 04:45:40PM +0300, Alexander Shishkin wrote:
>> +static int pt_config(struct perf_event *event)
>> +{
>> +u64 reg;
>> +
>> +reg = RTIT_CTL_TOPA | RTIT_CTL_BRANCH_EN;
>> +
>> +if (!ev
Peter Zijlstra writes:
> On Mon, Oct 13, 2014 at 04:45:40PM +0300, Alexander Shishkin wrote:
>> +if ((pt_cap_get(PT_CAP_topa_multiple_entries)
>> + && topa->table[i].stop)
>> +
Peter Zijlstra writes:
>> +/* make negative table index stand for the last table entry */
>> +#define TOPA_ENTRY(t, i) ((i) == -1 ? &(t)->table[(t)->last] :
>> &(t)->table[(i)])
>
> code does not match comment; negative would be: i < 0, not i == -1.
Indeed.
> Something like: ({ if (i < 0) i +=
Peter Zijlstra writes:
> On Mon, Oct 13, 2014 at 04:45:40PM +0300, Alexander Shishkin wrote:
>> +static bool pt_event_valid(struct perf_event *event)
>> +{
>> +u64 config = event->attr.config;
>> +
>> +/* admin can set any packet generation parameters
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