On Thu, 2017-04-13 at 12:11 +0200, Juergen Gross wrote:
> There is no need to set the same capabilities for each cpu
> individually. This can be done for all cpus in platform initialization.
Looks reasonable to me.
Acked-by: Alok Kataria
Thanks,
Alok
>
> Cc: Alok Kataria
ing dmesg output for his affected 4 virtual
> sockets, 1 core per socket VM:
>
> [Firmware Bug]: CPU1: APIC id mismatch. Firmware: 1 CPUID: 2
> [Firmware Bug]: CPU1: Using firmware package id 1 instead of 2
>
>
> Reported-and-tested-by: "Charles (Chas) Williams"
On Wed, 2016-10-19 at 20:45 -0700, Jacob Pan wrote:
> On Tue, 18 Oct 2016 14:20:49 +
> Alok Kataria wrote:
>
> > Hi Jacob, Zhang,
> >
> > One of your recent commit "thermal/powerclamp: remove cpu
> > whitelist” [1], has caused a regression in the
Hi Jacob, Zhang,
One of your recent commit "thermal/powerclamp: remove cpu whitelist” [1], has
caused a regression in the kernel.
That commit changed powerclamp_probe from requiring all of the following
features:
X86_FEATURE_NONSTOP_TSC
X86_FEATURE_CONSTANT_TSC
X86_FEATURE_MWAIT
X86_FEATURE_
gt;
> # The last log is raised by calibrate_delay(), which calls
> calibrate_delay_converge() to compute the lpj value.
>
> # So far, I don't know why the jiffies stays the same.
> # But I found two methods can avoid this problem。
>
> 1）specify the 'lpj=' with
Juergen, thanks for following up on this.
X86 maintainers - If it helps let me also confirm that without this
patch the latest kernels *always* crash on VMware guest running HWv10
and earlier.
Please include the fix at your earliest.
Thanks,
Alok
On Mon, 2015-01-19 at 06:05 +0100, Juergen Gro
Hi,
On Tue, 2014-12-16 at 10:58 +0100, Juergen Gross wrote:
> VMWare seems not to emulate the PAT MSR correctly: reaeding
> MSR_IA32_CR_PAT returns 0 even after writing another value to it.
>
> Detect this bug and don't use the read value if it is 0.
>
> Commit bd809af16e3ab1f8d55b3e2928c47c67e2
Commit-ID: 4488e09b4582c3d9cae1601351e26584e208d877
Gitweb: http://git.kernel.org/tip/4488e09b4582c3d9cae1601351e26584e208d877
Author: Alok Kataria
AuthorDate: Wed, 4 Sep 2013 14:23:41 +0530
Committer: H. Peter Anvin
CommitDate: Wed, 4 Sep 2013 22:00:04 -0700
x86, doc: Add an entry in
On Wed, 2013-09-04 at 10:16 -0700, Joe Perches wrote:
> On Wed, 2013-09-04 at 14:23 +0530, Alok Kataria wrote:
> > Hey,
> >
> > This change adds an entry to the maintainers file to explicitly state
> > that any changes to vmware.c should be sent to the authors of th
Commit-ID: db14e78a61691888ded5896da5f171d662a4d2bd
Gitweb: http://git.kernel.org/tip/db14e78a61691888ded5896da5f171d662a4d2bd
Author: Alok Kataria
AuthorDate: Wed, 4 Sep 2013 14:23:41 +0530
Committer: H. Peter Anvin
CommitDate: Wed, 4 Sep 2013 04:49:07 -0700
x86, doc: Add an entry in
e but were
not directed to me, someone else made me aware of those changes. It
could be that my use of different SOB lines "Alok N Kataria" vs "Alok
Kataria" confuses get_maintainer.pl, but adding this entry in
MAINTAINERS should solve the problem at hand. For one of the
Hi Peter, Ingo,
Can you please consider this patch, it allows linux guests to use x2apic
when running on VMware platform.
Thanks,
Alok
On Thu, 2013-01-17 at 15:44 -0800, Alok Kataria wrote:
> Please consider this patch to allow x2apic without IR support when
> running on VMware pl
Please consider this patch to allow x2apic without IR support when
running on VMware platform. Tested on top of 3.8-rc3.
Thanks,
Alok
--
Allow x2apic without IR on VMware platform.
From: Alok N Kataria
This patch updates x2apic initializaition code to allow x2apic on VMware
platform even witho
Hi,
Looking at the tlb_flush code path and its co-relation with
ARCH_FREE_PTE_NR, on x86-64 architecture. I think we still don't use
the ARCH_FREE_PTE_NR of 5350 as the caching value for the mmu_gathers
structure, instead fallback to using 506 due to some typo errors in
the code.
Found this link
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