Hi,
On Thu, 21 Feb 2019 21:25:06 +0100
Anatolij Gustschin ag...@denx.de wrote:
...
> .../ABI/testing/sysfs-driver-ftdi-fifo-fpp| 7 +
> drivers/fpga/Kconfig | 7 +
> drivers/fpga/Makefile | 1 +
> drivers/fpga/ftd
will add an FPP FPGA manager driver for it.
The FTDI protocol code and prototypes was borrowed from libftdi.
Signed-off-by: Anatolij Gustschin
---
MAINTAINERS |8 +
drivers/usb/misc/Kconfig| 10 +
drivers/usb/misc/Makefile |1 +
drivers/usb/misc/ft232h
Add FPGA manager driver for loading ARRI Altera FPGAs via fast
passive parallel (FPP) interface using FTDI FT232H chip.
Signed-off-by: Anatolij Gustschin
---
.../ABI/testing/sysfs-driver-ftdi-fifo-fpp| 7 +
drivers/fpga/Kconfig | 7 +
drivers/fpga/Makefile
ew FT232H interface
driver and extend it according to CPLD changes for additional
support of new hardware revision B.
Anatolij Gustschin (3):
usb: misc: add driver for FT232H based FPGA configuration devices
spi: add FTDI MPSSE SPI controller driver
fpga: Add fpga manager driver
: Anatolij Gustschin
---
drivers/spi/Kconfig | 7 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-ftdi-mpsse.c | 651 +++
3 files changed, 659 insertions(+)
create mode 100644 drivers/spi/spi-ftdi-mpsse.c
diff --git a/drivers/spi/Kconfig b/drivers
Hi,
On Wed, 5 Dec 2018 22:10:40 +0800
Song Qiang songqiang1304...@gmail.com wrote:
...
>I've been developing some iio device drivers and found that some people
>would like to test their devices with a qemu system which requires an
>i2c or spi port on our development hosts. Usually this is achieved
On Wed, 7 Nov 2018 23:13:11 -0200
capetry@gmail.com capetry@gmail.com wrote:
...
>diff --git a/drivers/fpga/altera-cvp.c b/drivers/fpga/altera-cvp.c
>index 610a1558e..45b7c8c0b 100644
>--- a/drivers/fpga/altera-cvp.c
>+++ b/drivers/fpga/altera-cvp.c
>@@ -1,3 +1,4 @@
>+// SPDX-License-Ident
From: Andreas Puhm
The probe function needs to verify the CvP enable bit in order to
properly determine if FPGA Manager functionality can be safely
enabled.
Fixes: 34d1dc17ce97 ("fpga manager: Add Altera CvP driver")
Signed-off-by: Andreas Puhm
Signed-off-by: Anatolij Gustschin
---
Hi Andreas,
On Mon, 22 Oct 2018 13:15:34 +
Andreas Puhm p...@oregano.at wrote:
...
>Full description:
>The altera_cvp probe function only checks,
>if the Altera/Intel PCI device configuration space contains a vendor
>specific entry (VSEC Capability Header 0x000b) at offset 0x200.
> But the pr
On Mon, 16 Apr 2018 10:10:08 +0200
Greg KH gre...@linuxfoundation.org wrote:
...
>> as discussed. Can you please take this bugfix for 4.17?
>> I rebased it against next.
>
>Is it also needed in any older kernel versions?
It is needed in versions starting from v4.14.
thanks,
Anatolij
On Tue, 13 Mar 2018 16:23:10 +0100
Daniel Vetter dan...@ffwll.ch wrote:
...
> Shouldn't we patch the drivers/gpu/drm/stm driver instead of the
> drivers/video one? fbdev is kinda a dead end and not for adding new hw
> support ...
this patch series adds display driver to U-Boot project, I don't kno
On Fri, 15 Sep 2017 04:00:04 +0200
Alexandre Belloni alexandre.bell...@free-electrons.com wrote:
>The proper compatible for rv3029 is microcrystal,rv3029.
>
>Signed-off-by: Alexandre Belloni
Acked-by: Anatolij Gustschin
On Tue, 25 Jul 2017 13:49:08 +0200
Johan Hovold jo...@kernel.org wrote:
>On Wed, Jul 19, 2017 at 01:58:30PM +0200, Anatolij Gustschin wrote:
>> On Mon, 10 Jul 2017 14:52:10 +0200
>> Johan Hovold jo...@kernel.org wrote:
>>
>> >On Thu, Jul 06, 2017 at 10:49:16PM +
On Tue, 25 Jul 2017 13:52:35 +0200
Johan Hovold jo...@kernel.org wrote:
>On Wed, Jul 19, 2017 at 02:59:00PM +0200, Anatolij Gustschin wrote:
>> On Wed, 19 Jul 2017 10:59:34 +0200
>> Johan Hovold jo...@kernel.org wrote:
>
>> >> And as David Laight already point
On Wed, 19 Jul 2017 13:39:36 +
David Laight david.lai...@aculab.com wrote:
>From: Anatolij Gustschin
>> Sent: 19 July 2017 14:30
>...
>> >Stupid question, I know, but I cannot help thinking: If you have an
>> >EEPROM then why the h... don't you use an
On Wed, 12 Jul 2017 11:11:46 +0200
Bjørn Mork bj...@mork.no wrote:
>Johan Hovold writes:
>> On Tue, Jul 11, 2017 at 08:52:37AM +0200, Anatolij Gustschin wrote:
>>
>>> For devices with connected EEPROM some modes (including UART) are
>>> configurable in the E
On Wed, 19 Jul 2017 10:59:34 +0200
Johan Hovold jo...@kernel.org wrote:
...
>> > +static const struct mfd_cell ftdi_cells[] = {
>> > + { .name = "ftdi-cbus-gpio", },
>> > + { .name = "ftdi-mpsse-i2c", },
>> > + { .name = "ftdi-mpsse-spi", },
>> > + { .name = "ftdi-fifo-fpp-mgr", },
>> > +};
>
On Mon, 10 Jul 2017 14:52:10 +0200
Johan Hovold jo...@kernel.org wrote:
>On Thu, Jul 06, 2017 at 10:49:16PM +0200, Anatolij Gustschin wrote:
>> Add USB part with common functions for USB-GPIO/I2C/SPI master
>> adapters. These allow communication with chip's control, tra
On Wed, 19 Jul 2017 11:03:11 +0200
Johan Hovold jo...@kernel.org wrote:
>On Thu, Jul 13, 2017 at 06:25:25PM +0200, Anatolij Gustschin wrote:
>> On FT232H the interface mode can be configured in the EEPROM,
>> and the async UART mode is configured by default. The chip is
>> al
On Wed, 12 Jul 2017 10:50:03 +0200
Johan Hovold jo...@kernel.org wrote:
...
>IIRC we should be able read from the EEPROM, and I would at least expect
>there to be a way to retrieve the current mode as well.
I've just send a patch for ftdi_sio.
Thanks,
Anatolij
.
Signed-off-by: Anatolij Gustschin
---
drivers/usb/serial/ftdi_sio.c | 62 ++-
drivers/usb/serial/ftdi_sio.h | 12 +
2 files changed, 73 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index
On Mon, 10 Jul 2017 14:34:27 +0200
Johan Hovold jo...@kernel.org wrote:
>On Fri, Jul 07, 2017 at 11:53:29AM +0200, Anatolij Gustschin wrote:
>> On Fri, 07 Jul 2017 09:48:48 +0200
>> Bjørn Mork bj...@mork.no wrote:
>>
>> >[adding Johan on the CC list]
>&
On Fri, 07 Jul 2017 09:48:48 +0200
Bjørn Mork bj...@mork.no wrote:
>[adding Johan on the CC list]
>
>Anatolij Gustschin writes:
>
>> +static struct usb_device_id ftdi_mfd_table[] = {
>> +{ USB_DEVICE(0x0403, 0x6014) },
>> +{}
>> +};
>> +MODULE_DE
Hi Alan,
On Thu, 6 Jul 2017 13:53:23 -0500
Alan Tull at...@kernel.org wrote:
...
>This is interesting and looks pretty straightforward. Do you have any
>code that uses it?
I've send a patch series for FPP manager, it will add the FPGA manager
when an FTDI based configuration device is connected
Add driver for CBUS pins on FT232H. The driver supports setting
GPIO direction and getting/setting CBUS 0-3 pin value. The CBUS
pins have to be enabled by configuring I/O mode in the FTDI EEPROM.
Signed-off-by: Anatolij Gustschin
---
drivers/gpio/Kconfig | 11 ++
drivers/gpio/Makefile
Add FPGA manager driver for loading Altera FPGAs via fast
passive parallel (FPP) interface using FTDI FT232H chip.
Signed-off-by: Anatolij Gustschin
---
drivers/fpga/Kconfig | 7 +
drivers/fpga/Makefile| 1 +
drivers/fpga/ftdi-fifo-fpp.c | 569
Add USB part with common functions for USB-GPIO/I2C/SPI master
adapters. These allow communication with chip's control, transmit
and receive endpoints and will be used by various FT232H drivers.
Signed-off-by: Anatolij Gustschin
---
drivers/mfd/Kconfig | 9 +
drivers/mfd/Mak
driver for Altera FPP FPGA configuration
via FT232H FT245-FIFO interface.
Anatolij Gustschin (3):
mfd: Add support for FTDI FT232H devices
gpio: Add FT232H CBUS GPIO driver
fpga manager: Add FT232H driver for Altera FPP
drivers/fpga/Kconfig | 7 +
drivers/fpga/Makefile
popping up or disappearing, when using
hotpluggable FPGA configuration devices (e.g. via USB-SPI adapters).
Signed-off-by: Anatolij Gustschin
---
Documentation/fpga/fpga-mgr.txt | 8
drivers/fpga/fpga-mgr.c | 34 ++
include/linux/fpga/fpga-mgr.h | 13
On Tue, 4 Jul 2017 11:12:17 +0200
Greg Kroah-Hartman gre...@linuxfoundation.org wrote:
...
>> Is this series queued for merging in 4.13-rc1 ?
>
>Nope, it missed my merge window for that, sorry. I'll queue them up to
>my tree after 4.13-rc1 is out. If there are any specific bugfixes in
>here tha
Hi Greg,
On Wed, 14 Jun 2017 10:36:24 -0500
Alan Tull at...@kernel.org wrote:
>Hi Greg,
>
>This is a repost of last weeks patches, fixing the warnings. I've
>also added the Altera CvP driver which has been reviewed on the lists.
>I pushed these to my kernel.org git repo for testing (which I shou
Hi Alan,
On Fri, 9 Jun 2017 02:22:24 +0200
Anatolij Gustschin ag...@denx.de wrote:
>Add FPGA manager support for PCIe CvP on Cyclone-V/Stratix-V/Arria-V
>and Arria-10 FPGAs.
this series has been reviewed, could you please queue it for 4.13,
together with altera-ps-spi driver series?
On Tue, 13 Jun 2017 20:21:45 +1000
Michael Ellerman m...@ellerman.id.au wrote:
>Masahiro Yamada writes:
...
>> Ping.
>> I am not 100% sure who is responsible for this,
>> but somebody, could take a look at this patch, please?
>
>Have you tested it actually works?
>
>It sounds reasonable, and if
>
>Fix them to remove -I$(srctree)/arch/$(SRCARCH)/boot/dts path from
>dtc_cpp_flags.
>
>Signed-off-by: Masahiro Yamada
Tested-by: Anatolij Gustschin
On Fri, 9 Jun 2017 11:51:12 +0200
Greg Kroah-Hartman gre...@linuxfoundation.org wrote:
...
>I get the following build error with this patch:
>
>ERROR: "__spi_register_driver" [drivers/fpga/altera-ps-spi.ko] undefined!
it is due to enabled COMPILE_TEST and disabled CONFIG_SPI.
>So I'll just ignore
Add FPGA manager driver for loading Arria-V/Cyclone-V/Stratix-V
and Arria-10 FPGAs via CvP.
Signed-off-by: Anatolij Gustschin
---
Documentation/ABI/testing/sysfs-driver-altera-cvp | 8 +
drivers/fpga/Kconfig | 7 +
drivers/fpga/Makefile
Add a flag that is passed to the write_init() callback, indicating
that the bitstream is compressed.
The low-level driver will deal with the flag, or return an error,
if compressed bitstreams are not supported.
Signed-off-by: Anatolij Gustschin
---
include/linux/fpga/fpga-mgr.h | 2 ++
1 file
a single patch before)
- minor style changes (variable names, return value checking, etc.)
- do {} while() loop style changes
- capitalize acronyms in comments
- simplify code by using pci_name() string for FPGA manager name
- numclks init style changes
- %s/VSEC_/VSE_/g
Anatolij Gustschin
On Thu, 8 Jun 2017 17:44:19 +0300
Andy Shevchenko andy.shevche...@gmail.com wrote:
>On Thu, Jun 8, 2017 at 5:15 PM, Anatolij Gustschin wrote:
>> On Thu, 8 Jun 2017 02:38:55 +0300
>> Andy Shevchenko andy.shevche...@gmail.com wrote:
>>>On Thu, Jun 8, 2017 at 2:09 AM, A
On Thu, 8 Jun 2017 02:38:55 +0300
Andy Shevchenko andy.shevche...@gmail.com wrote:
>On Thu, Jun 8, 2017 at 2:09 AM, Anatolij Gustschin wrote:
>> On Fri, 2 Jun 2017 20:43:21 +0300
>> Andy Shevchenko andy.shevche...@gmail.com wrote:
>
>Besides below comments, please, do
>
On Fri, 2 Jun 2017 20:43:21 +0300
Andy Shevchenko andy.shevche...@gmail.com wrote:
...
>
>> + void(*write_data)(struct altera_cvp_conf *conf,
>> + u32 val);
>
>Is it too far beyond 80 characters? I would leave it in one line (~83
Hi Alan,
On Sun, 14 May 2017 17:51:22 +0200
Anatolij Gustschin ag...@denx.de wrote:
>Add FPGA manager driver for loading Arria-V/Cyclone-V/Stratix-V
>and Arria-10 FPGAs via CvP.
any comments to this patch? I'll rebase to apply on top of Altera
PS-SPI driver series, so that it can be
Hi Alan,
On Thu, 25 May 2017 10:29:05 -0700
Joshua Clayton stillcompil...@gmail.com wrote:
>FPGA Manager passive serial can now support Stratix, Cyclone and Arria
>FPGAs.
can this series be queued for merging in v4.13 or are there any
issues with it?
Thanks,
Anatolij
On Wed, 17 May 2017 20:23:41 +0200
Anatolij Gustschin ag...@denx.de wrote:
...
>+ if (!IS_ERR(conf->confd)) {
>+ if (!gpiod_get_raw_value_cansleep(conf->confd)) {
>+ dev_err(&mgr->dev, "CONF_DONE is low!\n");
as
Hi Joshua,
On Wed, 17 May 2017 07:47:42 -0700
joshua.clay...@uniwest.com joshua.clay...@uniwest.com wrote:
...
>> #define FPGA_MGR_ENCRYPTED_BITSTREAMBIT(2)
>> +#define FPGA_MGR_SPI_BITSTREAM_LSB_FIRSTBIT(3)
>My thought here is that FPGA_MGR_BITSTREAM_LSB_FIRST
>is a bit shorter,
Hi,
On Wed, 17 May 2017 20:23:41 +0200
Anatolij Gustschin ag...@denx.de wrote:
...
>+ conf->spi = spi;
>+ conf->config = devm_gpiod_get(&spi->dev, "nconfig", GPIOD_OUT_HIGH);
we should use GPIOD_OUT_LOW flags here. nCONFIG is low active, so
setting logica
From: Joshua Clayton
Add support for Altera cyclone V FPGA connected to an spi port
to the evi devicetree file
Signed-off-by: Joshua Clayton
---
Changes in v10:
- none
arch/arm/boot/dts/imx6q-evi.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/imx6
From: Joshua Clayton
Describe an altera-ps-spi devicetree entry, required features
Signed-off-by: Joshua Clayton
Acked-by: Rob Herring
Signed-off-by: Anatolij Gustschin
---
Changes in v10:
- fix compatible string in example
- add Arria 10 compatible
- s/spi/SPI/
- reword to remove
Signed-off-by: Joshua Clayton
Signed-off-by: Anatolij Gustschin
---
Changes in v10:
- rename cyclone-ps-spi driver to altera-ps-spi since other FPGA
series also supported
- use _cansleep gpio functions, since the underlying GPIO driver can
be for an USB-to-GPIO or I2C-to-GPIO device (with
Hi Joshua,
On Wed, 17 May 2017 07:47:42 -0700
joshua.clay...@uniwest.com joshua.clay...@uniwest.com wrote:
...
>> /**
>> * struct fpga_image_info - information specific to a FPGA image
>
>I'll preparing an updated patch series including a version of your patches
please wait a bit. I'll send
Add FPGA manager driver for loading Arria-V/Cyclone-V/Stratix-V
and Arria-10 FPGAs via CvP.
Signed-off-by: Anatolij Gustschin
---
For building this patch requires https://lkml.org/lkml/2017/5/14/73
Changes in v5:
- use absolute register offset values
- move register bit macros below offset
Add a flag that is passed to the write_init() callback, indicating
that the bitstream is compressed.
The low-level driver will deal with the flag, or return an error,
if compressed bitstreams are not supported.
Signed-off-by: Anatolij Gustschin
---
include/linux/fpga/fpga-mgr.h | 1 +
1 file
On Wed, 3 May 2017 18:01:19 +0300
Andy Shevchenko andy.shevche...@gmail.com wrote:
...
>> when 12 LSBs are zero, the bytes value has been decremented by
>> 4k, meaning that a new 4k data block has been written. Only
>> then the error checking is performed.
>
>If the size is less than 4k...?
then
On Fri, 12 May 2017 11:27:42 +0200
Linus Walleij linus.wall...@linaro.org wrote:
...
>Patch applied for fixes with Andy's Review tag.
Thanks! What about this one https://lkml.org/lkml/2017/4/20/907 ?
Any issues with it? Or can it be queued for v4.13?
Thanks,
Anatolij
Add stubs for gpiod_add_lookup_table() and gpiod_remove_lookup_table()
for the !GPIOLIB case to prevent build errors.
Signed-off-by: Anatolij Gustschin
---
Changes in v4:
- move stubs to gpio/machine.h
Changes in v3:
- add stubs for !GPIOLIB case. Drop prototypes, these are
already in gpio
On Tue, 02 May 2017 16:36:54 -0700
Joe Perches j...@perches.com wrote:
...
>It would with command line option --strict, otherwise not.
ah, good to know. Thanks!
On Wed, 3 May 2017 00:28:17 +0300
Andy Shevchenko andy.shevche...@gmail.com wrote:
...
>>>Is 0xff a mask here? (Btw, you missed spaces around <<)
>>
>> yes, it is. Will add spaces (checkpatch didn't warn here).
>
>Then it makes sense to add _MASK and use GENMASK() instead of direct value.
ok,
On Mon, 1 May 2017 23:06:16 +0300
Andy Shevchenko andy.shevche...@gmail.com wrote:
>On Sun, Apr 30, 2017 at 10:08 PM, Anatolij Gustschin wrote:
>> Add FPGA manager driver for loading Arria-V/Cyclone-V/Stratix-V
>> and Arria-10 FPGAs via CvP.
>
>I think you need to spend t
Add FPGA manager driver for loading Arria-V/Cyclone-V/Stratix-V
and Arria-10 FPGAs via CvP.
Signed-off-by: Anatolij Gustschin
---
Changes in v4:
- Update description about supported FPGA models in Kconfig
and commit log
- use writel() for iomem accesses
- factor out dummy write code
On Fri, 28 Apr 2017 10:43:19 +0200
Linus Walleij linus.wall...@linaro.org wrote:
...
>> --- a/include/linux/gpio/consumer.h
>> +++ b/include/linux/gpio/consumer.h
>
>So why should the stubs be in
>and not in ?
good question. I'll move them to machine.h.
Thanks,
Anatolij
Subject: [PATCH v3] gpiolib: Add stubs for gpiod lookup table interface
Add stubs for gpiod_add_lookup_table() and gpiod_remove_lookup_table()
for the !GPIOLIB case to prevent build errors. Also add prototypes.
Signed-off-by: Anatolij Gustschin
---
Changes in v3:
- add stubs for !GPIOLIB case
On Thu, 27 Apr 2017 16:25:34 +0200
Anatolij Gustschin ag...@denx.de wrote:
>On Thu, 27 Apr 2017 17:07:23 +0300
>Andy Shevchenko andy.shevche...@gmail.com wrote:
...
>>static inline void gpiod_add_lookup_table(struct gpiod_lookup_table *table) {}
>>static inline void gpiod_r
On Thu, 27 Apr 2017 17:07:23 +0300
Andy Shevchenko andy.shevche...@gmail.com wrote:
>On Thu, Apr 27, 2017 at 9:52 AM, Anatolij Gustschin wrote:
>> Add stubs for gpiod_add_lookup_table() and gpiod_remove_lookup_table()
>> for the !GPIOLIB case to prevent build errors. Also
Add stubs for gpiod_add_lookup_table() and gpiod_remove_lookup_table()
for the !GPIOLIB case to prevent build errors. Also add prototypes.
Signed-off-by: Anatolij Gustschin
Reviewed-by: Andy Shevchenko
---
Changes in v2:
move gpiod_lookup_table out of #ifdef
include/linux/gpio/consumer.h
Hi,
On Fri, 21 Apr 2017 16:14:31 -0500
Li, Yi yi1...@linux.intel.com wrote:
> From the User guild
>https://www.altera.com/documentation/dsu1441819344145.html#dsu1442261652730,
>it says Configuration via Protocol (CvP) is a configuration scheme
>supported inArria^® V,Cyclone^® V,Stratix^® V, an
On Fri, 21 Apr 2017 22:24:49 +0300
Andy Shevchenko andy.shevche...@gmail.com wrote:
...
>...and still a question "Do we go with stubs for them in case of !GPIOLIB?"
I've just sent a patch.
>Patch below looks good to me:
Thanks for review!
Anatolij
Add stubs for gpiod_add_lookup_table() and gpiod_remove_lookup_table()
for the !GPIOLIB case to prevent build errors. Also add prototypes.
Signed-off-by: Anatolij Gustschin
---
include/linux/gpio/consumer.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/include/linux/gpio
the bitstream could be prepared as bit-reversed
to avoid the bit-swapping while sending. This flag indicates
such bit-reversed SPI bitstream. The low-level driver will
deal with the flag and perform bit-reversing if needed.
Signed-off-by: Anatolij Gustschin
---
include/linux/fpga/fpga-mgr.h | 3
For hot-pluggable devices adding GPIOs dynamically we need to
assemble and add the gpio lookup tables at probe time in modules,
so that requesting these GPIOs in attached drivers can work.
Export lookup table functions for modules.
Signed-off-by: Anatolij Gustschin
---
drivers/gpio/gpiolib.c
Hi Matthew,
On Thu, 20 Apr 2017 10:29:34 -0700 (PDT)
matthew.gerl...@linux.intel.com matthew.gerl...@linux.intel.com wrote:
...
>Since you say the driver works with Arria-10, I thought I would give it
>a try with the Altera Arria10 PCIe DevKit I am using. I successfully
>compiled your patch as a
Add FPGA manager driver for loading Arria/Cyclone/Stratix
FPGAs via CvP.
Signed-off-by: Anatolij Gustschin
---
Changes in v3:
- removed V-series from description (since the driver works
also with Arria-10). Also renamed functions, config option
and driver file name. Changed module
Hi Matthew,
On Wed, 22 Mar 2017 09:08:18 -0700 (PDT)
matthew.gerl...@linux.intel.com matthew.gerl...@linux.intel.com wrote:
...
>> Can we also add a function for registering a PCIe device with
>> PR IP here? Something like:
>
>If we have an alt_pr_pcie_register function, we will need the
>corre
Hi Matthew,
On Fri, 10 Mar 2017 11:40:25 -0800
matthew.gerl...@linux.intel.com matthew.gerl...@linux.intel.com wrote:
...
>+int alt_pr_unregister(struct device *dev)
>+{
>+ dev_dbg(dev, "%s\n", __func__);
>+
>+ fpga_mgr_unregister(dev);
>+
>+ return 0;
>+}
>+EXPORT_SYMBOL_GPL(alt_pr
Hi Matthew,
thanks for the patches. Please see some comments below.
On Fri, 10 Mar 2017 11:40:25 -0800
matthew.gerl...@linux.intel.com matthew.gerl...@linux.intel.com wrote:
...
>+ if (!(info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
>+ pr_err("%s Partial Reconfiguration flag not
Hi Matthew,
On Fri, 10 Mar 2017 11:40:27 -0800
matthew.gerl...@linux.intel.com matthew.gerl...@linux.intel.com wrote:
...
>+#include "altera-pr-ip-core.h"
Shouldn't we put this header to include/linux? Compiling the
out-of-tree modules using alt_pr_register/alt_pr_unregister
will not work if thi
This series adds an FPGA manager driver for Xilinx Spartan6 FPGAs
that can configure them using an SPI port and two GPIOs.
Anatolij Gustschin (2):
dt: bindings: fpga: add xilinx slave-serial binding description
fpga manager: Add Xilinx slave serial SPI driver
Changes in v4:
- add Acked-by
The driver loads FPGA firmware over SPI, using the "slave serial"
configuration interface on Xilinx FPGAs.
Signed-off-by: Anatolij Gustschin
---
This patch requires patch https://lkml.org/lkml/2017/2/15/667
for building
Changes in v4:
- increase program latency up to 7.5ms for ot
Add dt binding documentation details for Xilinx FPGA configuration
over slave serial interface.
Signed-off-by: Anatolij Gustschin
Acked-by: Moritz Fischer
Acked-by: Rob Herring
---
Changes in v4:
- add Acked-by tags
Changes in v3:
- extend example to show the usage in SPI master node
Hi Jason,
On Wed, 15 Feb 2017 11:06:12 -0700
Jason Gunthorpe jguntho...@obsidianresearch.com wrote:
...
>The kernel could detect the bitfile starts with 'Linux_FPGA_BIT/1.0\n'
>and then proceed to decode the header providing compat with the
>current scheme.
>
>This is usually the sort of stuff I'd
Hi Joshua,
On Tue, 24 Jan 2017 14:19:33 -0800
Joshua Clayton stillcompil...@gmail.com wrote:
...
>+static int cyclonespi_write(struct fpga_manager *mgr, const char *buf,
>+ size_t count)
>+{
>+ struct cyclonespi_conf *conf = (struct cyclonespi_conf *)mgr->priv;
>+
On Wed, 7 Dec 2016 13:29:29 -0800
Joshua Clayton stillcompil...@gmail.com wrote:
>Anatolij,
>Thanks for the quick look and response.
>I guess I should have rebased before submitting.
yes, Makefile and Kconfig changes need rebasing, I think.
>I just realized I also forgot to send this patch serie
On Wed, 7 Dec 2016 13:04:40 -0800
Joshua Clayton stillcompil...@gmail.com wrote:
...
>+static int cyclonespi_write_init(struct fpga_manager *mgr, u32 flags,
>+ const char *buf, size_t count)
there is a minor API change in linux-next [1]. struct fpga_image_info *
is p
Hi Joshua,
On Thu, 1 Dec 2016 16:04:09 -0800
Joshua Clayton stillcompil...@gmail.com wrote:
...
>>> +static __always_inline __attribute_const__ u32 __arch_bitrev8x4(u32 x)
>>> +{
>>> + __asm__ ("rbit %0, %1; rev %0, %0" : "=r" (x) : "r" (x));
>> return x;
>Oops thats a little embarrassi
On Thu, 1 Dec 2016 09:04:50 -0800
Joshua Clayton stillcompil...@gmail.com wrote:
...
>diff --git a/arch/arm/include/asm/bitrev.h b/arch/arm/include/asm/bitrev.h
>index ec291c3..6d2e9ca 100644
>--- a/arch/arm/include/asm/bitrev.h
>+++ b/arch/arm/include/asm/bitrev.h
>@@ -17,4 +17,9 @@ static __alwa
On Mon, 27 Jun 2016 08:59:42 +0100
David Binderman linuxdev.baldr...@gmail.com wrote:
...
>linux-4.7-rc5/arch/powerpc/platforms/512x/clock-commonclk.c:824]:
>(warning) %d in format string (no. 1) requires 'int' but the argument
>type is 'size_t {aka unsigned long}'.
mpc512x is 32-bit arch, size_t
On Tue, 15 Dec 2015 10:26:47 +
Srinivas Kandagatla wrote:
...
> Anatolij, Do you see any issues if we totally move this driver to nvmem
> framework? Which involves relocating and renameing the old eeprom file
> to /sys/bus/nvmem/devices/*/nvmem
I don't know how many driver users are there a
On Tue, 27 May 2014 01:51:31 +0530
Himangi Saraogi wrote:
...
>
> Signed-off-by: Himangi Saraogi
> Acked-by: Julia Lawall
> ---
> Not compile tested
> arch/powerpc/platforms/52xx/mpc52xx_gpt.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
applied to mpc5xxx/next.
Thanks,
Ana
On Mon, 12 Oct 2015 00:08:02 +0300
Alexander Popov wrote:
> Add a device tree binding for Freescale MPC512x LocalPlus Bus FIFO and
> introduce the document describing that binding.
>
> Signed-off-by: Alexander Popov
> ---
> .../bindings/powerpc/fsl/mpc512x_lpbfifo.txt| 21
> ++
On Mon, 12 Oct 2015 00:08:01 +0300
Alexander Popov wrote:
> This driver for Freescale MPC512x LocalPlus Bus FIFO (called SCLPC
> in the Reference Manual) allows Direct Memory Access transfers
> between RAM and peripheral devices on LocalPlus Bus.
>
> Signed-off-by: Alexander Popov
> ---
> arch
On Tue, 20 Oct 2015 16:04:12 +0100
Luis de Bethencourt wrote:
> From: Luis de Bethencourt
>
> This platform driver has a OF device ID table but the OF module
> alias information is not created so module autoloading won't work.
>
> Signed-off-by: Luis de Bethencourt
> ---
> arch/powerpc/platf
On Fri, 10 Jul 2015 16:03:23 -0700
Stephen Boyd wrote:
> This clock provider uses the consumer API, so include clk.h
> explicitly.
>
> Cc: Gerhard Sittig
> Cc: Scott Wood
> Cc: Anatolij Gustschin
> Signed-off-by: Stephen Boyd
Acked-by: Anatolij Gustschin
--
To unsub
ely wrong x/y.
>
> But, after I disabled almost all code that related to ads7845 ("== 7845"),
> except determination of amount of pressure force,
> all start works as expected,
> I found such commit:
>
> >commit 3eac5c7e44f35eb07f0ecb28ce60f15b2dda1932
> >Au
The repository for mpc5xxx has been moved, update git URL to new location.
Signed-off-by: Anatolij Gustschin
---
MAINTAINERS |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3705430..153229e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
Hi Stephen,
On Wed, 1 Oct 2014 09:01:15 +1000
Stephen Rothwell wrote:
...
> Attempting to fetch the mpc5xxx tree
> (git://git.denx.de/linux-2.6-agust.git#next) produces this error:
>
> fatal: Could not read from remote repository.
>
> Please make sure you have the correct access rights
> and th
On Thu, 13 Feb 2014 14:47:38 +0100
Heiko Schocher wrote:
> In panel_probe() the backlight node is never found, correct this.
>
> Signed-off-by: Heiko Schocher
Acked-by: Anatolij Gustschin
> Cc: Anatolij Gustschin
> Cc: Benoit Parrot
> Cc: Rob Clark
> Cc: David Airli
On Fri, 24 May 2013 14:42:46 +
"Thumshirn, Johannes Tobias" wrote:
> Hi list,
>
> I'm experiencing problems while booting on a Freescale P1013 based board. It
> hangs on USB initialization:
> [3.763584] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
> [3.770519] ehci-pci
Hello Alexander,
On Fri, 3 May 2013 14:43:23 +0400
Alexander Popov wrote:
> Hello Anatolij,
>
> > Note that there is a patch for .device_prep_slave_sg() operation
> > for this driver as part of this series:
> > https://patchwork.kernel.org/patch/2368581/
> > https://patchwork.kernel.org/patch/2
On Fri, 3 May 2013 10:28:02 +0400
Alexander Popov wrote:
> Hello Vinod,
>
> Thanks for the review.
> I will return with improved and tested version 2.
Note that there is a patch for .device_prep_slave_sg() operation
for this driver as part of this series:
https://patchwork.kernel.org/patch/2368
On Wed, 24 Apr 2013 10:55:10 +0800
Tiejun Chen wrote:
> commit 761bbcb7, "usb: ehci-fsl: set INCR8 mode for system bus interface
> on MPC512x", introduced to fix one MPC5121e (M36P) Errata by setting
> INCR8 mode for system bus interface on MPC512x, but we should make sure
> this is only valid fo
On Mon, 08 Apr 2013 12:46:47 +0200
Lars-Peter Clausen wrote:
...
> > +static struct dma_chan *mpc_dma_xlate(struct of_phandle_args *dma_spec,
> > + struct of_dma *ofdma)
> > +{
> > + int count = dma_spec->args_count;
> > + struct mpc_dma *mdma = ofdma-
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