Re: [PATCH] pinctrl: pistachio: Use common error handling code in pistachio_gpio_register()

tter > reused at the end of this function. > > This issue was detected by using the Coccinelle software. > > Signed-off-by: Markus Elfring <elfr...@users.sourceforge.net> Acked-by: Andrew Bresticker <abres...@chromium.org> > --- > drivers/pinctrl/pinctrl-pistachio.c | 19 +

Re: [PATCH] pinctrl: pistachio: Use common error handling code in pistachio_gpio_register()

using the Coccinelle software. > > Signed-off-by: Markus Elfring Acked-by: Andrew Bresticker > --- > drivers/pinctrl/pinctrl-pistachio.c | 19 ++- > 1 file changed, 10 insertions(+), 9 deletions(-) > > diff --git a/drivers/pinctrl/pinctrl-pistachio.c >

Re: [PATCH] arm64: tegra: Add missing Smaug revision

so add it. > > Signed-off-by: Alexandre Courbot <acour...@nvidia.com> Acked-by: Andrew Bresticker <abres...@chromium.org> > --- > arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts

Re: [PATCH] arm64: tegra: Add missing Smaug revision

off-by: Alexandre Courbot Acked-by: Andrew Bresticker > --- > arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts > b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dt

Re: [PATCH v10 1/9] dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding

> +Required properties: > + > +- compatible: Must be: > + - Tegra124: "nvidia,tegra124-xusb-padctl" > + - Tegra132: "nvidia,tegra132-xusb-padctl", "nvidia,tegra124-xusb-padctl" > +- reg: Physical base address and length of the controller's registers. > +- resets: Must contain

Re: [PATCH v10 1/9] dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding

> +Required properties: > + > +- compatible: Must be: > + - Tegra124: "nvidia,tegra124-xusb-padctl" > + - Tegra132: "nvidia,tegra132-xusb-padctl", "nvidia,tegra124-xusb-padctl" > +- reg: Physical base address and length of the controller's registers. > +- resets: Must contain

Re: [PATCH v10 3/9] dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support

On Fri, Mar 4, 2016 at 8:19 AM, Thierry Reding wrote: > From: Thierry Reding > > Extend the binding to cover the set of feature found in Tegra210. > > Signed-off-by: Thierry Reding > +PCIe pad: > +- > + > +Required

Re: [PATCH v10 3/9] dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support

On Fri, Mar 4, 2016 at 8:19 AM, Thierry Reding wrote: > From: Thierry Reding > > Extend the binding to cover the set of feature found in Tegra210. > > Signed-off-by: Thierry Reding > +PCIe pad: > +- > + > +Required properties: > +- clocks: Must contain an entry for each entry in

Re: [PATCH v10 1/9] dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding

Hi Thierry, On Fri, Mar 4, 2016 at 8:19 AM, Thierry Reding wrote: > From: Thierry Reding > > The NVIDIA Tegra XUSB pad controller provides a set of pads, each with a > set of lanes that are used for PCIe, SATA and USB. > > Signed-off-by: Thierry

Re: [PATCH v10 1/9] dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding

Hi Thierry, On Fri, Mar 4, 2016 at 8:19 AM, Thierry Reding wrote: > From: Thierry Reding > > The NVIDIA Tegra XUSB pad controller provides a set of pads, each with a > set of lanes that are used for PCIe, SATA and USB. > > Signed-off-by: Thierry Reding Thanks, this binding looks much better,

Re: [RFC 0/8] Add support for NVIDIA Tegra XUSB

Hi Martyn, On Mon, Nov 2, 2015 at 3:55 AM, Martyn Welch wrote: > This series is based on commits that can be found in the git tree here: > > https://github.com/thierryreding/linux/commits/staging/xhci > > I have included the patches I've used from that tree as patches 1-5. > > The above patches

Re: [PATCH 1/2] Input: Add binding document for a generic ADC keypad

Hi Fabio, On Sun, Nov 1, 2015 at 5:55 AM, Fabio Estevam wrote: > Hi Andrew, > > On Mon, Mar 30, 2015 at 1:56 AM, Andrew Bresticker > wrote: > >>> I'd rather we have it defined explicitly in the binding, i.e. make it a >>> required property? >> >>

Re: [PATCH 1/2] Input: Add binding document for a generic ADC keypad

Hi Fabio, On Sun, Nov 1, 2015 at 5:55 AM, Fabio Estevam <feste...@gmail.com> wrote: > Hi Andrew, > > On Mon, Mar 30, 2015 at 1:56 AM, Andrew Bresticker > <abres...@chromium.org> wrote: > >>> I'd rather we have it defined explicitly in the binding, i.e. make it

Re: [RFC 0/8] Add support for NVIDIA Tegra XUSB

Hi Martyn, On Mon, Nov 2, 2015 at 3:55 AM, Martyn Welch wrote: > This series is based on commits that can be found in the git tree here: > > https://github.com/thierryreding/linux/commits/staging/xhci > > I have included the patches I've used from that tree as

Re: [PATCH 2/2] clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)

> -__clk_get_name(E->clk) > +clk_hw_get_name(E) > > Cc: Heiko Stuebner > Cc: Sylwester Nawrocki > Cc: Tomasz Figa > Cc: Peter De Schrijver > Cc: Prashant Gaikwad > Cc: Stephen Warren > Cc: Thierry Reding > Cc: Alexandre Courbot > Cc: Tero Kristo > Cc:

Re: [PATCH 2/2] clk: Convert __clk_get_name(hw-clk) to clk_hw_get_name(hw)

Reding thierry.red...@gmail.com Cc: Alexandre Courbot gnu...@gmail.com Cc: Tero Kristo t-kri...@ti.com Cc: Ulf Hansson ulf.hans...@linaro.org Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com Cc: Andrew Bresticker abres...@chromium.org Cc: Ezequiel Garcia ezequiel.gar...@imgtec.com Cc

Re: [PATCH v3 00/11] USB: OTG/DRD Core functionality

Hi Roger, On Wed, Jul 15, 2015 at 6:26 AM, Roger Quadros wrote: > Hi Andrew, > > On 13/07/15 22:14, Andrew Bresticker wrote: >> Hi Roger, >> >> On Wed, Jul 8, 2015 at 3:19 AM, Roger Quadros wrote: >>> Usage model: >>> --- >>> >&

Re: [PATCH v3 00/11] USB: OTG/DRD Core functionality

Hi Roger, On Wed, Jul 15, 2015 at 6:26 AM, Roger Quadros rog...@ti.com wrote: Hi Andrew, On 13/07/15 22:14, Andrew Bresticker wrote: Hi Roger, On Wed, Jul 8, 2015 at 3:19 AM, Roger Quadros rog...@ti.com wrote: Usage model: --- - The OTG controller device is assumed

Re: [PATCH v3 00/11] USB: OTG/DRD Core functionality

Hi Peter, On Mon, Jul 13, 2015 at 5:59 PM, Peter Chen wrote: > On Mon, Jul 13, 2015 at 12:14:43PM -0700, Andrew Bresticker wrote: >> Hi Roger, >> >> On Wed, Jul 8, 2015 at 3:19 AM, Roger Quadros wrote: >> > Usage model: >> > --- >>

Re: [PATCH v2 4/8] MIPS: Remove "weak" from get_c0_perfcount_int() declaration

rror instead of calling a random platform's implementation. > > Signed-off-by: Bjorn Helgaas > CC: Andrew Bresticker Reviewed-by: Andrew Bresticker -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majo

Re: [PATCH v2 4/8] MIPS: Remove weak from get_c0_perfcount_int() declaration

. Signed-off-by: Bjorn Helgaas bhelg...@google.com CC: Andrew Bresticker abres...@chromium.org Reviewed-by: Andrew Bresticker abres...@chromium.org -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http

Re: [PATCH v3 00/11] USB: OTG/DRD Core functionality

Hi Peter, On Mon, Jul 13, 2015 at 5:59 PM, Peter Chen peter.c...@freescale.com wrote: On Mon, Jul 13, 2015 at 12:14:43PM -0700, Andrew Bresticker wrote: Hi Roger, On Wed, Jul 8, 2015 at 3:19 AM, Roger Quadros rog...@ti.com wrote: Usage model: --- - The OTG controller device

Re: [PATCH v3 00/11] USB: OTG/DRD Core functionality

Hi Roger, On Wed, Jul 8, 2015 at 3:19 AM, Roger Quadros wrote: > Usage model: > --- > > - The OTG controller device is assumed to be the parent of > the host and gadget controller. It must call usb_otg_register() > before populating the host and gadget devices so that the OTG > core is

Re: [PATCH v3 00/11] USB: OTG/DRD Core functionality

Hi Roger, On Wed, Jul 8, 2015 at 3:19 AM, Roger Quadros rog...@ti.com wrote: Usage model: --- - The OTG controller device is assumed to be the parent of the host and gadget controller. It must call usb_otg_register() before populating the host and gadget devices so that the OTG

Re: [PATCH V2 0/3] Pistachio USB2.0 PHY

On Wed, Jun 3, 2015 at 8:44 AM, Andrew Bresticker wrote: > On Tue, Jun 2, 2015 at 11:07 PM, Kishon Vijay Abraham I wrote: >> >> >> On Monday 11 May 2015 08:15 PM, Kishon Vijay Abraham I wrote: >>> >>> >>> >>> On Tuesday 05 May

Re: [PATCH V2 0/3] Pistachio USB2.0 PHY

On Tue, Jun 2, 2015 at 11:07 PM, Kishon Vijay Abraham I wrote: > > > On Monday 11 May 2015 08:15 PM, Kishon Vijay Abraham I wrote: >> >> >> >> On Tuesday 05 May 2015 11:43 PM, Ezequiel Garcia wrote: >>> >>> Hi Kishon, >>> This series adds support for the USB2.0 PHY present on the IMG

Re: [PATCH V2 0/3] Pistachio USB2.0 PHY

On Wed, Jun 3, 2015 at 8:44 AM, Andrew Bresticker abres...@chromium.org wrote: On Tue, Jun 2, 2015 at 11:07 PM, Kishon Vijay Abraham I kis...@ti.com wrote: On Monday 11 May 2015 08:15 PM, Kishon Vijay Abraham I wrote: On Tuesday 05 May 2015 11:43 PM, Ezequiel Garcia wrote: Hi Kishon

Re: [PATCH V2 0/3] Pistachio USB2.0 PHY

On Tue, Jun 2, 2015 at 11:07 PM, Kishon Vijay Abraham I kis...@ti.com wrote: On Monday 11 May 2015 08:15 PM, Kishon Vijay Abraham I wrote: On Tuesday 05 May 2015 11:43 PM, Ezequiel Garcia wrote: Hi Kishon, This series adds support for the USB2.0 PHY present on the IMG Pistachio SoC.

Re: [PATCH 1/5] usb: xhci: cleanup xhci_hcd allocation

Hi Mathias, On Mon, May 25, 2015 at 8:05 AM, Mathias Nyman wrote: > > I've been testing add/remove HCD extensively and didn't observe any > issues after applying > these 5 patches. Well there is one issue that comes up but it has nothing > to do with xhci > not being

Re: [PATCH v8 0/9] Tegra xHCI support

Hi Jassi, On Mon, May 11, 2015 at 8:56 PM, Jassi Brar wrote: > Applied patches 2, 3, 6 & 7 Please drop patches 6 and 7. Lee Jones has NAK'ed the MFD driver, so I'll have to re-spin this series without using an MFD. Thanks, andrew -- To unsubscribe from this list: send the line "unsubscribe

Re: [PATCH 1/5] usb: xhci: cleanup xhci_hcd allocation

Hi Mathias, On Mon, May 25, 2015 at 8:05 AM, Mathias Nyman mathias.ny...@linux.intel.com wrote: I've been testing add/remove HCD extensively and didn't observe any issues after applying these 5 patches. Well there is one issue that comes up but it has nothing to do with xhci not being

Re: [PATCH v8 0/9] Tegra xHCI support

Hi Jassi, On Mon, May 11, 2015 at 8:56 PM, Jassi Brar jassisinghb...@gmail.com wrote: Applied patches 2, 3, 6 7 Please drop patches 6 and 7. Lee Jones has NAK'ed the MFD driver, so I'll have to re-spin this series without using an MFD. Thanks, andrew -- To unsubscribe from this list: send

Re: [PATCH 6/9] clk: pistachio: Propagate rate changes in the MIPS PLL clock sub-tree

On Fri, May 22, 2015 at 10:52 AM, Ezequiel Garcia wrote: > > > On 05/22/2015 02:42 PM, Andrew Bresticker wrote: >> On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia >> wrote: >>> This commit passes CLK_SET_RATE_PARENT to the "mips_div", >>&g

Re: [PATCH 9/9] clk: pistachio: Correct critical clock list

message could be more descriptive, e.g. explaining which additional clocks must be enabled at all times and why, especially since forcing on clocks form the clock driver is very much frowned upon unless absolutely necessary. Otherwise, Reviewed-by: Andrew Bresticker -- To unsubscribe from this list: send

Re: [PATCH 8/9] clk: pistachio: Add sanity checks on PLL configuration

-by: Kevin Cernekee > Signed-off-by: Ezequiel Garcia Reviewed-by: Andrew Bresticker -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/

Re: [PATCH 7/9] clk: pistachio: Add a rate table for the MIPS PLL

On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia wrote: > This commit adds a rate parameter table, which makes it possible for > the MIPS PLL to support rate change. > > Signed-off-by: Govindraj Raja > Signed-off-by: Ezequiel Garcia > --- > drivers/clk/pistachio/clk-pistachio.c | 12

Re: [PATCH 6/9] clk: pistachio: Propagate rate changes in the MIPS PLL clock sub-tree

On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia wrote: > This commit passes CLK_SET_RATE_PARENT to the "mips_div", > "mips_internal_div", and "mips_pll_mux" clocks. This flag is needed for the > "mips" clock to propagate rate changes up to the "mips_pll" root clock. > > Signed-off-by: Govindraj

Re: [PATCH 5/9] clk: pistachio: Add a MUX_F macro to pass clk_flags

On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia wrote: > As preparation work to support MIPS PLL rate change propagation, this > commit adds a MUX_F macro to pass clk_flags. > > Signed-off-by: Govindraj Raja > Signed-off-by: Ezequiel Garcia > --- a/drivers/clk/pistachio/clk.h > +++

Re: [PATCH 4/9] clk: pistachio: Extend DIV_F to pass clk_flags as well

On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia wrote: > As preparation work to support MIPS PLL rate change propagation, this > commit extends the DIV_F macro to pass clk_flags in addition to div_flags. > > Signed-off-by: Govindraj Raja > Signed-off-by: Ezequiel Garcia Revi

Re: [PATCH 3/9] clk: pistachio: Implement PLL rate adjustment

On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia wrote: > This commit implements small rate changes to the fractional PLL. > This is done using the PLL frac parameter. The .set_rate function > first finds the parameters associated to the closest nominal rate. > > Then the new rate is set, using

Re: [PATCH 3/7] clocksource: mips-gic: Split clocksource and clockevent initialization

On Thu, May 21, 2015 at 3:25 PM, Ezequiel Garcia wrote: > > > On 05/21/2015 07:24 PM, Andrew Bresticker wrote: >> On Thu, May 21, 2015 at 2:37 PM, Ezequiel Garcia >> wrote: >>> This is preparation work for the introduction of clockevent frequency >>> upd

Re: [PATCH 7/7] mips: pistachio: Allow to enable the external timer based clocksource

On Thu, May 21, 2015 at 2:43 PM, Ezequiel Garcia wrote: > This commit introduces a new config, so the user can choose to enable > the General Purpose Timer based clocksource. This option is required > to have CPUFreq support. > > Signed-off-by: Ezequiel Garcia > --- > arch/mips/Kconfig

Re: [PATCH 6/7] clocksource: Add Pistachio clocksource-only driver

On Thu, May 21, 2015 at 2:41 PM, Ezequiel Garcia wrote: > The Pistachio SoC provides four general purpose timers, and allow > to implement a clocksource driver. > > This driver can be used as a replacement for the MIPS GIC and MIPS R4K > clocksources and sched clocks, which are clocked from the

Re: [PATCH 6/7] clocksource: Add Pistachio clocksource-only driver

On Thu, May 21, 2015 at 2:41 PM, Ezequiel Garcia ezequiel.gar...@imgtec.com wrote: The Pistachio SoC provides four general purpose timers, and allow to implement a clocksource driver. This driver can be used as a replacement for the MIPS GIC and MIPS R4K clocksources and sched clocks, which

Re: [PATCH 7/7] mips: pistachio: Allow to enable the external timer based clocksource

On Thu, May 21, 2015 at 2:43 PM, Ezequiel Garcia ezequiel.gar...@imgtec.com wrote: This commit introduces a new config, so the user can choose to enable the General Purpose Timer based clocksource. This option is required to have CPUFreq support. Signed-off-by: Ezequiel Garcia

Re: [PATCH 3/7] clocksource: mips-gic: Split clocksource and clockevent initialization

On Thu, May 21, 2015 at 3:25 PM, Ezequiel Garcia ezequiel.gar...@imgtec.com wrote: On 05/21/2015 07:24 PM, Andrew Bresticker wrote: On Thu, May 21, 2015 at 2:37 PM, Ezequiel Garcia ezequiel.gar...@imgtec.com wrote: This is preparation work for the introduction of clockevent frequency update

Re: [PATCH 3/9] clk: pistachio: Implement PLL rate adjustment

On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia ezequiel.gar...@imgtec.com wrote: This commit implements small rate changes to the fractional PLL. This is done using the PLL frac parameter. The .set_rate function first finds the parameters associated to the closest nominal rate. Then the new

Re: [PATCH 5/9] clk: pistachio: Add a MUX_F macro to pass clk_flags

On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia ezequiel.gar...@imgtec.com wrote: As preparation work to support MIPS PLL rate change propagation, this commit adds a MUX_F macro to pass clk_flags. Signed-off-by: Govindraj Raja govindraj.r...@imgtec.com Signed-off-by: Ezequiel Garcia

Re: [PATCH 6/9] clk: pistachio: Propagate rate changes in the MIPS PLL clock sub-tree

On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia ezequiel.gar...@imgtec.com wrote: This commit passes CLK_SET_RATE_PARENT to the mips_div, mips_internal_div, and mips_pll_mux clocks. This flag is needed for the mips clock to propagate rate changes up to the mips_pll root clock. Signed-off-by:

Re: [PATCH 7/9] clk: pistachio: Add a rate table for the MIPS PLL

On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia ezequiel.gar...@imgtec.com wrote: This commit adds a rate parameter table, which makes it possible for the MIPS PLL to support rate change. Signed-off-by: Govindraj Raja govindraj.r...@imgtec.com Signed-off-by: Ezequiel Garcia

Re: [PATCH 6/9] clk: pistachio: Propagate rate changes in the MIPS PLL clock sub-tree

On Fri, May 22, 2015 at 10:52 AM, Ezequiel Garcia ezequiel.gar...@imgtec.com wrote: On 05/22/2015 02:42 PM, Andrew Bresticker wrote: On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia ezequiel.gar...@imgtec.com wrote: This commit passes CLK_SET_RATE_PARENT to the mips_div, mips_internal_div

Re: [PATCH 4/9] clk: pistachio: Extend DIV_F to pass clk_flags as well

-off-by: Ezequiel Garcia ezequiel.gar...@imgtec.com Reviewed-by: Andrew Bresticker abres...@chromium.org -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

Re: [PATCH 8/9] clk: pistachio: Add sanity checks on PLL configuration

-by: Kevin Cernekee cerne...@chromium.org Signed-off-by: Ezequiel Garcia ezequiel.gar...@imgtec.com Reviewed-by: Andrew Bresticker abres...@chromium.org -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo

Re: [PATCH 9/9] clk: pistachio: Correct critical clock list

, Reviewed-by: Andrew Bresticker abres...@chromium.org -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/

Re: [PATCH 5/7] clocksource: Add Pistachio SoC general purpose timer binding document

On Thu, May 21, 2015 at 2:41 PM, Ezequiel Garcia wrote: > Add a device-tree binding document for the clocksource driver provided > by Pistachio SoC general purpose timers. > > Signed-off-by: Ezequiel Garcia Reviewed-by: Andrew Bresticker -- To unsubscribe from this list: s

Re: [PATCH 4/7] clocksource: mips-gic: Update clockevent frequency on clock rate changes

On Thu, May 21, 2015 at 2:37 PM, Ezequiel Garcia wrote: > This commit introduces the clockevent frequency update, using > a clock notifier. It will be used to support CPUFreq on platforms > using MIPS GIC based clockevents. > > Signed-off-by: Ezequiel Garcia > --- >

Re: [PATCH 3/7] clocksource: mips-gic: Split clocksource and clockevent initialization

On Thu, May 21, 2015 at 2:37 PM, Ezequiel Garcia wrote: > This is preparation work for the introduction of clockevent frequency > update with a clock notifier. This is only possible when the device > is passed a clk struct, so let's split the legacy and devicetree > initialization. > >

Re: [PATCH 2/7] clocksource: mips-gic: Add missing error returns checks

On Thu, May 21, 2015 at 2:37 PM, Ezequiel Garcia wrote: > This commit adds the required checks on the functions that return > an error. Some of them are not critical, so only a warning is > printed. > > Signed-off-by: Ezequiel Garcia Reviewed-by: Andrew Bresticker -- To u

Re: [PATCH 1/7] clocksource: mips-gic: Enable the clock before using it

> > Signed-off-by: Ezequiel Garcia Reviewed-by: Andrew Bresticker -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/

Re: [PATCH 1/7] clocksource: mips-gic: Enable the clock before using it

to clk_put. Signed-off-by: Ezequiel Garcia ezequiel.gar...@imgtec.com Reviewed-by: Andrew Bresticker abres...@chromium.org -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org

Re: [PATCH 2/7] clocksource: mips-gic: Add missing error returns checks

-by: Andrew Bresticker abres...@chromium.org -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/

Re: [PATCH 3/7] clocksource: mips-gic: Split clocksource and clockevent initialization

On Thu, May 21, 2015 at 2:37 PM, Ezequiel Garcia ezequiel.gar...@imgtec.com wrote: This is preparation work for the introduction of clockevent frequency update with a clock notifier. This is only possible when the device is passed a clk struct, so let's split the legacy and devicetree

Re: [PATCH 5/7] clocksource: Add Pistachio SoC general purpose timer binding document

On Thu, May 21, 2015 at 2:41 PM, Ezequiel Garcia ezequiel.gar...@imgtec.com wrote: Add a device-tree binding document for the clocksource driver provided by Pistachio SoC general purpose timers. Signed-off-by: Ezequiel Garcia ezequiel.gar...@imgtec.com Reviewed-by: Andrew Bresticker abres

Re: [PATCH 4/7] clocksource: mips-gic: Update clockevent frequency on clock rate changes

On Thu, May 21, 2015 at 2:37 PM, Ezequiel Garcia ezequiel.gar...@imgtec.com wrote: This commit introduces the clockevent frequency update, using a clock notifier. It will be used to support CPUFreq on platforms using MIPS GIC based clockevents. Signed-off-by: Ezequiel Garcia

Re: [PATCH v8 1/9] xhci: Set shared HCD's hcd_priv in xhci_gen_setup

Hi Mathias, On Mon, May 4, 2015 at 10:36 AM, Andrew Bresticker wrote: > xhci_gen_setup() sets the hcd_priv field for the primary HCD, but not > for the shared HCD, requiring xHCI host-controller drivers to set it > between usb_create_shared_hcd() and usb_add_hcd(). There's

Re: [PATCH v8 4/9] mfd: Add binding document for NVIDIA Tegra XUSB

Lee, On Thu, May 14, 2015 at 10:38 AM, Andrew Bresticker wrote: > On Thu, May 14, 2015 at 12:40 AM, Lee Jones wrote: >> On Thu, 14 May 2015, Jon Hunter wrote: >> >>> Hi Lee, >>> >>> On 13/05/15 15:39, Lee Jones wrote: >>> > On Mon,

Re: [PATCH v8 4/9] mfd: Add binding document for NVIDIA Tegra XUSB

Lee, On Thu, May 14, 2015 at 10:38 AM, Andrew Bresticker abres...@chromium.org wrote: On Thu, May 14, 2015 at 12:40 AM, Lee Jones lee.jo...@linaro.org wrote: On Thu, 14 May 2015, Jon Hunter wrote: Hi Lee, On 13/05/15 15:39, Lee Jones wrote: On Mon, 04 May 2015, Andrew Bresticker wrote

Re: [PATCH v8 1/9] xhci: Set shared HCD's hcd_priv in xhci_gen_setup

Hi Mathias, On Mon, May 4, 2015 at 10:36 AM, Andrew Bresticker abres...@chromium.org wrote: xhci_gen_setup() sets the hcd_priv field for the primary HCD, but not for the shared HCD, requiring xHCI host-controller drivers to set it between usb_create_shared_hcd() and usb_add_hcd(). There's

Re: [PATCH] usb: make module xhci_hcd removable

s PM suspend/resume functions (Debian Bug#666406). > > Signed-off-by: Arthur Demchenkov Oops, sorry about that! Anyway, Reviewed-by: Andrew Bresticker I suppose this should be a considered a stable fix for v3.18 and later. Thanks, Andrew -- To unsubscribe from this list: send the line

Re: [PATCH V2 0/3] Pistachio USB2.0 PHY

On Mon, May 11, 2015 at 7:45 AM, Kishon Vijay Abraham I wrote: > > > On Tuesday 05 May 2015 11:43 PM, Ezequiel Garcia wrote: >> >> Hi Kishon, >> >>> >>> This series adds support for the USB2.0 PHY present on the IMG Pistachio >>> SoC. >>> >>> Based on mips-for-linux-next and tested on the IMG

Re: [PATCH V2 0/3] Pistachio USB2.0 PHY

On Mon, May 11, 2015 at 7:45 AM, Kishon Vijay Abraham I kis...@ti.com wrote: On Tuesday 05 May 2015 11:43 PM, Ezequiel Garcia wrote: Hi Kishon, This series adds support for the USB2.0 PHY present on the IMG Pistachio SoC. Based on mips-for-linux-next and tested on the IMG Pistachio BuB.

Re: [PATCH] usb: make module xhci_hcd removable

as it blocks PM suspend/resume functions (Debian Bug#666406). Signed-off-by: Arthur Demchenkov spinal...@gmail.com Oops, sorry about that! Anyway, Reviewed-by: Andrew Bresticker abres...@chromium.org I suppose this should be a considered a stable fix for v3.18 and later. Thanks, Andrew

Re: [PATCH v8 4/9] mfd: Add binding document for NVIDIA Tegra XUSB

On Thu, May 14, 2015 at 12:40 AM, Lee Jones wrote: > On Thu, 14 May 2015, Jon Hunter wrote: > >> Hi Lee, >> >> On 13/05/15 15:39, Lee Jones wrote: >> > On Mon, 04 May 2015, Andrew Bresticker wrote: >> > >> >> Add a binding document for the XUS

Re: [PATCH v8 4/9] mfd: Add binding document for NVIDIA Tegra XUSB

On Thu, May 14, 2015 at 12:40 AM, Lee Jones lee.jo...@linaro.org wrote: On Thu, 14 May 2015, Jon Hunter wrote: Hi Lee, On 13/05/15 15:39, Lee Jones wrote: On Mon, 04 May 2015, Andrew Bresticker wrote: Add a binding document for the XUSB host complex on NVIDIA Tegra124 and later SoCs

Re: [PATCH v8 4/9] mfd: Add binding document for NVIDIA Tegra XUSB

On Wed, May 13, 2015 at 9:50 AM, Lee Jones wrote: > On Wed, 13 May 2015, Andrew Bresticker wrote: > >> Lee, >> >> On Wed, May 13, 2015 at 7:39 AM, Lee Jones wrote: >> > On Mon, 04 May 2015, Andrew Bresticker wrote: >> > >> >> Add a binding

Re: [PATCH v8 5/9] mfd: Add driver for NVIDIA Tegra XUSB

Lee, On Wed, May 13, 2015 at 7:37 AM, Lee Jones wrote: > On Mon, 04 May 2015, Andrew Bresticker wrote: > >> Add an MFD driver for the XUSB host complex found on NVIDIA Tegra124 >> and later SoCs. > > What else does it do besides USB? Nothing - it's just the xHCI hos

Re: [PATCH v8 4/9] mfd: Add binding document for NVIDIA Tegra XUSB

Lee, On Wed, May 13, 2015 at 7:39 AM, Lee Jones wrote: > On Mon, 04 May 2015, Andrew Bresticker wrote: > >> Add a binding document for the XUSB host complex on NVIDIA Tegra124 >> and later SoCs. The XUSB host complex includes a mailbox for >> communication with t

Re: [PATCH v8 5/9] mfd: Add driver for NVIDIA Tegra XUSB

Lee, On Wed, May 13, 2015 at 7:37 AM, Lee Jones lee.jo...@linaro.org wrote: On Mon, 04 May 2015, Andrew Bresticker wrote: Add an MFD driver for the XUSB host complex found on NVIDIA Tegra124 and later SoCs. What else does it do besides USB? Nothing - it's just the xHCI host controller

Re: [PATCH v8 4/9] mfd: Add binding document for NVIDIA Tegra XUSB

Lee, On Wed, May 13, 2015 at 7:39 AM, Lee Jones lee.jo...@linaro.org wrote: On Mon, 04 May 2015, Andrew Bresticker wrote: Add a binding document for the XUSB host complex on NVIDIA Tegra124 and later SoCs. The XUSB host complex includes a mailbox for communication with the XUSB micro

Re: [PATCH v8 4/9] mfd: Add binding document for NVIDIA Tegra XUSB

On Wed, May 13, 2015 at 9:50 AM, Lee Jones lee.jo...@linaro.org wrote: On Wed, 13 May 2015, Andrew Bresticker wrote: Lee, On Wed, May 13, 2015 at 7:39 AM, Lee Jones lee.jo...@linaro.org wrote: On Mon, 04 May 2015, Andrew Bresticker wrote: Add a binding document for the XUSB host complex

Re: [PATCH v8 6/9] mailbox: Add NVIDIA Tegra XUSB mailbox binding

On Fri, May 8, 2015 at 1:42 PM, Benson Leung wrote: > On Mon, May 4, 2015 at 10:36 AM, Andrew Bresticker > wrote: >> + - compatible: For Tegra124, must contain "nvidia,tegra124-xusb-mbox". >> + Otherwise, must contain '"nvidia,-xusb-mbox", >> + &qu

Re: [PATCH v8 6/9] mailbox: Add NVIDIA Tegra XUSB mailbox binding

On Fri, May 8, 2015 at 1:42 PM, Benson Leung ble...@chromium.org wrote: On Mon, May 4, 2015 at 10:36 AM, Andrew Bresticker abres...@chromium.org wrote: + - compatible: For Tegra124, must contain nvidia,tegra124-xusb-mbox. + Otherwise, must contain 'nvidia,chip-xusb-mbox, + nvidia,tegra124

[PATCH V5] pinctrl: Add Pistachio SoC pin control driver

Signed-off-by: Andrew Bresticker Cc: James Hartley Cc: James Hogan --- Changes from v4: - Switched to using gpiochip_add_pin_range(). - Fixed up Kconfig entry. Changes from v3: - Addressed review comments from Ezequiel. Changes from v2: - Removed module stuff which would be compiled out

Re: [PATCH V4 2/2] pinctrl: Add Pistachio SoC pin control driver

Hi Linus, On Wed, May 6, 2015 at 12:14 AM, Linus Walleij wrote: > Hi Andrew and sorry for a slow review process, I've been > overloaded :( > > On Wed, Apr 29, 2015 at 3:13 AM, Andrew Bresticker > wrote: > >> Add a driver for the pin controller present on the IMG Pista

Re: [PATCH V4 2/2] pinctrl: Add Pistachio SoC pin control driver

Hi Linus, On Wed, May 6, 2015 at 12:14 AM, Linus Walleij linus.wall...@linaro.org wrote: Hi Andrew and sorry for a slow review process, I've been overloaded :( On Wed, Apr 29, 2015 at 3:13 AM, Andrew Bresticker abres...@chromium.org wrote: Add a driver for the pin controller present

[PATCH V5] pinctrl: Add Pistachio SoC pin control driver

-by: Ezequiel Garcia ezequiel.gar...@imgtec.com Signed-off-by: Kevin Cernekee cerne...@chromium.org Signed-off-by: Andrew Bresticker abres...@chromium.org Cc: James Hartley james.hart...@imgtec.com Cc: James Hogan james.ho...@imgtec.com --- Changes from v4: - Switched to using gpiochip_add_pin_range

Re: [PATCH V2 1/3] phy: Add binding document for Pistachio USB2.0 PHY

On Tue, May 5, 2015 at 4:35 PM, James Hogan wrote: > On Tue, May 05, 2015 at 04:09:31PM -0700, Andrew Bresticker wrote: >> On Tue, May 5, 2015 at 3:43 PM, James Hogan wrote: >> > On Tue, May 05, 2015 at 03:16:23PM -0700, Andrew Bresticker wrote: >> >> Hi James, &

Re: [PATCH V2 1/3] phy: Add binding document for Pistachio USB2.0 PHY

On Tue, May 5, 2015 at 3:43 PM, James Hogan wrote: > On Tue, May 05, 2015 at 03:16:23PM -0700, Andrew Bresticker wrote: >> Hi James, >> >> On Tue, May 5, 2015 at 3:01 PM, James Hogan wrote: >> > Hi Andrew, >> > >> > On Tue, Apr 07, 2015 at 03:0

Re: [PATCH V2 1/3] phy: Add binding document for Pistachio USB2.0 PHY

Hi James, On Tue, May 5, 2015 at 3:01 PM, James Hogan wrote: > Hi Andrew, > > On Tue, Apr 07, 2015 at 03:04:16PM -0700, Andrew Bresticker wrote: >> Add a binding document for the USB2.0 PHY found on the IMG Pistachio SoC. >> >> Signed-off-by: Andrew Bresticker >&

Re: [PATCH V2 1/3] phy: Add binding document for Pistachio USB2.0 PHY

On Tue, May 5, 2015 at 3:43 PM, James Hogan james.ho...@imgtec.com wrote: On Tue, May 05, 2015 at 03:16:23PM -0700, Andrew Bresticker wrote: Hi James, On Tue, May 5, 2015 at 3:01 PM, James Hogan james.ho...@imgtec.com wrote: Hi Andrew, On Tue, Apr 07, 2015 at 03:04:16PM -0700, Andrew

Re: [PATCH V2 1/3] phy: Add binding document for Pistachio USB2.0 PHY

On Tue, May 5, 2015 at 4:35 PM, James Hogan james.ho...@imgtec.com wrote: On Tue, May 05, 2015 at 04:09:31PM -0700, Andrew Bresticker wrote: On Tue, May 5, 2015 at 3:43 PM, James Hogan james.ho...@imgtec.com wrote: On Tue, May 05, 2015 at 03:16:23PM -0700, Andrew Bresticker wrote: Hi James

Re: [PATCH V2 1/3] phy: Add binding document for Pistachio USB2.0 PHY

Hi James, On Tue, May 5, 2015 at 3:01 PM, James Hogan james.ho...@imgtec.com wrote: Hi Andrew, On Tue, Apr 07, 2015 at 03:04:16PM -0700, Andrew Bresticker wrote: Add a binding document for the USB2.0 PHY found on the IMG Pistachio SoC. Signed-off-by: Andrew Bresticker abres...@chromium.org

Re: [PATCH v4 02/20] clk: tegra: periph: add new periph clks and muxes for Tegra210

Hi Rhyland, On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein wrote: > Tegra210 has significant differences in muxes for peripheral clocks. > One of the most important changes is that pll_m isn't to be used > as a source for peripherals. Therefore, we need to define the new > muxes and new clocks to

[PATCH v8 3/9] mailbox: Fix up error handling in mbox_request_channel()

of NULL so that the error can be propagated back to the caller of mbox_request_channel(). Signed-off-by: Benson Leung Signed-off-by: Andrew Bresticker Acked-by: Suman Anna Cc: Jassi Brar --- No changes from v7. Changes from v6: - Update omap-mailbox's xlate() to return error codes. No changes from

[PATCH v8 5/9] mfd: Add driver for NVIDIA Tegra XUSB

Add an MFD driver for the XUSB host complex found on NVIDIA Tegra124 and later SoCs. Signed-off-by: Andrew Bresticker Cc: Samuel Ortiz Cc: Lee Jones --- Changes from v7: - Have child nodes get non-shared memory and interrupts from DT. - Use of_platform_populate rather than mfd_add_devices

[PATCH v8 6/9] mailbox: Add NVIDIA Tegra XUSB mailbox binding

Add device-tree bindings for the Tegra XUSB mailbox which will be used for communication between the Tegra xHCI controller's firmware and the host processor. Signed-off-by: Andrew Bresticker Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Jassi Brar

[PATCH v8 8/9] usb: Add NVIDIA Tegra xHCI controller binding

Add device-tree binding documentation for the xHCI controller present on Tegra124 and later SoCs. Signed-off-by: Andrew Bresticker Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Mathias Nyman Cc: Greg Kroah-Hartman --- Changes from v7: - Added back

[PATCH v8 9/9] usb: xhci: Add NVIDIA Tegra xHCI host-controller driver

firmware. The controller also supports USB device mode as well as powergating of the SuperSpeed and host-controller logic when not in use, but support for these is not yet implemented. Based on work by: Ajay Gupta Bharath Yadav Signed-off-by: Andrew Bresticker Cc: Mathias Nyman Cc: Greg Kroah

[PATCH v8 7/9] mailbox: Add NVIDIA Tegra XUSB mailbox driver

driver. The requesting driver is assigned one of two virtual channels when the single physical channel is requested. All incoming messages are sent to both virtual channels. Signed-off-by: Andrew Bresticker Cc: Jassi Brar --- Changes from v7: - Don't reset ownership of mailbox for messages

[PATCH v8 4/9] mfd: Add binding document for NVIDIA Tegra XUSB

Add a binding document for the XUSB host complex on NVIDIA Tegra124 and later SoCs. The XUSB host complex includes a mailbox for communication with the XUSB micro-controller and an xHCI host-controller. Signed-off-by: Andrew Bresticker Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian

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