x.c: In function ‘lan78xx_set_suspend’:
> drivers/net/usb/lan78xx.c:3807:6: warning: variable ‘ret’ set but not used
> [-Wunused-but-set-variable]
>
> Cc: Woojung Huh
> Cc: Microchip Linux Driver Support
> Cc: "David S. Miller"
> Cc: Jakub Kicinski
> Cc: net...@vger.kernel.org
> Cc: linux-...@vger.kernel.org
> Signed-off-by: Lee Jones
Reviewed-by: Andrew Lunn
Andrew
On Wed, Nov 04, 2020 at 09:06:00AM +, Lee Jones wrote:
> 'status' is used to interact with a hardware register. It might not
> be safe to remove it entirely. Mark it as __maybe_unused instead.
Hi Lee
https://www.mail-archive.com/netdev@vger.kernel.org/msg365875.html
I'm working on
> >> +static int
> >> +ax88796c_set_tunable(struct net_device *ndev, const struct
> >> ethtool_tunable *tuna,
> >> + const void *data)
> >> +{
> >> + struct ax88796c_device *ax_local = to_ax88796c_device(ndev);
> >> +
> >> + switch (tuna->id) {
> >> + case
> +config SPI_AX88796C_COMPRESSION
> + bool "SPI transfer compression"
> + default n
> + depends on SPI_AX88796C
> + help
> + Say Y here to enable SPI transfer compression. It saves up
> + to 24 dummy cycles during each transfer which may noticably
> + speed up
> > > > drivers/net/phy/dp83td510.c:70:11: warning: symbol
> > > > 'dp83td510_feature_array' was not declared. Should it be static?
> > > I did not see this warning. Did you use W=1?
> > I _think_ that one is W=1. All the PHY drivers are W=1 clean, and i
> > want to keep it that way. And i hope
On Tue, Nov 03, 2020 at 11:09:44AM -0600, Dan Murphy wrote:
> Hello
>
> On 10/30/20 6:03 PM, Jakub Kicinski wrote:
> > On Fri, 30 Oct 2020 12:29:50 -0500 Dan Murphy wrote:
> > > The DP83TD510E is an ultra-low power Ethernet physical layer transceiver
> > > that supports 10M single pair cable.
> >
On Tue, Nov 03, 2020 at 11:07:00AM -0600, Dan Murphy wrote:
> Andrew
>
> On 10/30/20 3:15 PM, Andrew Lunn wrote:
> > > +static int dp83td510_config_init(struct phy_device *phydev)
> > > +{
> > > + struct dp83td510_private *dp83td510 = phydev->priv;
> &g
> Do you have any issue with the property being in the ethernet-phy.yaml?
It seems generic enough. Increasing the voltage increases the power
requirements, and maybe not all boards are capable of that.
Andrew
ana
I did some quick testing with the Marvell PHY. This is one of the
drivers you have not changed. But it at least tests some of the core
changes.
Tested-by: Andrew Lunn
I will try to review the actual changes soon.
Andrew
On Tue, Nov 03, 2020 at 07:01:05PM +0530, Radhey Shyam Pandey wrote:
> From: Shravya Kumbham
>
> Add ret variable, conditions to check the return value and it's error
> path for of_address_to_resource() and phy_read() functions.
>
> Addresses-Coverity: Event check_return value.
Hi Radhey
This
On Mon, Nov 02, 2020 at 06:12:32PM -0800, Florian Fainelli wrote:
>
>
> On 11/2/2020 5:34 PM, Pavana Sharma wrote:
> >> How many times have i asked for you to add kerneldoc for this new
> >> value? How many times have you not done so?
> >
> > I have added kerneldoc comment for the new value
> I did some investigation and now I have some details.
> The term 'PHY' described in Ether Group Spec should be the PCS + PMA, a figure
> below for one configuration:
>
> ++ +-+
> | Host Side Ether Group | | XL710 |
> |
On Mon, Nov 02, 2020 at 04:43:09PM +1000, Pavana Sharma wrote:
> Returning 0 is no more an error case with MV88E6393 family
> which has serdes lane numbers 0, 9 or 10.
> So with this change .serdes_get_lane will return lane number
> or error (-ENODEV).
>
> Signed-off-by: Pavana Sharma
> ---
>
> @@ -985,12 +985,12 @@ int mv88e6390_serdes_get_regs_len(struct mv88e6xxx_chip
> *chip, int port)
> void mv88e6390_serdes_get_regs(struct mv88e6xxx_chip *chip, int port, void
> *_p)
> {
> u16 *p = _p;
> - int lane;
> + int lane = -ENODEV;
> u16 reg;
> int i;
The
On Mon, Nov 02, 2020 at 04:40:02PM +1000, Pavana Sharma wrote:
> Thanks for the review.
> Here's updated patchset.
Please include a short description of what you have changed since the
last version. It helps us as maintainers see if you have attempted to
make the changes we have requested, or
On Mon, Nov 02, 2020 at 04:42:06PM +1000, Pavana Sharma wrote:
> Add 5GBASE-R phy interface mode
>
> Signed-off-by: Pavana Sharma
How many times have i asked for you to add kerneldoc for this new
value? How many times have you not done so?
NACK.
If you don't understand a comment, please ask.
On Sun, Nov 01, 2020 at 10:54:38PM +0300, Sergej Bauer wrote:
> > > Signed-off-by: Sergej Bauer
> >
> > * I miss a change description here.
> The reason for the fix is when the device is down netdev->phydev will be NULL
> and there is no checking for this situation. So 'ethtool ethN' leads to
On Sat, Oct 31, 2020 at 11:10:53AM +0800, YueHaibing wrote:
> gpiod_to_irq() never return 0, but returns negative in
> case of error, check it and set gpio_irq to 0.
>
> Fixes: 73970055450e ("sfp: add SFP module support")
> Signed-off-by: YueHaibing
Reviewed-by: Andrew Lunn
Andrew
> So, then re-send for this or just this patch ping?
> Naturally, this is for net-next.
> I don't mind doing either way.
Please resend, with all the acked-by, reviewed-by added, now that
net-next is open.
Andrew
> Sure, I just wanted to add the comment before others simply copy and
> paste this (pseudo) code. And in patch 9 (aquantia) and 18 (realtek)
> it is used as is. And IIRC at least the Aquantia PHY doesn't mask
> the interrupt status.
And that is were we are going to have issues with this patch
> > - Every PHY driver gains a .handle_interrupt() implementation that, for
> > the most part, would look like below:
> >
> > irq_status = phy_read(phydev, INTR_STATUS);
> > if (irq_status < 0) {
> > phy_error(phydev);
> > return IRQ_NONE;
> > }
> >
> >
ed-off-by: Ivan Mikhaylov
Reviewed-by: Andrew Lunn
Andrew
On Fri, Oct 30, 2020 at 04:37:07PM +0300, Ivan Mikhaylov wrote:
> Add the phy-handle and MDIO description and add the example with
> PHY and MDIO nodes.
>
> Signed-off-by: Ivan Mikhaylov
Reviewed-by: Andrew Lunn
Andrew
> +static int dp83td510_config_init(struct phy_device *phydev)
> +{
> + struct dp83td510_private *dp83td510 = phydev->priv;
> + int mst_slave_cfg;
> + int ret = 0;
> +
> + if (phy_interface_is_rgmii(phydev)) {
> + if (dp83td510->rgmii_delay) {
> +
On Fri, Oct 30, 2020 at 12:29:48PM -0500, Dan Murphy wrote:
> Per the 802.3cg spec the 10base T1L can operate at 2 different
> differential voltages 1v p2p and 2.4v p2p. The abiility of the PHY to
> drive that output is dependent on the PHY's on board power supply.
Hi Dan
So this property is
0:00:00:00:00:00
> Current message level: 0x (0)
>
> Link detected: yes
>
> Signed-off-by: Dan Murphy
Reviewed-by: Andrew Lunn
Andrew
ixes: f58d2598cf70 ("net: dsa: qca8k: implement the port MTU callbacks")
> Cc: sta...@vger.kernel.org
> Signed-off-by: Jonathan McDowell
Reviewed-by: Andrew Lunn
Andrew
tion 2.5Gbps single port PHY
> RTL8221B-VM-CG: the 2.5Gbps single port PHY with MACsec feature
>
> This patch adds the minimal drivers to manage these transceivers.
>
> Signed-off-by: Willy Liu
Reviewed-by: Andrew Lunn
Andrew
> >> +static irqreturn_t ax88796c_interrupt(int irq, void *dev_instance)
> >> +{
> >> + struct net_device *ndev = dev_instance;
> >> + struct ax88796c_device *ax_local = to_ax88796c_device(ndev);
Do the assignment later.
Andrew
On Thu, Oct 29, 2020 at 08:07:57PM +0800, Willy Liu wrote:
> Realtek single-port 2.5Gbps Ethernet PHY ids as below:
> RTL8226-CG: 0x001cc800(ES)/0x001cc838(MP)
> RTL8226B-CG/RTL8221B-CG: 0x001cc840(ES)/0x001cc848(MP)
> ES: engineer sample
> MP: mass production
>
> Since above PHYs are already in
On Thu, Oct 29, 2020 at 03:25:25PM +0530, Bhaskar Chowdhury wrote:
> Fixed spelling in comment like below:
>
> s/defalut/default/p
>
> This is in linux-next.
>
> Signed-off-by: Bhaskar Chowdhury
Reviewed-by: Andrew Lunn
Andrew
On Thu, Oct 29, 2020 at 03:42:00PM +1000, Pavana Sharma wrote:
> Add new mode supported by MV88E6393 family.
Hi Pavana
I asked you to add kerneldoc for this new value, but you have not
added it. Please compile your code with W=1, and you should see the
warning.
Andrew
On Thu, Oct 29, 2020 at 10:33:52AM +0800, Zou Wei wrote:
> Fix the following coccinelle report:
>
> ./drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c:233:6-8:
> WARNING: possible condition with no effect (if == else)
>
> Both branches are the same, so remove the else if/else altogether.
>
On Thu, Oct 29, 2020 at 10:30:14AM +0800, Zou Wei wrote:
> Fix the following coccinelle report:
>
> ./drivers/net/ethernet/nvidia/forcedeth.c:3479:8-10:
> WARNING: possible condition with no effect (if == else)
>
> Both branches are the same, so remove the else if/else altogether.
>
>
> +static void
> +ax88796c_get_regs(struct net_device *ndev, struct ethtool_regs *regs, void
> *_p)
> +{
> + struct ax88796c_device *ax_local = to_ax88796c_device(ndev);
> + u16 *p = _p;
> + int offset, i;
You missed a reverse christmass tree fix here.
> +static int comp;
> +static
On Wed, Oct 28, 2020 at 10:08:27AM +1000, Pavana Sharma wrote:
> Add new mode supported by MV88E6393 family.
>
> Signed-off-by: Pavana Sharma
> ---
> include/linux/phy.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/include/linux/phy.h b/include/linux/phy.h
> index
On Wed, Oct 28, 2020 at 10:09:12AM +1000, Pavana Sharma wrote:
> Add 5GBASE-R phy interface mode supported by mv88e6393
> family.
>
> Signed-off-by: Pavana Sharma
Reviewed-by: Andrew Lunn
Andrew
On Wed, Oct 28, 2020 at 10:09:50AM +1000, Pavana Sharma wrote:
> The Marvell 88E6393X device is a single-chip integration of a 11-port
> Ethernet switch with eight integrated Gigabit Ethernet (GbE) transceivers
> and three 10-Gigabit interfaces.
>
> This patch adds functionalities specific to
On Tue, Oct 27, 2020 at 08:56:09PM +, Chris Packham wrote:
>
> On 24/10/20 11:42 am, Andrew Lunn wrote:
> >> +int mv88e6123_serdes_get_regs_len(struct mv88e6xxx_chip *chip, int port)
> >> +{
> >> + if (mv88e6xxx_serdes_get_lane(chip, por
On Tue, Oct 27, 2020 at 05:49:23PM +0300, Ivan Mikhaylov wrote:
> Split MDIO registration and PHY connect into ftgmac100_setup_mdio and
> ftgmac100_mii_probe.
>
> Signed-off-by: Ivan Mikhaylov
Reviewed-by: Andrew Lunn
Andrew
On Tue, Oct 27, 2020 at 05:49:24PM +0300, Ivan Mikhaylov wrote:
> phy-handle can't be handled well for ast2400/2500 which has an embedded
> MDIO controller. Add ftgmac100_mdio_setup for ast2400/2500 and initialize
> PHYs from mdio child node with of_mdiobus_register.
>
> Signed-off-by: Ivan
disabled.
>
> Suggested-by: Andrew Lunn
> Signed-off-by: Łukasz Stelmach
Reviewed-by: Andrew Lunn
Andrew
turns that both the C and the H files have the same
> kernel-doc markup for the same functions. Let's drop the
> at the header file, keeping the one closer to the code.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Andrew Lunn
Andrew
fca3878a5fb ("ch_ktls: Issue if connection offload fails")
> Signed-off-by: Arnd Bergmann
Hi Arnd
I have the same fix in my tree of W=1 fixes. I was just waiting for
net-next to open.
Reviewed-by: Andrew Lunn
Andrew
rgmann
Hi Arnd
It is nice to have the additional type checking.
Since you added a Fixes: tag, do you want this in stable?
netdev puts into the Subject line the tree it is intended for:
[PATCH net v1]
or
[PATCH net-next v1]
Anyway:
Reviewed-by: Andrew Lunn
Andrew
> > > > Do you really mean PHY? I actually expect it is PCS?
> > >
> > > For this implementation, yes.
> >
> > Yes, you have a PHY? Or Yes, it is PCS?
>
> Sorry, I mean I have a PHY.
>
> >
> > To me, the phylib maintainer, having a PHY means you have a base-T
> > interface, 25Gbase-T,
> + {
> + extphy: ethernet-phy@0 {
> + reg = <1>;
If reg = 1, then this should be ethernet-phy@1
Andrew
On Mon, Oct 26, 2020 at 03:58:11PM +1000, Pavana Sharma wrote:
> Signed-off-by: Pavana Sharma
Please swap the order of the patches so the build does not break.
Andrew
On Mon, Oct 26, 2020 at 10:47:36AM +0100, Mauro Carvalho Chehab wrote:
> Some functions have different names between their prototypes
> and the kernel-doc markup.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Andrew Lunn
Andrew
> > > +The Intel(R) PAC N3000 is a FPGA based SmartNIC platform for
> > > multi-workload
> > > +networking application acceleration. A simple diagram below to for the
> > > board:
> > > +
> > > + ++
> > > + |
> > +u64 read_mac_stats(struct eth_com *ecom, unsigned int addr)
> > +{
> > + u32 data_l, data_h;
> > +
> > + if (eth_com_read_reg(ecom, addr, _l) ||
> > + eth_com_read_reg(ecom, addr + 1, _h))
> > + return 0xULL;
> return -1; ?
Since this is a u64 function, i
On Sat, Oct 24, 2020 at 10:36:36AM -0700, Tom Rix wrote:
>
> On 10/24/20 9:39 AM, Andrew Lunn wrote:
> > On Sat, Oct 24, 2020 at 08:03:51AM -0700, Tom Rix wrote:
> >> On 10/23/20 1:45 AM, Xu Yilun wrote:
> >>> This driver supports the ethernet reti
On Sat, Oct 24, 2020 at 07:09:53PM +0100, Russell King - ARM Linux admin wrote:
> On Sat, Oct 24, 2020 at 07:17:05PM +0200, Andrew Lunn wrote:
> > > - Every PHY driver gains a .handle_interrupt() implementation that, for
> > > the most part, would look like below:
>
> - Every PHY driver gains a .handle_interrupt() implementation that, for
> the most part, would look like below:
>
> irq_status = phy_read(phydev, INTR_STATUS);
> if (irq_status < 0) {
> phy_error(phydev);
> return IRQ_NONE;
> }
>
> if
On Sat, Oct 24, 2020 at 08:03:51AM -0700, Tom Rix wrote:
>
> On 10/23/20 1:45 AM, Xu Yilun wrote:
> > This driver supports the ethernet retimers (Parkvale) for the Intel PAC
> > (Programmable Acceleration Card) N3000, which is a FPGA based Smart NIC.
>
> Parkvale is a code name, it would be
> +++ b/Documentation/ABI/testing/sysfs-class-net-dfl-eth-group
> @@ -0,0 +1,19 @@
> +What:/sys/class/net//tx_pause_frame_quanta
> +Date:Oct 2020
> +KernelVersion: 5.11
> +Contact: Xu Yilun
> +Description:
> + Read-Write. Value representing
> fault distance registers, CDIAG_FLT_DIST_0, CDIAG_FLT_DIST_1,
> CDIAG_FLT_DIST_2, and CDIAG_FLT_DIST_3, Address 0xBA21 to Address 0xBA24).
>
> This change implements support for this using phylib's cable-test support.
>
> Signed-off-by: Alexandru Ardelean
Reviewed-by: Andrew Lu
DIAG_CLK_EN bit (13) is cleared, to disable the
> diagnostics clock.
>
> Signed-off-by: Alexandru Ardelean
Reviewed-by: Andrew Lunn
Andrew
> +int mv88e6123_serdes_get_regs_len(struct mv88e6xxx_chip *chip, int port)
> +{
> + if (mv88e6xxx_serdes_get_lane(chip, port) == 0)
> + return 0;
> +
> + return 26 * sizeof(u16);
> +}
Hi Chris
Where did 26 come from?
Andrew
now the read was good. This will mean that failed values will
> return 0x.
>
> Signed-off-by: Chris Packham
Reviewed-by: Andrew Lunn
Andrew
ffs with lines of context instead of the usual three.
to increase the number of lines of context. Often three lines is not
enough to include the function declaration in the patch, so i need to
go look at the sources to do a review.
Reviewed-by: Andrew Lunn
Andrew
On Fri, Oct 23, 2020 at 12:56:21PM +0200, Oleksij Rempel wrote:
> Most of CAN PHYs (transceivers) are not attached to any data bus, so we
> are not able to communicate with them. For this case, we introduce a CAN
> specific virtual bus to make use of existing PHY framework.
I don't think you are
On Fri, Oct 23, 2020 at 12:56:20PM +0200, Oleksij Rempel wrote:
> This patch set is introducing PHY support for CAN.
The device tree binding needs documenting.
It might also help me get my head around the virtual MDIO bus and how
PHYs are added to it.
Andrew
On Fri, Oct 23, 2020 at 12:56:23PM +0200, Oleksij Rempel wrote:
> Signed-off-by: Oleksij Rempel
> ---
> drivers/net/phy/phy.c | 2 ++
> include/linux/phy.h | 3 +++
> 2 files changed, 5 insertions(+)
>
> diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
> index
On Fri, Oct 23, 2020 at 12:56:21PM +0200, Oleksij Rempel wrote:
> Most of CAN PHYs (transceivers) are not attached to any data bus, so we
> are not able to communicate with them. For this case, we introduce a CAN
> specific virtual bus to make use of existing PHY framework.
>
> Signed-off-by:
> Yes there is: have your Ethernet PHY compatible string be of the form
> "ethernet." and then there is no need for such hacking.
> of_get_phy_id() will parse that compatible and that will trigger
> of_mdiobus_register_phy() to take the phy_device_create() path.
Yep. That does seem like
Hi Xu
Before i look at the other patches, i want to understand the
architecture properly.
> +===
> +DFL device driver for Ether Group private feature on Intel(R) PAC N3000
>
On Fri, Oct 23, 2020 at 12:00:30PM +0200, Oleksij Rempel wrote:
> This patch replaces the spaces in the indention of the 56G PHYs by
> proper tabs.
Hi Oleksij
The change itself is O.K.
However, please put in the subject line which tree it is for,
[PATCH net-next v2] ...
Also, net next is
> For example, Turris MOX board which is also A3720 based has optional
> SDIO module which can be plugged / unplugged, standard variant is sold
> without it and in DTS file is this node always enabled:
I think the Turris has quite a sophisticated bootloader which
manipulates the DT to fit the
> i'll think about the frame-generator;
Here were the two main problems i can remember with my first version:
How do you discover what is can actually do? You probably need to
collect up all the open PHY datasheets and get an idea what the
different vendors provide, what is common, what could be
> Actually, I'd also be interested [for this PHY], to report a
> "significance impedance" detection, which is similar to the
> short-detection that is already done.
You can add that as just another element of the enum.
> At first, this report would sound like it could be interesting; but
> feel
> The frame-generator is an interesting feature of the PHY, that's not
> useful for the current phylib; the PHY can send packages [like a
> signal generator], and then these can be looped back, or sent over the
> wire.
Many PHYs that that. I posted some patches to the list a few years ago
adding
> Signed-off-by: Alexandru Ardelean
Hi Alexandru
Overall, this looks good.
> +static int adin_cable_test_report_trans(int result)
> +{
> + int mask;
> +
> + if (result & ADIN1300_CDIAG_RSLT_GOOD)
> + return ETHTOOL_A_CABLE_RESULT_CODE_OK;
> + if (result &
On Wed, Oct 21, 2020 at 04:51:39PM +0300, Alexandru Ardelean wrote:
> The LINKING_EN bit is always cleared during reset. Initially it was set
> during the downshift setup, because it's in the same register as the
> downshift retry count (PHY_CTRL1).
Hi Alexandru
For those of us how have not read
Hi Chris
> So far I've not needed to use interrupts from the 6097. It's connected
> on my hardware but never been tested.
The mv88e6xxx driver will also poll the interrupt bits, if the
interrupt is not wired to a GPIO.
> There are a couple of SERDES LinkInt bits in the Global2 interrupt
>
> Humm. Are 1v and 2.4v advertised so it can be auto negotiated? Maybe a
> PHY tunable is not correct? Is this voltage selection actually more
> like pause and EEE?
[Goes and looks at the datasheet]
Register 0x20E, bit 13:
1 = Advertise that the 10BASE-T1L PHY has increased transmit/
receive
> + ti,master-slave-mode:
> +$ref: /schemas/types.yaml#definitions/uint32
> +default: 0
> +description: |
> + Force the PHY to be configured to a specific mode.
> + Force Auto Negotiation - 0
> + Force Master mode at 1v p2p - 1
> + Force Master mode at 2.4v p2p - 2
> > It's still there. The speed/duplex etc are read from the serdes PHY
> > via mv88e6390_serdes_pcs_get_state(). When the link comes up, we
> > pass the negotiated link parameters read from there to the link_up()
> > functions. For ports where mv88e6xxx_port_ppu_updates() returns false
> > (no
;in-band-status"' don't force
> > > the link up, the switch MAC will detect the link status correctly.
> > >
> > > Signed-off-by: Chris Packham
> > > Reviewed-by: Andrew Lunn
> >
> > I thought we had issues with the 88E6390 where the PCS does not
&
> HW team says no to interoperability. So we can just add T1L and advertise
> that type.
>
> The DP83TD510L capability is limited to 10Base-T1L only.
Thanks for checking. We will avoid issues getting this correct from
the start, rather than adding it later, like we did for other T1 PHYs.
t; without a PHY.
>
> Signed-off-by: Chris Packham
Reviewed-by: Andrew Lunn
Just a nit pick below.
> +int mv88e6185_serdes_power(struct mv88e6xxx_chip *chip, int port, u8 lane,
> +bool up)
> +{
> + /* The serdes power can't be controll
disabled.
>
> Suggested-by: Andrew Lunn
> Signed-off-by: Łukasz Stelmach
Hi Łukasz
Reviewed-by: Andrew Lunn
You should repost once net-next has reopened for commits in a weeks
time.
Andrew
On Mon, Oct 19, 2020 at 04:33:18PM -0500, Dan Murphy wrote:
> Andrew
>
> On 10/16/20 5:02 PM, Andrew Lunn wrote:
> > On Thu, Oct 08, 2020 at 11:23:47AM -0500, Dan Murphy wrote:
> > > The DP83TD510E is an ultra-low power Ethernet physical layer transceiver
> > > th
On Mon, Oct 19, 2020 at 05:05:08PM +0300, michael alayev wrote:
> Hello Andrew,
>
>
> > Please fix your email client and
>
>
> > post the DT file for review. I will
>
> > then point out some of the errors.
>
>
>
> {
> status = "okay";
> phy-mode =
> I looked and I looked and I didn't see how I could reasonably manage
> asynchronous start_xmit calls, the work queue also supports at the
> moment.
O.K, keep it, since it has other uses. If it was just for interrupt
handling, threaded IRQs could of simplified the code. But it looks
like you
On Mon, Oct 19, 2020 at 10:04:08AM +0200, Pali Rohár wrote:
> Hello! Gregory, I would like to remind you following patch.
Hi Pali
Since the merge window is open at the moment, no new patches will be
accepted until it closes.
You should resend once -rc1 is out.
Andrew
On Sun, Oct 18, 2020 at 09:15:52PM +, Chris Packham wrote:
>
> On 19/10/20 9:25 am, Andrew Lunn wrote:
> >> I assume you're talking about the PHY Control Register 0 bit 11. If so
> >> that's for the internal PHYs on ports 0-7. Ports 8, 9 and 10 don't have
> >
> I assume you're talking about the PHY Control Register 0 bit 11. If so
> that's for the internal PHYs on ports 0-7. Ports 8, 9 and 10 don't have
> PHYs.
Hi Chris
I have a datasheet for the 6122/6121, from some corner of the web,
Part 3 of 3, Gigabit PHYs and SERDES.
On Tue, Oct 13, 2020 at 03:18:58PM +1300, Chris Packham wrote:
> Implement serdes_power, serdes_get_lane and serdes_pcs_get_state ops for
> the MV88E6097 so that ports 8 & 9 can be supported as serdes ports and
> directly connected to other network interfaces or to SFPs without a PHY.
>
>
On Tue, Oct 13, 2020 at 03:18:57PM +1300, Chris Packham wrote:
> When a port is configured with 'managed = "in-band-status"' don't force
> the link up, the switch MAC will detect the link status correctly.
>
> Signed-off-by: Chris Packham
Reviewed-by: Andrew Lunn
Andrew
On Sun, Oct 18, 2020 at 10:18:53AM +0300, michael alayev wrote:
> Hello andrew,
> > This is pretty unreadable with all the white space removed.
> > Please could you post again with the white space.
> Its formatted better here:
> https://stackoverflow.com/q/64301750/8926995?sem=2
Better, but the
> - err = mdiobus_register(priv->mii_bus);
> + mdio_np = of_get_child_by_name(np, "mdio");
> + if (mdio_np)
> + err = of_mdiobus_register(priv->mii_bus, mdio_np);
> + else
> + err = mdiobus_register(priv->mii_bus);
of_mdiobus_register() will do the right
On Thu, Oct 15, 2020 at 03:49:16PM +0300, Ivan Mikhaylov wrote:
> Split MDIO registration and PHY connect into ftgmac100_setup_mdio and
> ftgmac100_mii_probe.
>
> Signed-off-by: Ivan Mikhaylov
> ---
> drivers/net/ethernet/faraday/ftgmac100.c | 92
> 1 file changed, 47
> +static void mv88e6393x_phylink_validate(struct mv88e6xxx_chip *chip, int
> port,
> + unsigned long *mask,
> + struct phylink_link_state *state)
> +{
> + if (port == 0 || port >= 9) {
> + phylink_set(mask,
> + if (priv->is_aspeed &&
> + phy_intf != PHY_INTERFACE_MODE_RMII &&
> + phy_intf != PHY_INTERFACE_MODE_RGMII &&
> + phy_intf != PHY_INTERFACE_MODE_RGMII_ID &&
> + phy_intf != PHY_INTERFACE_MODE_RGMII_RXID &&
> +
On Thu, Oct 08, 2020 at 11:23:47AM -0500, Dan Murphy wrote:
> The DP83TD510E is an ultra-low power Ethernet physical layer transceiver
> that supports 10M single pair cable.
Hi Dan
I think you are going to have to add
ETHTOOL_LINK_MODE_10baseT1_Full_BIT? We already have 100T1 and 1000T1,
but not
On Fri, Oct 16, 2020 at 11:19:30PM +0300, Vladimir Oltean wrote:
> On Fri, Oct 16, 2020 at 10:14:28PM +0200, Andrew Lunn wrote:
> > On Fri, Oct 16, 2020 at 08:33:17PM +0300, Vladimir Oltean wrote:
> > > On Sat, Oct 17, 2020 at 01:25:08AM +0800, kernel test robot wrote:
&g
On Fri, Oct 16, 2020 at 09:37:22PM +0200, Lukasz Stelmach wrote:
> It was <2020-10-16 pią 20:09>, when Andrew Lunn wrote:
> > On Thu, Oct 15, 2020 at 10:44:35AM +0200, Łukasz Stelmach wrote:
> >> Do not report advertised link modes (local and remote) when
> >&
On Fri, Oct 16, 2020 at 08:33:17PM +0300, Vladimir Oltean wrote:
> On Sat, Oct 17, 2020 at 01:25:08AM +0800, kernel test robot wrote:
> > Hi Christian,
> >
> > Thank you for the patch! Yet something to improve:
> >
> > [auto build test ERROR on net/master]
> >
> > url:
> >
On Thu, Oct 15, 2020 at 10:44:35AM +0200, Łukasz Stelmach wrote:
> Do not report advertised link modes (local and remote) when
> autonegotiation is turned off. mii_ethtool_get_link_ksettings() exhibits
> the same behaviour and this patch aims at unifying the behavior of both
> functions.
Does
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