[PATCHv4] irqchip: arm-gic: take gic_lock when updating irq type

2018-03-28 Thread Aniruddha Banerjee
From: Aniruddha Banerjee <anirudd...@nvidia.com> The kernel documentation states that the locking of the irq-chip registers should be handled by the irq-chip driver. In the irq-gic, the accesses to the irqchip are seemingly not protected and multiple writes to SPIs from different irq descr

[PATCHv4] irqchip: arm-gic: take gic_lock when updating irq type

2018-03-28 Thread Aniruddha Banerjee
From: Aniruddha Banerjee The kernel documentation states that the locking of the irq-chip registers should be handled by the irq-chip driver. In the irq-gic, the accesses to the irqchip are seemingly not protected and multiple writes to SPIs from different irq descriptors do RMW requests without

[PATCHv3] irqchip: arm-gic: take gic_lock when updating irq type

2018-03-28 Thread Aniruddha Banerjee
. When multiple irqs call the request_irq at the same time, there can be a simultaneous write at the gic distributor, leading to a race. Acquire the gic_lock when the irq_type is updated. Signed-off-by: Aniruddha Banerjee <anirudd...@nvidia.com> --- Changes from V1: * Moved the spinlock from i

[PATCHv3] irqchip: arm-gic: take gic_lock when updating irq type

2018-03-28 Thread Aniruddha Banerjee
. When multiple irqs call the request_irq at the same time, there can be a simultaneous write at the gic distributor, leading to a race. Acquire the gic_lock when the irq_type is updated. Signed-off-by: Aniruddha Banerjee --- Changes from V1: * Moved the spinlock from irq-gic to irq-gic common, so

[PATCHv2] irqchip: arm-gic: take gic_lock when updating irq type

2018-03-27 Thread Aniruddha Banerjee
. When multiple irqs call the request_irq at the same time, there can be a simultaneous write at the gic distributor, leading to a race. Acquire the gic_lock when the irq_type is updated. Signed-off-by: Aniruddha Banerjee <aniruddha.n...@gmail.com> --- drivers/irqchip/irq-gic-common

[PATCHv2] irqchip: arm-gic: take gic_lock when updating irq type

2018-03-27 Thread Aniruddha Banerjee
. When multiple irqs call the request_irq at the same time, there can be a simultaneous write at the gic distributor, leading to a race. Acquire the gic_lock when the irq_type is updated. Signed-off-by: Aniruddha Banerjee --- drivers/irqchip/irq-gic-common.c | 8 +++- 1 file changed, 7

[RFC PATCH] irqchip: arm-gic: take gic_lock when updating irq type

2018-03-22 Thread Aniruddha Banerjee
as an RFC in case I am missing anything. Signed-off-by: Aniruddha Banerjee <anirudd...@nvidia.com> --- drivers/irqchip/irq-gic.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 4c797b43614d..61380f5a2254

[RFC PATCH] irqchip: arm-gic: take gic_lock when updating irq type

2018-03-22 Thread Aniruddha Banerjee
as an RFC in case I am missing anything. Signed-off-by: Aniruddha Banerjee --- drivers/irqchip/irq-gic.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 4c797b43614d..61380f5a2254 100644 --- a/drivers/irqchip

[PATCH 1/1] arm64: tegra: fix PPI interrupt flag

2017-04-03 Thread Aniruddha Banerjee
The interrupt flag for PPI should not be set to any value, since the register is read-only. Fix the flags for the PPI interrupts to IRQ_TYPE_NONE, so that there is no write to the read-only register. Signed-off-by: Aniruddha Banerjee <anirudd...@nvidia.com> --- arch/arm64/boot/dts/

[PATCH 1/1] arm64: tegra: fix PPI interrupt flag

2017-04-03 Thread Aniruddha Banerjee
The interrupt flag for PPI should not be set to any value, since the register is read-only. Fix the flags for the PPI interrupts to IRQ_TYPE_NONE, so that there is no write to the read-only register. Signed-off-by: Aniruddha Banerjee --- arch/arm64/boot/dts/nvidia/tegra132.dtsi | 8

RE: [PATCH 1/1] irq: add IRQF_TRIGGER_MASK on PPI by default

2017-03-31 Thread Aniruddha Banerjee
> On 31/03/17 , Marc Zyngier wrote: > On 31/03/17 09:01, Thomas Gleixner wrote: > > On Thu, 30 Mar 2017, Aniruddha Banerjee wrote: > > > >> add IRQF_TRIGGER_MASK on PPI by default so that the PPIs are not > >> configured as edge-triggered, which may be wrong

RE: [PATCH 1/1] irq: add IRQF_TRIGGER_MASK on PPI by default

2017-03-31 Thread Aniruddha Banerjee
> On 31/03/17 , Marc Zyngier wrote: > On 31/03/17 09:01, Thomas Gleixner wrote: > > On Thu, 30 Mar 2017, Aniruddha Banerjee wrote: > > > >> add IRQF_TRIGGER_MASK on PPI by default so that the PPIs are not > >> configured as edge-triggered, which may be wrong

[PATCH 1/1] irq: add IRQF_TRIGGER_MASK on PPI by default

2017-03-30 Thread Aniruddha Banerjee
add IRQF_TRIGGER_MASK on PPI by default so that the PPIs are not configured as edge-triggered, which may be wrong for certain GIC implementations such as the GIC-400 Signed-off-by: Aniruddha Banerjee <anirudd...@nvidia.com> --- kernel/irq/manage.c | 2 +- 1 file changed, 1 insertion

[PATCH 1/1] irq: add IRQF_TRIGGER_MASK on PPI by default

2017-03-30 Thread Aniruddha Banerjee
add IRQF_TRIGGER_MASK on PPI by default so that the PPIs are not configured as edge-triggered, which may be wrong for certain GIC implementations such as the GIC-400 Signed-off-by: Aniruddha Banerjee --- kernel/irq/manage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[RFC] hung_task: task white-listing for hung tasks

2016-05-12 Thread Aniruddha Banerjee
Hello, In the current hung_task framework, there is no way to white-list tasks for which a higher hang time out might be acceptable and expected even: Usecase: I want to keep a low hung_task timeout to catch more tasks which are hung-up. However, certain tasks (like sync, which flushes to a

[RFC] hung_task: task white-listing for hung tasks

2016-05-12 Thread Aniruddha Banerjee
Hello, In the current hung_task framework, there is no way to white-list tasks for which a higher hang time out might be acceptable and expected even: Usecase: I want to keep a low hung_task timeout to catch more tasks which are hung-up. However, certain tasks (like sync, which flushes to a