Use usb_put_hdc to release hdc allocated by usb_create_hcd.
This is needed to handle sub-allocations and HCD sharing correctly.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/staging/octeon-usb/octeon-hcd.c | 6 +++---
1 file changed, 3 insertions(+), 3 del
Use usb_put_hdc to release hdc allocated by usb_create_hcd.
This is needed to handle sub-allocations and HCD sharing correctly.
Signed-off-by: Anton Bondarenko
---
drivers/staging/octeon-usb/octeon-hcd.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason(), it is a preceding
change to defer SPI DMA initialization, if SDMA module is not yet
available.
Signed-off-by: Vladimir Zapolskiy
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi
If controller hold in reset it's not possible to write any
register except CTRL. So all other registers must be updated
only after controller bring out from reset.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
If SPI device supports DMA mode, but DMA controller is not yet
available due to e.g. a delay in the corresponding kernel module
initialization, retry to initialize SPI driver later on instead of
falling back into PIO only mode.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 3
3d a4 6a 6a 3a 52 52 7a 36
RX0080: 06 20 a7 93 1b 34 dd 4c f5 ec
Zeros at offset 33 and 34 caused by reading empty RX FIFO which not possible
if DMA RX read was triggered by RX event. This mean DMA was triggered
by RX TAIL event.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 4
DMA transfer for SPI was limited to up to 8 bits word size until now.
Sync in SPI burst size and DMA bus width is necessary to correctly
support 16 and 32 BPW.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 121 +++---
1 file changed, 95
This series is to complement commits already applied to topic/imx branch
Changes since V5:
* Fix for commit "spi: imx: Add loopback mode support"
* Addressed some comments from Sascha Hauer for DMA initialization error report
* Fixed 32 bytes transaction. It will be DMA now.
Anton
.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 26 +++---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index 08492d6..d74d809 100644
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
@@ -56,7
Limit SPI_LOOP mode to ECSPI controller (iMX.51, iMX53 and i.MX6) only since
there is no support in other families specific code for now.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi
transfer->len % wml for DMA capable transactions will always be 0
due to recent change in can_dma checks. So it's safe to remove dead code
in processing DMA.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 13 -
1 file changed, 13 deletions(-)
diff --git a/drivers/
On 2015-12-07 10:42, Sascha Hauer wrote:
On Sat, Dec 05, 2015 at 05:57:06PM +0100, Anton Bondarenko wrote:
RX DMA tail data handling doesn't work correctly in many cases with current
implementation. It happens because SPI core was setup to generates both RX
and RX TAIL events. And RX TAIL
On 2015-12-07 10:32, Sascha Hauer wrote:
On Sat, Dec 05, 2015 at 05:57:04PM +0100, Anton Bondarenko wrote:
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason(), it is a preceding
change to defer SPI DMA initialization, if SDMA module
On 2015-12-07 10:27, Sascha Hauer wrote:
On Sat, Dec 05, 2015 at 05:57:03PM +0100, Anton Bondarenko wrote:
Support for ECSPI loopback for IMX51, IMX53 and IMX6Q using TEST register.
Signed-off-by: Mohsin Kazmi
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 19
DMA transfer for SPI was limited to up to 8 bits word size until now.
Sync in SPI burst size and DMA bus width is necessary to correctly
support 16 and 32 BPW.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c
Limit SPI_LOOP mode to ECSPI controller (iMX.51, iMX53 and i.MX6) only since
there is no support in other families specific code for now.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 11 ++-
1 file changed, 6 insertions(+), 5 del
This series is to complement commits already applied to topic/imx branch
Changes since V5:
* Fix for commit "spi: imx: Add loopback mode support"
* Addressed some comments from Sascha Hauer for DMA initialization error report
* Fixed 32 bytes transaction. It will be DMA now.
Anton
transfer->len % wml for DMA capable transactions will always be 0
due to recent change in can_dma checks. So it's safe to remove dead code
in processing DMA.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 13 -
1 file ch
If SPI device supports DMA mode, but DMA controller is not yet
available due to e.g. a delay in the corresponding kernel module
initialization, retry to initialize SPI driver later on instead of
falling back into PIO only mode.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.
3d a4 6a 6a 3a 52 52 7a 36
RX0080: 06 20 a7 93 1b 34 dd 4c f5 ec
Zeros at offset 33 and 34 caused by reading empty RX FIFO which not possible
if DMA RX read was triggered by RX event. This mean DMA was triggered
by RX TAIL event.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason(), it is a preceding
change to defer SPI DMA initialization, if SDMA module is not yet
available.
Signed-off-by: Vladimir Zapolskiy <vladimir_zapols...@mentor.com>
Signed-off-by:
If controller hold in reset it's not possible to write any
register except CTRL. So all other registers must be updated
only after controller bring out from reset.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 4 +++-
1 file changed, 3 inse
.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 26 +++---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index 08492d6..d74d809 100644
--- a/drivers/spi/spi-imx.c
On 2015-12-07 10:27, Sascha Hauer wrote:
On Sat, Dec 05, 2015 at 05:57:03PM +0100, Anton Bondarenko wrote:
Support for ECSPI loopback for IMX51, IMX53 and IMX6Q using TEST register.
Signed-off-by: Mohsin Kazmi <mohsin_ka...@mentor.com>
Signed-off-by: Anton Bondarenko <anton.bon
On 2015-12-07 10:32, Sascha Hauer wrote:
On Sat, Dec 05, 2015 at 05:57:04PM +0100, Anton Bondarenko wrote:
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason(), it is a preceding
change to defer SPI DMA initialization, if SDMA module
On 2015-12-07 10:42, Sascha Hauer wrote:
On Sat, Dec 05, 2015 at 05:57:06PM +0100, Anton Bondarenko wrote:
RX DMA tail data handling doesn't work correctly in many cases with current
implementation. It happens because SPI core was setup to generates both RX
and RX TAIL events. And RX TAIL
Not only TX DMA should be terminated, but RX DMA also. It's required
to avoid accidential DMA memory writes from RX DMA channel and properly
terminate transaction.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spi-imx.c
:
* Split [PATCH v4 01] into several smaller commits
* Change [PATCH v4 01] into workaround to disable DMA for transfer which len
mod WML
not equal 0
* Rework some patches to isolate changes in one place
Anton Bondarenko (11):
spi: imx: terminate RX DMA transaction in case of TX DMA timeout
There is no need to have different watermarks levels since they are the same.
Merge them into one WML parameter.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 29 +
1 file changed, 13 insertions(+), 16 deletions(-)
diff --git a/drivers/spi/spi-imx.c b
If SPI device supports DMA mode, but DMA controller is not yet
available due to e.g. a delay in the corresponding kernel module
initialization, retry to initialize SPI driver later on instead of
falling back into PIO only mode.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 3
Support for ECSPI loopback for IMX51, IMX53 and IMX6Q using TEST register.
Signed-off-by: Mohsin Kazmi
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi
.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 33 +++--
1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index adfa9cf..f7ee288 100644
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
actual
data transfer.
The risk rise in case of heavy system load and high SPI clock.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index fb3bcc4..17e8f9e 100644
6a 6a 3a 52 52 7a 36
RX0080: 06 20 a7 93 1b 34 dd 4c f5 ec
Zeros at offset 33 and 34 caused by reading empty RX FIFO which not possible
if DMA RX read was triggered by RX event. This mean DMA was triggered
by RX TAIL event.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 4 ++--
1
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason(), it is a preceding
change to defer SPI DMA initialization, if SDMA module is not yet
available.
Signed-off-by: Vladimir Zapolskiy
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi
transfer->len % wml for DMA capable transactions will always be 0
due to recent change in can_dma checks. So it's safe to remove dead code
in processing DMA.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 13 -
1 file changed, 13 deletions(-)
diff --git a/drivers/
DMA transfer for SPI was limited to up to 8 bits word size until now.
Sync in SPI burst size and DMA bus width is necessary to correctly
support 16 and 32 BPW.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 121 +++---
1 file changed, 95
Similar to other controller type checks add check function for
IMX51. It includes IMX53 and IMX6.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index f811f68
.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 33 +++--
1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index adfa9cf..f7ee288 100644
--- a/drivers/spi/spi
If SPI device supports DMA mode, but DMA controller is not yet
available due to e.g. a delay in the corresponding kernel module
initialization, retry to initialize SPI driver later on instead of
falling back into PIO only mode.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.
Not only TX DMA should be terminated, but RX DMA also. It's required
to avoid accidential DMA memory writes from RX DMA channel and properly
terminate transaction.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 1 +
1 file changed, 1 ins
:
* Split [PATCH v4 01] into several smaller commits
* Change [PATCH v4 01] into workaround to disable DMA for transfer which len
mod WML
not equal 0
* Rework some patches to isolate changes in one place
Anton Bondarenko (11):
spi: imx: terminate RX DMA transaction in case of TX DMA timeout
There is no need to have different watermarks levels since they are the same.
Merge them into one WML parameter.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 29 +
1 file changed, 13 insertions(+), 16 deletions(-)
Similar to other controller type checks add check function for
IMX51. It includes IMX53 and IMX6.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-i
DMA transfer for SPI was limited to up to 8 bits word size until now.
Sync in SPI burst size and DMA bus width is necessary to correctly
support 16 and 32 BPW.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason(), it is a preceding
change to defer SPI DMA initialization, if SDMA module is not yet
available.
Signed-off-by: Vladimir Zapolskiy <vladimir_zapols...@mentor.com>
Signed-off-by:
transfer->len % wml for DMA capable transactions will always be 0
due to recent change in can_dma checks. So it's safe to remove dead code
in processing DMA.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 13 -
1 file ch
Support for ECSPI loopback for IMX51, IMX53 and IMX6Q using TEST register.
Signed-off-by: Mohsin Kazmi <mohsin_ka...@mentor.com>
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 19 ---
1 file changed, 16 insertions(+),
actual
data transfer.
The risk rise in case of heavy system load and high SPI clock.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/s
6a 6a 3a 52 52 7a 36
RX0080: 06 20 a7 93 1b 34 dd 4c f5 ec
Zeros at offset 33 and 34 caused by reading empty RX FIFO which not possible
if DMA RX read was triggered by RX event. This mean DMA was triggered
by RX TAIL event.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.
On 2015-11-30 09:29, Sascha Hauer wrote:
On Sat, Nov 28, 2015 at 12:15:59AM +0100, Anton Bondarenko wrote:
New implementation change handling of RX data tail. DMA is used to process
all TX data and only full chunks of RX data with size aligned to FIFO/2.
Driver is waiting until both TX and RX
On 2015-11-30 09:29, Sascha Hauer wrote:
On Sat, Nov 28, 2015 at 12:15:59AM +0100, Anton Bondarenko wrote:
New implementation change handling of RX data tail. DMA is used to process
all TX data and only full chunks of RX data with size aligned to FIFO/2.
Driver is waiting until both TX and RX
PIO.
Transfer triggering changed to avoid RX data loss.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 115 +-
1 file changed, 76 insertions(+), 39 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index 0e5723a
DMA transfer for SPI was limited to up to 8 bits word size until now.
Sync in SPI burst size and DMA bus width is necessary to correctly
support other BPW supported by HW.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 133 ++
1 file
:
Addressed comments from V3 review, simplified timeout calculation
Anton Bondarenko (7):
spi: imx: Fix DMA transfer
spi: imx: replace fixed timeout with calculated one
spi: imx: add support for all SPI word width for DMA transfer
spi: imx: add function to check for IMX51 family controller
Similar to other controller type checks add check function for
IMX51. This also includes IMX53 and IMX6.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index
-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 36
1 file changed, 28 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index bd7b721..4770d81 100644
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
@@ -57,7
If SPI device supports DMA mode, but DMA controller is not yet
available due to e.g. a delay in the corresponding kernel module
initialization, retry to initialize SPI driver later on instead of
falling back into PIO only mode.
Signed-off-by: Vladimir Zapolskiy
Signed-off-by: Anton Bondarenko
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason(), it is a preceding
change to defer SPI DMA initialization, if SDMA module is not yet
available.
Signed-off-by: Vladimir Zapolskiy
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi
Support for ECSPI loopback for IMX51,IMX53 and IMX6Q using TEST register.
Signed-off-by: Mohsin Kazmi
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
DMA transfer for SPI was limited to up to 8 bits word size until now.
Sync in SPI burst size and DMA bus width is necessary to correctly
support other BPW supported by HW.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c
PIO.
Transfer triggering changed to avoid RX data loss.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 115 +-
1 file changed, 76 insertions(+), 39 deletions(-)
diff --git a/drivers/spi/spi-i
:
Addressed comments from V3 review, simplified timeout calculation
Anton Bondarenko (7):
spi: imx: Fix DMA transfer
spi: imx: replace fixed timeout with calculated one
spi: imx: add support for all SPI word width for DMA transfer
spi: imx: add function to check for IMX51 family controller
Similar to other controller type checks add check function for
IMX51. This also includes IMX53 and IMX6.
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi
-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 36
1 file changed, 28 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index bd7b721..4770d81 100644
--- a/drivers/spi/spi-imx.c
Support for ECSPI loopback for IMX51,IMX53 and IMX6Q using TEST register.
Signed-off-by: Mohsin Kazmi <mohsin_ka...@mentor.com>
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 19 ---
1 file changed, 16 insertions(+),
com>
Signed-off-by: Anton Bondarenko <anton.bondarenko.s...@gmail.com>
---
drivers/spi/spi-imx.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index aaa32c2..c2edd0f 100644
--- a/drivers/spi/spi-imx.c
+++ b/dri
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason(), it is a preceding
change to defer SPI DMA initialization, if SDMA module is not yet
available.
Signed-off-by: Vladimir Zapolskiy <vladimir_zapols...@mentor.com>
Signed-off-by:
On 17.11.2015 16:24, Joshua Clayton wrote:
Add input file support to facilitate testing larger data.
Signed-off-by: Joshua Clayton
---
Documentation/spi/spidev_test.c | 42 -
1 file changed, 41 insertions(+), 1 deletion(-)
diff --git
On 17.11.2015 16:24, Joshua Clayton wrote:
Add input file support to facilitate testing larger data.
Signed-off-by: Joshua Clayton
---
Documentation/spi/spidev_test.c | 42 -
1 file changed, 41 insertions(+), 1 deletion(-)
On 01.11.2015 15:41, Anton Bondarenko wrote:
From: Anton Bondarenko
DMA transfer for SPI was limited to up to 8 bits word size until now.
Sync in SPI burst size and DMA bus width is necessary to correctly
support other BPW supported by HW.
Signed-off-by: Anton Bondarenko
---
drivers/spi
On 01.11.2015 15:41, Anton Bondarenko wrote:
From: Anton Bondarenko
Support for ECSPI loopback for IMX51,IMX53 and IMX6Q using TEST register.
Signed-off-by: Mohsin Kazmi
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 19 ---
1 file changed, 16 insertions
On 01.11.2015 15:41, Anton Bondarenko wrote:
From: Anton Bondarenko
Similar to other controller type checks add check function for
IMX51. This also includes IMX53 and IMX6.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 9 +++--
1 file changed, 7 insertions(+), 2
On 05.11.2015 17:00, Anton Bondarenko wrote:
On 05.11.2015 09:56, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:40PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason
On 05.11.2015 17:00, Anton Bondarenko wrote:
On 05.11.2015 09:56, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:40PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason
On 05.11.2015 17:51, Anton Bondarenko wrote:
On 05.11.2015 09:34, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:35PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko
RX DMA tail data handling doesn't work correctly in many cases with
current implementation. It happens because SPI
On 05.11.2015 17:18, Anton Bondarenko wrote:
On 05.11.2015 09:59, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:41PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko
If SPI device supports DMA mode, but DMA controller is not yet
available due to e.g. a delay in the corresponding
On 11.11.2015 09:12, Sascha Hauer wrote:
On Tue, Nov 10, 2015 at 09:20:06PM +0100, Anton Bondarenko wrote:
On 05.11.2015 09:47, Sascha Hauer wrote:
@@ -890,12 +891,40 @@ static void spi_imx_dma_tx_callback(void *cookie)
complete(_imx->dma_tx_completion);
}
+static
On 05.11.2015 17:00, Anton Bondarenko wrote:
On 05.11.2015 09:56, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:40PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko <anton_bondare...@mentor.com>
On SDMA initialization return exactly the same error, which is
re
On 05.11.2015 17:51, Anton Bondarenko wrote:
On 05.11.2015 09:34, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:35PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko <anton_bondare...@mentor.com>
RX DMA tail data handling doesn't work correctly in many cases with
c
On 05.11.2015 17:18, Anton Bondarenko wrote:
On 05.11.2015 09:59, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:41PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko <anton_bondare...@mentor.com>
If SPI device supports DMA mode, but DMA controller is not yet
available due
On 11.11.2015 09:12, Sascha Hauer wrote:
On Tue, Nov 10, 2015 at 09:20:06PM +0100, Anton Bondarenko wrote:
On 05.11.2015 09:47, Sascha Hauer wrote:
@@ -890,12 +891,40 @@ static void spi_imx_dma_tx_callback(void *cookie)
complete(_imx->dma_tx_completion);
}
+static
On 01.11.2015 15:41, Anton Bondarenko wrote:
From: Anton Bondarenko <anton_bondare...@mentor.com>
DMA transfer for SPI was limited to up to 8 bits word size until now.
Sync in SPI burst size and DMA bus width is necessary to correctly
support other BPW supported by HW.
Signed-off-by:
On 05.11.2015 17:00, Anton Bondarenko wrote:
On 05.11.2015 09:56, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:40PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko <anton_bondare...@mentor.com>
On SDMA initialization return exactly the same error, which is
re
On 01.11.2015 15:41, Anton Bondarenko wrote:
From: Anton Bondarenko <anton_bondare...@mentor.com>
Support for ECSPI loopback for IMX51,IMX53 and IMX6Q using TEST register.
Signed-off-by: Mohsin Kazmi <mohsin_ka...@mentor.com>
Signed-off-by: Anton Bondarenko <anton_bondar
On 01.11.2015 15:41, Anton Bondarenko wrote:
From: Anton Bondarenko <anton_bondare...@mentor.com>
Similar to other controller type checks add check function for
IMX51. This also includes IMX53 and IMX6.
Signed-off-by: Anton Bondarenko <anton_bondare...@mentor.com>
---
drivers/s
On 05.11.2015 09:47, Sascha Hauer wrote:
@@ -890,12 +891,40 @@ static void spi_imx_dma_tx_callback(void *cookie)
complete(_imx->dma_tx_completion);
}
+static int spi_imx_calculate_timeout(struct spi_imx_data *spi_imx, int size)
+{
+ unsigned long coef1 = 1;
+ unsigned
On 05.11.2015 09:47, Sascha Hauer wrote:
@@ -890,12 +891,40 @@ static void spi_imx_dma_tx_callback(void *cookie)
complete(_imx->dma_tx_completion);
}
+static int spi_imx_calculate_timeout(struct spi_imx_data *spi_imx, int size)
+{
+ unsigned long coef1 = 1;
+ unsigned
On 05.11.2015 09:34, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:35PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko
RX DMA tail data handling doesn't work correctly in many cases with
current implementation. It happens because SPI core was setup
to generates both RX watermark
On 05.11.2015 09:59, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:41PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko
If SPI device supports DMA mode, but DMA controller is not yet
available due to e.g. a delay in the corresponding kernel module
initialization, retry to initialize
On 05.11.2015 09:56, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:40PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason(), it is a preceding
change to defer SPI DMA
On 05.11.2015 09:59, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:41PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko <anton_bondare...@mentor.com>
If SPI device supports DMA mode, but DMA controller is not yet
available due to e.g. a delay in the corresponding kernel
On 05.11.2015 09:34, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:35PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko <anton_bondare...@mentor.com>
RX DMA tail data handling doesn't work correctly in many cases with
current implementation. It happens because SPI core was
On 05.11.2015 09:56, Sascha Hauer wrote:
On Sun, Nov 01, 2015 at 03:41:40PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko <anton_bondare...@mentor.com>
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason(), it is a pre
On 03.11.2015 08:08, Robin Gong wrote:
On Sun, Nov 01, 2015 at 03:41:35PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko
RX DMA tail data handling doesn't work correctly in many cases with
current implementation. It happens because SPI core was setup
to generates both RX watermark
On 03.11.2015 08:08, Robin Gong wrote:
On Sun, Nov 01, 2015 at 03:41:35PM +0100, Anton Bondarenko wrote:
From: Anton Bondarenko <anton_bondare...@mentor.com>
RX DMA tail data handling doesn't work correctly in many cases with
current implementation. It happens because SPI core was
From: Anton Bondarenko
Support for ECSPI loopback for IMX51,IMX53 and IMX6Q using TEST register.
Signed-off-by: Mohsin Kazmi
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi
From: Anton Bondarenko
Fixed timeout value can fire while transaction is ongoing. This may happen
because there are no strict requirements on SPI transaction duration.
Dynamic timeout value is generated based on SCLK and transaction size.
There is also 4 * SCLK delay between TX bursts related
From: Anton Bondarenko
On SDMA initialization return exactly the same error, which is
reported by dma_request_slave_channel_reason(), it is a preceding
change to defer SPI DMA initialization, if SDMA module is not yet
available.
Signed-off-by: Vladimir Zapolskiy
Signed-off-by: Anton Bondarenko
From: Anton Bondarenko
Similar to other controller type checks add check function for
IMX51. This also includes IMX53 and IMX6.
Signed-off-by: Anton Bondarenko
---
drivers/spi/spi-imx.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-imx.c b
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