> -Original Message-
> From: Marc Zyngier
> Sent: 2021年1月28日 17:02
> To: Biwen Li (OSS)
> Cc: mark.rutl...@arm.com; Leo Li ; t...@linutronix.de;
> linux-kernel@vger.kernel.org; Jiafei Pan ;
> linux-arm-ker...@lists.infradead.org; Ran Wang
> Subject: Re: [v2]
> -Original Message-
> From: Marc Zyngier
> Sent: 2021年1月27日 19:38
> To: Biwen Li (OSS)
> Cc: mark.rutl...@arm.com; Leo Li ; t...@linutronix.de;
> ja...@lakedaemon.net; linux-kernel@vger.kernel.org; Jiafei Pan
> ; linux-arm-ker...@lists.infradead.org; Ran Wang
&g
-Original Message-
From: Marc Zyngier
Sent: 2021年1月26日 22:01
To: Biwen Li (OSS)
Cc: mark.rutl...@arm.com; Leo Li ; t...@linutronix.de;
linux-kernel@vger.kernel.org; Jiafei Pan ;
linux-arm-ker...@lists.infradead.org; Ran Wang ; Biwen Li
Subject: Re: [PATCH] irqchip: ls-extirq: add
>
> On Thu, Dec 3, 2020 at 9:07 AM Biwen Li (OSS) wrote:
> >
> > > On Thu, Dec 3, 2020 at 8:31 AM Biwen Li wrote:
> > > >
> > > > From: Biwen Li
> > > >
> > > > Resolve coverity warnings as follows,
> > > >
> On Thu, Dec 3, 2020 at 8:31 AM Biwen Li wrote:
> >
> > From: Biwen Li
> >
> > Resolve coverity warnings as follows,
> > cond_at_most: Checking gpio >= 28U implies that gpio may be up
> > to 27 on the false branch.
> > overrun-call: Overrunning callees array of size 3 by passing
> >
>
> Hi,
>
> On 01/12/2020 16:47:46+0800, Biwen Li wrote:
> > From: Biwen Li
> >
> > - clear the flag TSF1 before enabling interrupt generation
> > - properly set flag WD_CD for rtc chips(pcf2129, pca2129)
> >
>
> This change has to be a separate patch.
Sure, np. Will separate the patch in v2.
> >
> > The patch supports slave mode for imx I2C driver
> >
> > Signed-off-by: Biwen Li
>
> Thank you for your work!
>
> Acked-by: Oleksij Rempel
>
> @Wolfram, Christian Eggers I2SR_IAL patches should go before this one.
Hi Wolfram,
Any progress?
Regards,
Biwen Li
>
> > ---
> > Change
> > > >>> Where did you get this information that the register on LS1043
> > > >>> and
> > > >>> LS1046 is bit reversed? I cannot find such information in the RM.
> > > >>> And does this mean all other SCFG registers are also bit reversed?
> > > >>> If this is some information that is not
> Hi,
>
> On Mon, Nov 02, 2020 at 04:21:01PM +0800, Biwen Li wrote:
> > From: Biwen Li
> >
> > The patch supports slave mode for imx I2C driver
> >
> > Signed-off-by: Biwen Li
> > ---
> > Change in v9:
> > - remove #ifdef after select I2C_SLAVE by default
> >
> > Change in v8:
> > -
> Hi,
>
> it makes no sense to have separate patch for it
Okay, got it. I will merge it.
>
> On Mon, Nov 02, 2020 at 04:21:02PM +0800, Biwen Li wrote:
> > From: Biwen Li
> >
> > Select I2C_SLAVE by default
> >
> > Signed-off-by: Biwen Li
> > ---
> > Change in v9:
> > - none
> >
> >
> > >
> > > Caution: EXT Email
> > >
> > > On 27/10/2020 05.46, Biwen Li wrote:
> > > > From: Hou Zhiqiang
> > > >
> > > > Add an new IRQ chip declaration for LS1043A and LS1088A
> > > > - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A.
> SCFG_INTPCR[31:0]
> > > > of these SoCs is
> > > +/*
> > > + * Enable bus idle interrupts
> > > + * Note: IBIC register will be cleared after disabled i2c module.
> > > + */
> > > +static void i2c_imx_enable_bus_idle(struct imx_i2c_struct *i2c_imx) {
> > > + unsigned int temp;
> > > +
> > > + temp = imx_i2c_read_reg(i2c_imx,
> > +/*
> > + * Enable bus idle interrupts
> > + * Note: IBIC register will be cleared after disabled i2c module.
> > + */
> > +static void i2c_imx_enable_bus_idle(struct imx_i2c_struct *i2c_imx) {
> > + unsigned int temp;
> > +
> > + temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_IBIC);
> > +
> >> On 2020-10-27 04:46, Biwen Li wrote:
> >> > From: Hou Zhiqiang
> >> >
> >> > Add an new IRQ chip declaration for LS1043A and LS1088A
> >> > - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A.
> >> > SCFG_INTPCR[31:0]
> >> > of these SoCs is stored/read as SCFG_INTPCR[0:31]
>
> On 2020-10-27 04:46, Biwen Li wrote:
> > From: Hou Zhiqiang
> >
> > Add an new IRQ chip declaration for LS1043A and LS1088A
> > - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A.
> > SCFG_INTPCR[31:0]
> > of these SoCs is stored/read as SCFG_INTPCR[0:31] defaultly(bit
> > reverse)
> Subject: Re: [RESEND 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external
> interrupt
>
> On 26/10/2020 09.44, Marc Zyngier wrote:
> > On 2020-10-26 08:01, Biwen Li wrote:
> >> From: Hou Zhiqiang
> >>
> >> Add an new IRQ chip declaration for LS1043A and LS1088A
> >> - compatible
>
> On Mon, Sep 28, 2020 at 06:43:26PM +0800, Biwen Li wrote:
> > From: Reinhard Pfau
> >
> > Add support for SMSC EMC2305, EMC2303, EMC2302, EMC2301 fan controller
> > chips.
> > The driver primary supports the EMC2305 chip which provides RPM-based
> > PWM control and monitoring for up to 5
> > +
> > + hwmon_dev = devm_hwmon_device_register_with_groups(>dev,
> > + client->name, data,
> > + data->groups);
>
> New drivers must use "[devm_]hwmon_device_register_with_info" to
> On Fri, Jun 19, 2020 at 04:46:07PM +0800, Biwen Li wrote:
> > From: Biwen Li
> >
> > Fix value of shunt-resistor property
> >
> > Signed-off-by: Biwen Li
>
> 'arm64: dts: ...' as subject prefix please.
>
> Also can you improve commit log to better describe the problem the patch is
> fixing?
> > Signed-off-by: Biwen Li
> > ---
> > Change in v2:
> > - use generic name
> > - use definition
> >
> > arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 15 +++
> > arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 14 ++
> >
> > > > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > > b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > > index e5ee5591e52b..e0d8d68ce070 100644
> > > > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>
> On 08/05/2020 13:49:24+0800, Biwen Li wrote:
> > From: Biwen Li
> >
> > This adds uie_unsupported property to drop warning as follows:
> > - $ hwclock.util-linux
> > hwclock.util-linux: select() to /dev/rtc0
> > to wait for clock tick timed out
> >
> > My case:
> > - RTC
>
> Hi,
>
> On 08/05/2020 13:49:23+0800, Biwen Li wrote:
> > From: Biwen Li
> >
> > Add uie_unsupported property to drop warning as follows:
> > - $ hwclock.util-linux
> > hwclock.util-liux: select() /dev/rtc0
> > to wait for clock tick timed out
> >
> > My case:
> > - RTC
>
> On Tue, Apr 07, 2020 at 02:42:48PM +0800, Biwen Li wrote:
> > From: Biwen Li
> >
> > The patch adds ftm_alarm0 DT node for Soc LX2160A
> > FlexTimer1 module is used to wakeup the system in deep sleep
> >
> > Signed-off-by: Biwen Li
> > ---
> > arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
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