RNING: Inline emphasis start-string
without end-string
Fix this rst markup issue.
Signed-off-by: Chenyi Qiang
---
Documentation/virt/kvm/api.rst | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
index aed52b0fc16e.
xpose VM_{ENTRY, EXIT}_LOAD_IA32_PKRS in nested
VMX MSR
- RFC v1:
https://lore.kernel.org/lkml/20200807084841.7112-1-chenyi.qi...@intel.com/
---
Chenyi Qiang (5):
KVM: VMX: Introduce PKS VMCS fields
KVM: X86: Expose PKS to guest
KVM: MMU: Rename the pkru to pkr
KVM: MMU: Add support for PKS
variable pkrs_cache to avoid frequent rdmsr of PKRS.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h | 4 +-
arch/x86/include/asm/pkeys.h| 1 +
arch/x86/kvm/cpuid.c| 3 +-
arch/x86/kvm/vmx/capabilities.h | 6 +++
arch/x86/kvm/vmx/nested.c | 1 +
arch/x86/kvm
.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h | 11 +++---
arch/x86/kvm/mmu.h | 13 ---
arch/x86/kvm/mmu/mmu.c | 63 +++--
arch/x86/kvm/x86.c | 3 +-
4 files changed, 53 insertions(+), 37 deletions(-)
diff --git
PKS MSR passes through guest directly. Configure the MSR to match the
L0/L1 settings so that nested VM runs PKS properly.
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/vmx/nested.c | 37 +++--
arch/x86/kvm/vmx/vmcs12.c | 2 ++
arch/x86/kvm/vmx/vmcs12.h | 6
and PKRS. It makes sense because both registers
have the same format. PKS and PKU can also share the same bitmap to
cache the conditions where protection key checks are needed.
Reviewed-by: Paolo Bonzini
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h | 2 +-
arch/x86/kvm/mmu.h
the guest-state
area.
Signed-off-by: Chenyi Qiang
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/vmx.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index f8ba5289ecb0..5472859e21b0 100644
--- a/arch/x86/include/asm/vmx.h
+++ b
-instruction-set-extensions-programming-reference.html
---
Changelogs
v1->v2:
- rename the DR6_INIT to DR6_LOW_ACTIVE suggested by Paolo and split it
out as a new commit.
- KVM
v1:https://lore.kernel.org/lkml/20210108064924.1677-1-chenyi.qi...@intel.com
Chenyi Qiang (3):
KVM: X
bus lock debug
exception support.
Co-developed-by: Xiaoyao Li
Signed-off-by: Xiaoyao Li
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/cpuid.c | 3 ++-
arch/x86/kvm/vmx/vmx.c | 23 +--
arch/x86/kvm/x86.c | 16 ++--
arch/x86/kvm/x86.h | 2 ++
4 files chan
of the
exit qualification is set to identify it. The VMM should emulate the
exception by clearing the bit 11 of the guest DR6.
Co-developed-by: Xiaoyao Li
Signed-off-by: Xiaoyao Li
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h | 5 +++--
arch/x86/kvm/x86.c | 3 +++
2
once, rename it
to DR6_ACTIVE_LOW and apply it in other places, which would make the
incoming changes for bus lock debug exception more simple.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h | 9 -
arch/x86/kvm/emulate.c | 2 +-
arch/x86/kvm/svm/nested.c
On 1/27/2021 2:01 AM, Paolo Bonzini wrote:
On 07/08/20 10:48, Chenyi Qiang wrote:
+{
+ struct vcpu_vmx *vmx = to_vmx(vcpu);
+ unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap;
+ bool pks_supported = guest_cpuid_has(vcpu, X86_FEATURE_PKS);
+
+ /*
+ * set intercept for P
On 1/27/2021 2:01 AM, Paolo Bonzini wrote:
On 07/08/20 10:48, Chenyi Qiang wrote:
+{
+ struct vcpu_vmx *vmx = to_vmx(vcpu);
+ unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap;
+ bool pks_supported = guest_cpuid_has(vcpu, X86_FEATURE_PKS);
+
+ /*
+ * set intercept for P
On 1/27/2021 2:16 AM, Paolo Bonzini wrote:
On 07/08/20 10:48, Chenyi Qiang wrote:
* index of the protection domain, so pte_pkey * 2 is
* is the index of the first bit for the domain.
*/
- pkr_bits = (vcpu->arch.pkru >> (pte_pkey
On 1/27/2021 2:23 AM, Paolo Bonzini wrote:
On 07/08/20 10:48, Chenyi Qiang wrote:
if (pte_access & PT_USER_MASK)
pkr_bits = (vcpu->arch.pkru >> (pte_pkey * 2)) & 3;
+ else if (!kvm_get_msr(vcpu, MSR_IA32_PKRS, ))
+ pkr_bits = (pkrs
On 1/27/2021 12:31 AM, Paolo Bonzini wrote:
On 08/01/21 07:49, Chenyi Qiang wrote:
To avoid breaking the CPUs without bus lock detection, activate the
DR6_BUS_LOCK bit (bit 11) conditionally in DR6_FIXED_1 bits.
The set/clear of DR6_BUS_LOCK is similar to the DR6_RTM in DR6
register
On 1/27/2021 12:33 AM, Paolo Bonzini wrote:
On 08/01/21 19:16, kernel test robot wrote:
Hi Chenyi,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on kvm/linux-next]
[also build test ERROR on v5.11-rc2 next-20210108]
[If your patch is applied to the wrong git
On 1/19/2021 2:27 AM, Paolo Bonzini wrote:
On 18/01/21 18:45, Thomas Huth wrote:
On 05/11/2020 09.18, Chenyi Qiang wrote:
This unit-test is intended to test the KVM support for Protection Keys
for Supervisor Pages (PKS). If CR4.PKS is set in long mode, supervisor
pkeys are checked
xit reason in a union forces code to
explicitly choose between consuming the full exit reason and the basic
exit, and is a convenient way to document and access the modifiers.
No functional change intended.
Cc: Xiaoyao Li
Signed-off-by: Sean Christopherson
Signed-off-by: Chenyi Qiang
---
arch/x
Introduce a new capability named KVM_CAP_X86_BUS_LOCK_EXIT, which is
used to handle bus locks detected in guest. It allows the userspace to
do custom throttling policies to mitigate the 'noisy neighbour' problem.
Signed-off-by: Chenyi Qiang
---
Documentation/virt/kvm/api.rst | 45
Reset the vcpu->run->flags at the beginning of kvm_arch_vcpu_ioctl_run.
It can avoid every thunk of code that needs to set the flag clear it,
which increases the odds of missing a case and ending up with a flag in
an undefined state.
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/x86
ff-by: Xiaoyao Li
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h| 7 ++
arch/x86/include/asm/vmx.h | 1 +
arch/x86/include/asm/vmxfeatures.h | 1 +
arch/x86/include/uapi/asm/kvm.h| 1 +
arch/x86/include/uapi/asm/vmx.h| 4 +++-
arch/x86/kvm/vmx/capabilities.h
he support to exit to user space when handling bus locks.
- extend the vcpu->run->flags to indicate bus lock detected for other
exit reasons when exiting to user space.
- v1:https://lore.kernel.org/lkml/20200628085341.5107-1-chenyi.qi...@intel.com/
---
Chenyi Qiang (3):
KVM: X86: Rese
he support to exit to user space when handling bus locks.
- extend the vcpu->run->flags to indicate bus lock detected for other
exit reasons when exiting to user space.
- v1:https://lore.kernel.org/lkml/20200628085341.5107-1-chenyi.qi...@intel.com/
---
Chenyi Qiang (3):
KVM: X86: Rese
bus lock debug
exception support.
Co-developed-by: Xiaoyao Li
Signed-off-by: Xiaoyao Li
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/cpuid.c | 3 ++-
arch/x86/kvm/vmx/vmx.c | 23 +--
arch/x86/kvm/x86.c | 16 ++--
arch/x86/kvm/x86.h | 2 ++
4 files chan
the exception by clearing bit 11 of the
guest DR6.
Co-developed-by: Xiaoyao Li
Signed-off-by: Xiaoyao Li
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h | 5 +++--
arch/x86/kvm/emulate.c | 2 +-
arch/x86/kvm/svm/svm.c | 6 +++---
arch/x86/kvm/vmx/nested.c | 2
s://lore.kernel.org/lkml/20201119092957.16940-1-chenyi.qi...@intel.com/
Chenyi Qiang (2):
KVM: X86: Add support for the emulation of DR6_BUS_LOCK bit
KVM: X86: Expose bus lock debug exception to guest
arch/x86/include/asm/kvm_host.h | 5 ++--
arch/x86/kvm/cpuid.c| 3 ++-
arc
bus lock debug
exception support.
Co-developed-by: Xiaoyao Li
Signed-off-by: Xiaoyao Li
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/cpuid.c | 3 ++-
arch/x86/kvm/vmx/vmx.c | 23 +--
arch/x86/kvm/x86.c | 16 ++--
arch/x86/kvm/x86.h | 2 ++
4 files chan
the exception by clearing bit 11 of the
guest DR6.
Co-developed-by: Xiaoyao Li
Signed-off-by: Xiaoyao Li
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h | 5 +++--
arch/x86/kvm/emulate.c | 2 +-
arch/x86/kvm/svm/svm.c | 6 +++---
arch/x86/kvm/vmx/nested.c | 2
ment Link:
https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
Chenyi Qiang (2):
KVM: X86: Add support for the emulation of DR6_BUS_LOCK bit
KVM: X86: Expose bus lock debug exception to guest
arch/x86/include/asm
ff-by: Xiaoyao Li
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h| 7 ++
arch/x86/include/asm/vmx.h | 1 +
arch/x86/include/asm/vmxfeatures.h | 1 +
arch/x86/include/uapi/asm/kvm.h| 1 +
arch/x86/include/uapi/asm/vmx.h| 4 +++-
arch/x86/kvm/vmx/capabilities.h
xit reason in a union forces code to
explicitly choose between consuming the full exit reason and the basic
exit, and is a convenient way to document and access the modifiers.
No functional change intended.
Cc: Xiaoyao Li
Signed-off-by: Sean Christopherson
Signed-off-by: Chenyi Qiang
---
arch/x
Introduce a new capability named KVM_CAP_X86_BUS_LOCK_EXIT, which is
used to handle bus locks detected in guest. It allows the userspace to
do custom throttling policies to mitigate the 'noisy neighbour' problem.
Signed-off-by: Chenyi Qiang
---
Documentation/virt/kvm/api.rst | 45
ce the KVM_EXIT_BUS_LOCK and a
capability to enable it.
- add the support to exit to user space when handling bus locks.
- extend the vcpu->run->flags to indicate bus lock detected for other
exit reasons when exiting to user space.
- v1:https://lore.kernel.org/lkml/20200628085341.5107-1-chenyi
Reset the vcpu->run->flags at the beginning of kvm_arch_vcpu_ioctl_run.
It can avoid every thunk of code that needs to set the flag clear it,
which increases the odds of missing a case and ending up with a flag in
an undefined state.
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/x86
enforces the access rights check.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h | 8 +++---
arch/x86/kvm/mmu.h | 12 ++---
arch/x86/kvm/mmu/mmu.c | 44 +
3 files changed, 35 insertions(+), 29 deletions(-)
diff --git a/arch
been changed by the
kernel since the last time the VMCS was run.
The function get_current_pkrs() in arch/x86/mm/pkeys.c exports the
per-cpu variable pkrs_cache to avoid frequent rdmsr of PKRS.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/pkeys.h| 1 +
arch/x86/kvm/vmx/capabilities.h
bitmap.
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/mmu.h | 10 ++
arch/x86/kvm/mmu/mmu.c | 16 ++--
2 files changed, 16 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
index a77bd20c83f9..8f05f7c0f6df 100644
--- a/arch/x86/kvm/mmu.h
m-unit-tests for PKS
- add the check in kvm_init_msr_list for PKRS
- place the X86_CR4_PKS in mmu_role_bits in kvm_set_cr4
- add the support to expose VM_{ENTRY, EXIT}_LOAD_IA32_PKRS in nested
VMX MSR
- RFC v1:
https://lore.kernel.org/lkml/20200807084841.7112-1-chenyi.qi...@intel.com/
---
the guest-state
area.
Signed-off-by: Chenyi Qiang
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/vmx.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index f8ba5289ecb0..5472859e21b0 100644
--- a/arch/x86/include/asm/vmx.h
+++ b
Existence of PKS is enumerated via CPUID.(EAX=7H,ECX=0):ECX[31]. It is
enabled by setting CR4.PKS when long mode is active. PKS is only
implemented when EPT is enabled and requires the support of VM_{ENTRY,
EXIT}_LOAD_IA32_PKRS currently.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm
and PKRS. It makes sense because both registers
have the same format. PKS and PKU can also share the same bitmap to
cache the conditions where protection key checks are needed.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h | 2 +-
arch/x86/kvm/mmu.h | 12
.
Signed-off-by: Chenyi Qiang
---
lib/x86/msr.h | 1 +
lib/x86/processor.h | 2 +
x86/Makefile.x86_64 | 1 +
x86/pks.c | 146
x86/unittests.cfg | 5 ++
5 files changed, 155 insertions(+)
create mode 100644 x86/pks.c
diff
PKS MSR passes through guest directly. Configure the MSR to match the
L0/L1 settings so that nested VM runs PKS properly.
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/vmx/nested.c | 37 +++--
arch/x86/kvm/vmx/vmcs12.c | 2 ++
arch/x86/kvm/vmx/vmcs12.h | 6
On 10/21/2020 6:01 AM, Sean Christopherson wrote:
On Mon, Oct 12, 2020 at 11:35:41AM +0800, Chenyi Qiang wrote:
From: Sean Christopherson
Convert vcpu_vmx.exit_reason from a u32 to a union (of size u32). The
full VM_EXIT_REASON field is comprised of a 16-bit basic exit reason in
bits 15:0
On 10/21/2020 6:19 AM, Sean Christopherson wrote:
On Mon, Oct 12, 2020 at 11:35:42AM +0800, Chenyi Qiang wrote:
@@ -6138,6 +6149,26 @@ static int vmx_handle_exit(struct kvm_vcpu *vcpu,
fastpath_t exit_fastpath)
return 0;
}
+static int vmx_handle_exit(struct kvm_vcpu *vcpu
been changed by the
kernel since the last time the VMCS was run.
The function get_current_pkrs() in arch/x86/mm/pkeys.c exports the
per-cpu variable pkrs_cache to avoid frequent rdmsr of PKRS.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/pkeys.h| 1 +
arch/x86/kvm/vmx/capabilities.h
and PKRS. It makes sense because both registers
have the same format. PKS and PKU can also share the same bitmap to
cache the conditions where protection key checks are needed.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h | 2 +-
arch/x86/kvm/mmu.h | 12
.
Signed-off-by: Chenyi Qiang
---
lib/x86/msr.h | 1 +
lib/x86/processor.h | 2 +
x86/Makefile.x86_64 | 1 +
x86/pks.c | 146
x86/unittests.cfg | 5 ++
5 files changed, 155 insertions(+)
create mode 100644 x86/pks.c
diff
PKS MSR passes through guest directly. Configure the MSR to match the
L0/L1 settings so that nested VM runs PKS properly.
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/vmx/nested.c | 37 +++--
arch/x86/kvm/vmx/vmcs12.c | 2 ++
arch/x86/kvm/vmx/vmcs12.h | 6
bitmap.
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/mmu.h | 10 ++
arch/x86/kvm/mmu/mmu.c | 16 ++--
2 files changed, 16 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
index 306608248594..597b9159c10b 100644
--- a/arch/x86/kvm/mmu.h
the guest-state
area.
Signed-off-by: Chenyi Qiang
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/vmx.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index cd7de4b401fe..425cf81dd722 100644
--- a/arch/x86/include/asm/vmx.h
+++ b
PKS
- add the check in kvm_init_msr_list for PKRS
- place the X86_CR4_PKS in mmu_role_bits in kvm_set_cr4
- add the support to expose VM_{ENTRY, EXIT}_LOAD_IA32_PKRS in nested
VMX MSR
- RFC v1:
https://lore.kernel.org/lkml/20200807084841.7112-1-chenyi.qi...@intel.com/
---
Chenyi Qiang (7):
enforces the access rights check.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h | 8 +++---
arch/x86/kvm/mmu.h | 12 ++---
arch/x86/kvm/mmu/mmu.c | 44 +
3 files changed, 35 insertions(+), 29 deletions(-)
diff --git a/arch
Existence of PKS is enumerated via CPUID.(EAX=7H,ECX=0):ECX[31]. It is
enabled by setting CR4.PKS when long mode is active. PKS is only
implemented when EPT is enabled and requires the support of VM_{ENTRY,
EXIT}_LOAD_IA32_PKRS currently.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm
eloped-by: Xiaoyao Li
Signed-off-by: Xiaoyao Li
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h| 7 ++
arch/x86/include/asm/vmx.h | 1 +
arch/x86/include/asm/vmxfeatures.h | 1 +
arch/x86/include/uapi/asm/kvm.h| 1 +
arch/x86/include/uapi/asm/vmx.h
From: Sean Christopherson
Convert vcpu_vmx.exit_reason from a u32 to a union (of size u32). The
full VM_EXIT_REASON field is comprised of a 16-bit basic exit reason in
bits 15:0, and single-bit modifiers in bits 31:16.
Historically, KVM has only had to worry about handling the "failed
n->flags to indicate bus lock detected for other
exit reasons when exiting to user space.
- v1:https://lore.kernel.org/lkml/20200628085341.5107-1-chenyi.qi...@intel.com/
---
Chenyi Qiang (1):
KVM: VMX: Enable bus lock VM exit
Sean Christopherson (1):
KVM: VMX: Convert vcpu_vmx.exit_reason to
n->flags to indicate bus lock detected for other
exit reasons when exiting to user space.
- v1:https://lore.kernel.org/lkml/20200628085341.5107-1-chenyi.qi...@intel.com/
---
Chenyi Qiang (1):
KVM: VMX: Enable bus lock VM exit
Sean Christopherson (1):
KVM: VMX: Convert vcpu_vmx.exit
Thank you for comments. Will clean up my code.
On 9/12/2020 1:27 AM, Sean Christopherson wrote:
On Thu, Sep 10, 2020 at 04:37:51PM +0800, Chenyi Qiang wrote:
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 5303dbc5c9bc..8059b8b21ecd 100644
--- a/arch/x86
From: Sean Christopherson
Convert vcpu_vmx.exit_reason from a u32 to a union (of size u32). The
full VM_EXIT_REASON field is comprised of a 16-bit basic exit reason in
bits 15:0, and single-bit modifiers in bits 31:16.
Historically, KVM has only had to worry about handling the "failed
eloped-by: Xiaoyao Li
Signed-off-by: Xiaoyao Li
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h| 5
arch/x86/include/asm/vmx.h | 1 +
arch/x86/include/asm/vmxfeatures.h | 1 +
arch/x86/include/uapi/asm/kvm.h| 1 +
arch/x86/include/uapi/asm/vmx.h
/software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
Chenyi Qiang (1):
KVM: VMX: Enable bus lock VM exit
Sean Christopherson (1):
KVM: VMX: Convert vcpu_vmx.exit_reason to a union
arch/x86/include/asm/kvm_host.h
On 9/1/2020 4:43 PM, Vitaly Kuznetsov wrote:
Chenyi Qiang writes:
Virtual Machine can exploit bus locks to degrade the performance of
system. Bus lock can be caused by split locked access to writeback(WB)
memory or by using locks on uncacheable(UC) memory. The bus lock is
typically >1
On 8/29/2020 2:23 AM, Jim Mattson wrote:
On Fri, Aug 28, 2020 at 1:54 AM Chenyi Qiang wrote:
When setting the nested VMX MSRs, verify it with the values in
vmcs_config.nested_vmx_msrs, which reflects the global capability of
VMX controls MSRs.
Signed-off-by: Chenyi Qiang
You seem
On 8/29/2020 1:43 AM, Jim Mattson wrote:
On Fri, Aug 28, 2020 at 1:54 AM Chenyi Qiang wrote:
KVM supports the nested VM_{EXIT, ENTRY}_LOAD_IA32_PERF_GLOBAL_CTRL and
VM_{ENTRY_LOAD, EXIT_CLEAR}_BNDCFGS, but they doesn't expose during
the setup of nested VMX controls MSR.
Aren't
The nested VMX controls MSRs can be initialized by the global capability
values stored in vmcs_config.
Signed-off-by: Chenyi Qiang
Reviewed-by: Xiaoyao Li
---
arch/x86/kvm/vmx/vmx.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx
When setting the nested VMX MSRs, verify it with the values in
vmcs_config.nested_vmx_msrs, which reflects the global capability of
VMX controls MSRs.
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/vmx/nested.c | 71 ---
1 file changed, 51 insertions(+), 20
A minor fix for the update of VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL field
in exit_ctls_high.
Fixes: 03a8871add95 ("KVM: nVMX: Expose load IA32_PERF_GLOBAL_CTRL
VM-{Entry,Exit} control")
Signed-off-by: Chenyi Qiang
Reviewed-by: Xiaoyao Li
---
arch/x86/kvm/vmx/nested.c | 2 +-
1 file
, do the update to avoid
MSR values overriding.
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/vmx/vmx.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 819c185adf09..f9664ccc003b 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b
KVM supports the nested VM_{EXIT, ENTRY}_LOAD_IA32_PERF_GLOBAL_CTRL and
VM_{ENTRY_LOAD, EXIT_CLEAR}_BNDCFGS, but they doesn't expose during
the setup of nested VMX controls MSR.
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/vmx/nested.c | 6 --
1 file changed, 4 insertions(+), 2 deletions
SET_CPUID. This patch series
just expose the missing fields in nested VMX {ENTRY, EXIT} controls
MSR and adds the support to update nested VMX MSRs after set_vmx_msrs.
The last two patches are a minor fix and cleanup.
Chenyi Qiang (5):
KVM: nVMX: Fix VMX controls MSRs setup when nested VMX enabled
Ping for comments
On 8/17/2020 11:36 AM, Chenyi Qiang wrote:
Resend to rebase on 5.9-rc1.
---
Add the support for bus lock VM exit in KVM. It is a sub-feature of bus
lock detection. Another sub-feature named bus lock debug exception is
blocked due to requirement to rework the HW design:
https
On 8/14/2020 1:31 AM, Jim Mattson wrote:
On Wed, Aug 12, 2020 at 10:42 PM Chenyi Qiang wrote:
On 8/13/2020 5:21 AM, Jim Mattson wrote:
On Fri, Aug 7, 2020 at 1:46 AM Chenyi Qiang wrote:
Protection Keys for Supervisor Pages (PKS) uses IA32_PKRS MSR (PKRS) at
index 0x6E1 to allow
www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
Co-developed-by: Xiaoyao Li
Signed-off-by: Xiaoyao Li
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h| 9
arch/x86/include/asm/vmx.h | 1 +
arch/x86/include/as
From: Sean Christopherson
Convert vcpu_vmx.exit_reason from a u32 to a union (of size u32). The
full VM_EXIT_REASON field is comprised of a 16-bit basic exit reason in
bits 15:0, and single-bit modifiers in bits 31:16.
Historically, KVM has only had to worry about handling the "failed
exit reasons when exiting to user space.
Chenyi Qiang (1):
KVM: VMX: Enable bus lock VM exit
Sean Christopherson (1):
KVM: VMX: Convert vcpu_vmx.exit_reason to a union
arch/x86/include/asm/kvm_host.h| 9 +++
arch/x86/include/asm/vmx.h | 1 +
arch/x86/include/asm/vmxfeatures.h | 1
www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
Co-developed-by: Xiaoyao Li
Signed-off-by: Xiaoyao Li
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h| 9
arch/x86/include/asm/vmx.h | 1 +
arch/x86/include/as
From: Sean Christopherson
Convert vcpu_vmx.exit_reason from a u32 to a union (of size u32). The
full VM_EXIT_REASON field is comprised of a 16-bit basic exit reason in
bits 15:0, and single-bit modifiers in bits 31:16.
Historically, KVM has only had to worry about handling the "failed
l
v1->v2 Changelogs:
- resolve Vitaly's comment to introduce the KVM_EXIT_BUS_LOCK and a
capability to enable it.
- add the support to exit to user space when handling bus locks.
- extend the vcpu->run->flags to indicate bus lock detected for other
exit reasons when exiting to user spac
On 8/14/2020 1:52 AM, Jim Mattson wrote:
On Wed, Aug 12, 2020 at 9:54 PM Chenyi Qiang wrote:
On 8/11/2020 8:05 AM, Jim Mattson wrote:
On Fri, Aug 7, 2020 at 1:47 AM Chenyi Qiang wrote:
PKS MSR passes through guest directly. Configure the MSR to match the
L0/L1 settings so that nested
On 8/14/2020 3:04 AM, Jim Mattson wrote:
On Fri, Aug 7, 2020 at 1:47 AM Chenyi Qiang wrote:
Existence of PKS is enumerated via CPUID.(EAX=7H,ECX=0):ECX[31]. It is
enabled by setting CR4.PKS when long mode is active. PKS is only
implemented when EPT is enabled and requires the support
On 8/13/2020 5:21 AM, Jim Mattson wrote:
On Fri, Aug 7, 2020 at 1:46 AM Chenyi Qiang wrote:
Protection Keys for Supervisor Pages (PKS) uses IA32_PKRS MSR (PKRS) at
index 0x6E1 to allow software to manage supervisor protection key
rights. For performance consideration, PKRS intercept
On 8/11/2020 8:05 AM, Jim Mattson wrote:
On Fri, Aug 7, 2020 at 1:47 AM Chenyi Qiang wrote:
PKS MSR passes through guest directly. Configure the MSR to match the
L0/L1 settings so that nested VM runs PKS properly.
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/vmx/nested.c | 32
enforces the access rights check.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h | 8 +++---
arch/x86/kvm/mmu.h | 12 ++---
arch/x86/kvm/mmu/mmu.c | 44 +
3 files changed, 35 insertions(+), 29 deletions(-)
diff --git a/arch
and PKRS. It makes sense because both registers
have the same format. PKS and PKU can also share the same bitmap to
cache the conditions where protection key checks are needed.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/kvm_host.h | 2 +-
arch/x86/kvm/mmu.h | 12
PKS MSR passes through guest directly. Configure the MSR to match the
L0/L1 settings so that nested VM runs PKS properly.
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/vmx/nested.c | 32
arch/x86/kvm/vmx/vmcs12.c | 2 ++
arch/x86/kvm/vmx/vmcs12.h | 6
the guest-state
area.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/vmx.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index cd7de4b401fe..425cf81dd722 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
been changed by the
kernel since the last time the VMCS was run.
The function get_current_pkrs() in arch/x86/mm/pkeys.c exports the
per-cpu variable pkrs_cache to avoid frequent rdmsr of PKRS.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/pkeys.h| 1 +
arch/x86/kvm/vmx/capabilities.h
be found in the latest Intel 64 and
IA-32 Architectures Software Developer's Manual.
Chenyi Qiang (7):
KVM: VMX: Introduce PKS VMCS fields
KVM: VMX: Expose IA32_PKRS MSR
KVM: MMU: Rename the pkru to pkr
KVM: MMU: Refactor pkr_mask to cache condition
KVM: MMU: Add support for PKS emulation
Existence of PKS is enumerated via CPUID.(EAX=7H,ECX=0):ECX[31]. It is
enabled by setting CR4.PKS when long mode is active. PKS is only
implemented when EPT is enabled and requires the support of VM_{ENTRY,
EXIT}_LOAD_IA32_PKRS currently.
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm
bitmap.
Signed-off-by: Chenyi Qiang
---
arch/x86/kvm/mmu.h | 10 ++
arch/x86/kvm/mmu/mmu.c | 16 ++--
2 files changed, 16 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
index 0c2fdf0abf22..7fb4c63d5704 100644
--- a/arch/x86/kvm/mmu.h
xtensions Programming Reference".
Document Link:
https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
Co-developed-by: Xiaoyao Li
Signed-off-by: Xiaoyao Li
Signed-off-by: Chenyi Qiang
---
arch/x86/include/asm/
sions Programming Reference".
Document Link:
https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
Chenyi Qiang (1):
KVM: VMX: Enable bus lock VM exit
Sean Christopherson (1):
KVM: VMX: Convert vcpu_vmx.exit_reason
From: Sean Christopherson
Convert vcpu_vmx.exit_reason from a u32 to a union (of size u32). The
full VM_EXIT_REASON field is comprised of a 16-bit basic exit reason in
bits 15:0, and single-bit modifiers in bits 31:16.
Historically, KVM has only had to worry about handling the "failed
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