[PATCH v4 3/6] drm/rockchip/dsi: dw-mipi: correct the coding style

correct the coding style, according the checkpatch scripts Signed-off-by: Chris Zhong --- Changes in v4: None Changes in v3: None drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 33 - 1 file changed, 16 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm

[PATCH v4 0/6] Rockchip dw-mipi-dsi driver

l.org/patch/9340251 [25/26] https://patchwork.kernel.org/patch/9340127 [26/26] https://patchwork.kernel.org/patch/9340139 Changes in v4: - remove the unrelated change Changes in v3: - base on John Keeping's patch series Chris Zhong (6): dt-bindings: add rk3399 support for dw-mipi-rock

[PATCH v4 2/6] drm/rockchip/dsi: dw-mipi: support RK3399 mipi dsi

The vopb/vopl switch register of RK3399 mipi is different from RK3288, the default setting for mipi dsi mode is different too, so add a of_device_id structure to distinguish them, and make sure set the correct mode before mipi phy init. Signed-off-by: Chris Zhong Signed-off-by: Mark Yao

[PATCH v4 4/6] drm/rockchip/dsi: remove mode_valid function

The MIPI DSI do not need check the validity of resolution, the max resolution should depend VOP. Hence, remove rk3288_mipi_dsi_mode_valid here. Signed-off-by: Chris Zhong --- Changes in v4: None Changes in v3: None drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 39

Re: [PATCH v3 3/5] drm/rockchip/dsi: remove mode_valid function

Hi Sean On 01/24/2017 01:48 AM, Sean Paul wrote: On Fri, Jan 20, 2017 at 06:10:49PM +0800, Chris Zhong wrote: The MIPI DSI do not need check the validity of resolution, the max resolution should depend VOP. Hence, remove rk3288_mipi_dsi_mode_valid here. Does vop actually enforce this, though

Re: [PATCH v2 25/26] drm/rockchip: dw-mipi-dsi: add reset control

Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: In order to fully reset the state of the MIPI controller we must assert this reset. This is slightly more complicated than it could be in order to maintain compatibility with device trees that do not specify the reset

Re: [PATCH v2 24/26] drm/rockchip: dw-mipi-dsi: support non-burst modes

Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: Signed-off-by: John Keeping --- Unchanged in v2 --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 16 +--- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b

Re: [PATCH v2 19/26] drm/rockchip: dw-mipi-dsi: improve PLL configuration

Hi John On 01/22/2017 12:31 AM, John Keeping wrote: The multiplication ratio for the PLL is required to be even due to the use of a "by 2 pre-scaler". Currently we are likely to end up with an odd multiplier even though there is an equivalent set of parameters with an even multiplier. For exam

Re: [PATCH v2 20/26] drm/rockchip: dw-mipi-dsi: use specific poll helper

Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: As the documentation for readx_poll_timeout says, we want to use the specialized macro for readl rather than using the generic version directly. Signed-off-by: John Keeping --- Unchanged in v2 --- drivers/gpu/drm

Re: [PATCH v2 17/26] drm/rockchip: dw-mipi-dsi: don't enable PHY PLL until it's configured

Hi John This patch do the similar thing with https://patchwork.kernel.org/patch/9530405/ They are changing the phy configuration order, my suggestion is to merge them. On 01/22/2017 12:31 AM, John Keeping wrote: Signed-off-by: John Keeping --- Unchanged in v2 --- drivers/gpu/drm/rockchip

Re: [PATCH v2 14/26] drm/rockchip: dw-mipi-dsi: fix escape clock rate

Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: Use the same calculation as the vendor kernel to derive the escape clock speed. Signed-off-by: John Keeping --- Unchanged in v2 --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 +++- 1 file changed, 3 insertions(+), 1

Re: [PATCH v2 15/26] drm/rockchip: dw-mipi-dsi: ensure PHY is reset

Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: Also don't power up the DSI host at this point since this is not necessary in order to configure the PHY and we do so later when selecting video or command mode. Signed-off-by: John Keeping --- Unchanged

Re: [PATCH v2 13/26] drm/rockchip: dw-mipi-dsi: allow commands in panel_disable

normally when the display is enabled again later. -*/ - msleep(120); - - dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_CMD_MODE); This workaround is from[0], I also think it should be deleted. [0] http://www.spinics.net/lists/dri-devel/msg77192.html Reviewed-by: Chris Zhong

Re: [PATCH v2 12/26] drm/rockchip: dw-mipi-dsi: prepare panel after phy init

Hi John Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: Some panels need to be configured with commands sent over the MIPI link, which they will do in the prepare hook. Call this after the PHY has been initialized so that we are able to send commands to the panel

Re: [PATCH v2 11/26] drm/rockchip: dw-mipi-dsi: don't assume buffer is aligned

Hi John Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: By dereferencing the MIPI command buffer as a u32* we rely on it being correctly aligned on ARM, but this may not be the case. Copy it into a stack variable that will be correctly aligned. Signed-off-by: John

Re: [PATCH v2 10/26] drm/rockchip: dw-mipi-dsi: only request HS clock when required

Hi John Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: Requesting the HS clock from the PHY before we initialize it causes an invalid signal to be sent out since the input clock is not yet configured. The PHY databook suggests only asserting this signal when performing

Re: [PATCH v2 09/26] drm/rockchip: dw-mipi-dsi: respect message flags

Hi John Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: Instead of always sending commands in LP mode, respect the MIPI_DSI_MSG_USE_LPM flag to decide how to send each message. Also request acks if MIPI_DSI_MSG_REQ_ACK is set. Signed-off-by: John Keeping --- Unchanged

Re: [PATCH v2 08/26] drm/rockchip: dw-mipi-dsi: include bad value in error message

Hi John Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: As an aid to debugging. Signed-off-by: John Keeping --- Unchanged in v2 --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip

Re: [PATCH v2 07/26] drm/rockchip: dw-mipi-dsi: avoid out-of-bounds read on tx_buf

Hi John Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: As a side-effect of this, encode the endianness explicitly rather than casting a u16. Signed-off-by: John Keeping --- Unchanged in v2 --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 9 +++-- 1 file changed, 7

Re: [PATCH v2 06/26] drm/rockchip: dw-mipi-dsi: fix generic packet status check

Hi John Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: We want to check that both the GEN_CMD_EMPTY and GEN_PLD_W_EMPTY bits are set so we can't just check "val & mask" because that will be true if either bit is set. According to DW mipi dsi controlle

Re: [PATCH v2 04/26] drm/rockchip: dw-mipi-dsi: remove mode_set hook

Hi John Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: This is not needed since we can access the mode via the CRTC from the enable hook. Also remove the "mode" field that is no longer used. Signed-off-by: John Keeping --- New in v2 --- drivers/gpu/drm/r

Re: [PATCH v2 03/26] drm/rockchip: dw-mipi-dsi: pass mode in where needed

Hi John Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: This shows that we only use the mode from the enable function and prepares us to remove the "mode" field and the mode_set hook in the next commit. Signed-off-by: John Keeping --- New in v2 --- drive

Re: [PATCH v2 01/26] drm/rockchip: dw-mipi-dsi: don't configure hardware in mode_set for MIPI

Hi John On 01/22/2017 12:31 AM, John Keeping wrote: With atomic modesetting the hardware will be powered off when the mode_set function is called. We should configure the hardware in the commit function (or even the enable function, but switching from commit to enable is left for a future patc

Re: [PATCH v2 26/26] drm/rockchip: dw-mipi-dsi: support read commands

Hi John On 01/22/2017 12:31 AM, John Keeping wrote: I haven't found any method for getting the length of a response, so this just uses the requested rx_len Signed-off-by: John Keeping --- Unchanged in v2 --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 54 ++ 1 f

Re: [PATCH v2 18/26] drm/rockchip: dw-mipi-dsi: properly configure PHY timing

On 01/22/2017 12:31 AM, John Keeping wrote: These values are specified as constant time periods but the PHY configuration is in terms of the current lane byte clock so using constant values guarantees that the timings will be outside the specification with some display configurations. Derive t

[PATCH v3 4/5] dt-bindings: add power domain node for dw-mipi-rockchip

Signed-off-by: Chris Zhong Acked-by: Rob Herring --- Changes in v3: None .../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation

[PATCH v3 5/5] drm/rockchip/dsi: add dw-mipi power domain support

Reference the power domain incase dw-mipi power down when in use. Signed-off-by: Chris Zhong --- Changes in v3: None drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 16 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip

[PATCH v3 3/5] drm/rockchip/dsi: remove mode_valid function

The MIPI DSI do not need check the validity of resolution, the max resolution should depend VOP. Hence, remove rk3288_mipi_dsi_mode_valid here. Signed-off-by: Chris Zhong --- Changes in v3: None drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 39 -- 1 file changed, 39

[PATCH v3 2/5] drm/rockchip/dsi: dw-mipi: support RK3399 mipi dsi

The vopb/vopl switch register of RK3399 mipi is different from RK3288, the default setting for mipi dsi mode is different too, so add a of_device_id structure to distinguish them, and make sure set the correct mode before mipi phy init. Signed-off-by: Chris Zhong Signed-off-by: Mark Yao

[PATCH v3 1/5] dt-bindings: add rk3399 support for dw-mipi-rockchip

The dw-mipi-dsi of rk3399 is almost the same as rk3288, the rk3399 has additional phy config clock. Signed-off-by: Chris Zhong Acked-by: Rob Herring --- Changes in v3: None .../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 4 +++- 1 file changed, 3 insertions(+), 1

[PATCH v3 0/5] Rockchip dw-mipi-dsi driver

l.org/patch/9340251 [25/26] https://patchwork.kernel.org/patch/9340127 [26/26] https://patchwork.kernel.org/patch/9340139 Changes in v3: - base on John Keeping's patch series Chris Zhong (5): dt-bindings: add rk3399 support for dw-mipi-rockchip drm/rockchip/dsi: dw-mipi: support RK339

Re: [01/26] drm/rockchip: dw-mipi-dsi: use mode from display state

On 09/20/2016 01:17 AM, John Keeping wrote: There is no need to keep a pointer to the mode around since we know it will be present in the connector state. Signed-off-by: John Keeping --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 31 --- 1 file changed, 16 inserti

Re: [PATCH v2 11/11] drm/rockchip/dsi: fix insufficient bandwidth of some panel

Hi John On 01/16/2017 08:44 PM, John Keeping wrote: On Mon, 16 Jan 2017 18:08:31 +0800, Chris Zhong wrote: Set the lanes bps to 1 / 0.9 times of pclk, the margin is not enough for some panel, it will cause the screen display is not normal, so increases the badnwidth to 1 / 0.8. Signed-off-by

Re: [05/26] drm/rockchip: dw-mipi-dsi: fix command header writes

same as https://patchwork.kernel.org/patch/9518417/ Tested-by: Chris Zhong Reviewed-by: Chris Zhong On 09/20/2016 01:17 AM, John Keeping wrote: In a couple of places here we use "val" for the value that is about to be written to a register but then reuse the same variable for the

[PATCH v2 07/11] drm/rockchip/dsi: fix mipi display can't found at init time

From: Mark Yao The problem is that: mipi panel probe request mipi_dsi_host_register. mipi host attach is call from panel device, so the defer function always can't works. So at the first bind time, always can't found mipi panel. Signed-off-by: Mark Yao Signed-off-by: C

[PATCH v2 03/11] drm/rockchip/dsi: remove mode_valid function

The MIPI DSI do not need check the validity of resolution, the max resolution should depend VOP. Hence, remove rk3288_mipi_dsi_mode_valid here. Signed-off-by: Chris Zhong --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 39 -- 1 file changed, 39 deletions(-) diff

[PATCH v2 02/11] drm/rockchip/dsi: dw-mipi: support RK3399 mipi dsi

The vopb/vopl switch register of RK3399 mipi is different from RK3288, the default setting for mipi dsi mode is different too, so add a of_device_id structure to distinguish them, and make sure set the correct mode before mipi phy init. Signed-off-by: Chris Zhong Signed-off-by: Mark Yao

[PATCH v2 05/11] drm/rockchip/dsi: add dw-mipi power domain support

Reference the power domain incase dw-mipi power down when in use. Signed-off-by: Chris Zhong --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index

[PATCH v2 08/11] drm/rockchip/dsi: fix the issue can not send commands

From: xubilv There is a bug in hdr_write function, the value from the caller will be overwritten, it cause the mipi can not send the correct command. And the MIPI_DSI_GENERIC_SHORT_WRITE_n_PARAM message type should be supported. Signed-off-by: xubilv Signed-off-by: Chris Zhong --- drivers

[PATCH v2 11/11] drm/rockchip/dsi: fix insufficient bandwidth of some panel

Set the lanes bps to 1 / 0.9 times of pclk, the margin is not enough for some panel, it will cause the screen display is not normal, so increases the badnwidth to 1 / 0.8. Signed-off-by: Chris Zhong --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 ++-- 1 file changed, 2 insertions(+), 2

[PATCH v2 10/11] drm/rockchip/dsi: fix phy clk lane stop state timeout

Before phy init, the detection of phy state should be controlled manually. After that, we can switch the detection to hardward, it is automatic. Hence move PHY_TXREQUESTCLKHS setting to the end of phy init. Signed-off-by: Chris Zhong --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 3 ++- 1 file

[PATCH v2 09/11] drm/rockchip/dsi: decrease the value of Ths-prepare

From: xubilv Signed-off-by: xubilv Signed-off-by: Chris Zhong --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index 4a2691c..f50909e 100644 --- a

[PATCH v2 06/11] drm/rockchip/dsi: return probe defer if attach panel failed

From: Mark Yao Return -EINVAL would cause mipi dsi bad behavior, probe defer to ensure mipi find the correct mode, Signed-off-by: Mark Yao Signed-off-by: Chris Zhong --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a

[PATCH v2 01/11] dt-bindings: add rk3399 support for dw-mipi-rockchip

The dw-mipi-dsi of rk3399 is almost the same as rk3288, the rk3399 has additional phy config clock. Signed-off-by: Chris Zhong --- .../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation

[PATCH v2 04/11] dt-bindings: add power domain node for dw-mipi-rockchip

Signed-off-by: Chris Zhong Acked-by: Rob Herring --- .../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings

[PATCH v2 0/11] Rockchip dw-mipi-dsi driver

tested on rk3399 and rk3288 evb board. Chris Zhong (7): dt-bindings: add rk3399 support for dw-mipi-rockchip drm/rockchip/dsi: dw-mipi: support RK3399 mipi dsi drm/rockchip/dsi: remove mode_valid function dt-bindings: add power domain node for dw-mipi-rockchip drm/rockchip/dsi: add dw

Re: [PATCH v15.1 3/5] drm/rockchip: cdn-dp: add cdn DP support for rk3399

Hi Mark OK, thanks. I will send the whole series next time, hope it will not bother anyone On 09/12/2016 05:13 PM, Mark Brown wrote: On Fri, Sep 09, 2016 at 09:16:06PM -0700, Chris Zhong wrote: Add support for cdn DP controller which is embedded in the rk3399 SoCs. The DP is compliant with

[PATCH v15.1 3/5] drm/rockchip: cdn-dp: add cdn DP support for rk3399

/firmware/rockchip/dptx.bin. The uCPU in charge of aux communication and link training, the host use mailbox to communicate with the ucpu. The dclk pin_pol of vop must not be invert for DP. Signed-off-by: Chris Zhong Signed-off-by: Sean Paul Reviewed-by: Sean Paul Acked-by: Mark Yao --- Changes in

[PATCH v15 4/5] drm/rockchip: cdn-dp: support audio hot-plug

Issue hot-plug detection, EDID update, and ELD update notifications from DP drivers. Signed-off-by: Chris Zhong --- Changes in v15: None Changes in v14: None Changes in v13: None Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7

[PATCH v15 3/5] drm/rockchip: cdn-dp: add cdn DP support for rk3399

/firmware/rockchip/dptx.bin. The uCPU in charge of aux communication and link training, the host use mailbox to communicate with the ucpu. The dclk pin_pol of vop must not be invert for DP. Signed-off-by: Chris Zhong Signed-off-by: Sean Paul Reviewed-by: Sean Paul Acked-by: Mark Yao --- Changes in

[PATCH v15 1/5] extcon: Introduce EXTCON_PROP_DISP_HPD property

EXTCON_PROP_DISP_HPD is need by display port, if the system has no hpd interrupt, this property can be used. Signed-off-by: Chris Zhong --- Changes in v15: None Changes in v14: None Changes in v13: None Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes

[PATCH v15 0/5] Rockchip Type-C DisplayPort driver

er-called functions - remove some unnecessary () - correct the commit message Changes in v1: - add extcon node description - add #sound-dai-cells description - use extcon API - use hdmi-codec for the DP Asoc - do not initialize the "ret" - printk a err log when drm_of_encoder_active_en

[PATCH v15 2/5] Documentation: bindings: add dt documentation for cdn DP controller

This patch adds a binding that describes the cdn DP controller for rk3399. Signed-off-by: Chris Zhong Acked-by: Rob Herring Reviewed-by: Guenter Roeck --- Changes in v15: None Changes in v14: None Changes in v13: - add dptx and apb reset Changes in v12: None Changes in v11: - refer dp phy

[PATCH v15 5/5] ASoC: rockchip: Add DP dai-links to the rk3399-gru machine driver

This patch adds DP audio output support to the rk3399-gru machine driver. Signed-off-by: Chris Zhong --- Changes in v15: None Changes in v14: None Changes in v13: None Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None

[PATCH] extcon: Introduce EXTCON_PROP_DISP_HPD property

EXTCON_PROP_DISP_HPD is need by display port, if the system has no hpd interrupt, this property can be used. Change-Id: I8b3eb78429126eaa369b10711b7f857b0a3df8ed Signed-off-by: Chris Zhong --- include/linux/extcon.h | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff

[PATCH v3 2/2] ASoC: rockchip: Add DP dai-links to the rk3399-gru machine driver

This patch adds DP audio output support to the rk3399-gru machine driver. Signed-off-by: Chris Zhong --- Changes in v3: - change spdif to i2s2 Changes in v2: - correct the commit message .../bindings/sound/rockchip,rk3399-gru-sound.txt | 11 +-- sound/soc/rockchip/rk3399_gru_sound.c

[PATCH] phy: rockchip-typec: add pm_runtime_disable in err case

Add pm_runtime_disable in err case to make the pm_runtime_enable/disable is invoked balanced. Signed-off-by: Chris Zhong --- drivers/phy/phy-rockchip-typec.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/phy/phy-rockchip-typec.c b/drivers/phy/phy-rockchip-typec.c index 7cfb0f8

[RESEND PATCH v3 1/2] phy: rockchip-typec: add pm runtime support

Adds pm_runtime support for rockchip Type-C, so that power domain is enabled only when there is a transaction going on to help save power. Signed-off-by: Chris Zhong --- Changes in v3: - use phy_core pm_runtime Changes in v2: - add pm_runtime_put_sync in err case drivers/phy/phy-rockchip

[PATCH v2 2/2] arm64: dts: rk3399: add powerdomain for typec

The tcpc power domain will try to power up/down the power of Type-C PHY. Hence, we need control it in Type-C PHY driver with the pm_runtime helper. Signed-off-by: Chris Zhong --- Changes in v2: None arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a

[PATCH v2 1/2] phy: rockchip-typec: add pm runtime support

Adds pm_runtime support for rockchip Type-C, so that power domain is enabled only when there is a transaction going on to help save power. Signed-off-by: Chris Zhong --- Changes in v2: -- add pm_runtime_put_sync in err case drivers/phy/phy-rockchip-typec.c | 19 +++ 1 file

[PATCH] arm64: dts: rk3399: add powerdomain for typec

The tcpc power domain will try to power up/down the power of Type-C PHY. Hence, we need control it in Type-C PHY driver with the pm_runtime helper. Change-Id: I727ed3f7c6e7075f41f0940470796ba0cd3232df Signed-off-by: Chris Zhong --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++ 1 file changed

[PATCH] phy: rockchip-typec: add pm runtime support

Adds pm_runtime support for rockchip Type-C, so that power domain is enabled only when there is a transaction going on to help save power. Signed-off-by: Chris Zhong --- drivers/phy/phy-rockchip-typec.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a/drivers/phy/phy

[v2 PATCH 2/2] ASoC: rockchip: Add DP dai-links to the rk3399-gru machine driver

This patch adds DP audio output support to the rk3399-gru machine driver. Signed-off-by: Chris Zhong --- Changes in v2: - correct the commit message .../bindings/sound/rockchip,rk3399-gru-sound.txt | 13 +++--- sound/soc/rockchip/rk3399_gru_sound.c | 48

[RESEND v14 PATCH 1/5] Documentation: bindings: add dt doc for Rockchip USB Type-C PHY

This patch adds a binding that describes the Rockchip USB Type-C PHY for rk3399 Signed-off-by: Chris Zhong Reviewed-by: Tomasz Figa Reviewed-by: Kever Yang Reviewed-by: Guenter Roeck Acked-by: Rob Herring --- Changes in v14: None Changes in v13: None Changes in v12: None Changes in v11

Re: [v14 PATCH 2/5] phy: Add USB Type-C PHY driver for rk3399

Hi Kishon Thanks. Reminded by heiko, I found that I forgot to add you to the to/cc list of the Document patch [1/5] I am going to resend it, now :) - Chris Zhong On 09/05/2016 09:09 PM, Kishon Vijay Abraham I wrote: On Wednesday 24 August 2016 10:47 AM, Chris Zhong wrote: Add a PHY

[PATCH 2/2] ASoC: rockchip: Add DP dai-links to the rk3399-gru machine driver

This patch adds DP audio output support to the rk3300-gru machine driver. Signed-off-by: Chris Zhong hyc...@chromium.org, broo...@kernel.org --- .../bindings/sound/rockchip,rk3399-gru-sound.txt | 13 +++--- sound/soc/rockchip/rk3399_gru_sound.c | 48 ++ 2

[PATCH 1/2] drm/rockchip: cdn-dp: support audio hot-plug

Issue hot-plug detection, EDID update, and ELD update notifications from DP drivers. Signed-off-by: Chris Zhong --- drivers/gpu/drm/rockchip/cdn-dp-core.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c

[PATCH 0/2] Add DP dai-links to the rk3399-gru machine driver

/8887261/ https://patchwork.kernel.org/patch/8887251/ Chris Zhong (2): drm/rockchip: cdn-dp: support audio hot-plug ASoC: rockchip: Add DP dai-links to the rk3399-gru machine driver .../bindings/sound/rockchip,rk3399-gru-sound.txt | 13 +++--- drivers/gpu/drm/rockchip/cdn-dp-core.c

[v14.2 PATCH 5/5] drm/rockchip: cdn-dp: add cdn DP support for rk3399

/firmware/rockchip/dptx.bin. The uCPU in charge of aux communication and link training, the host use mailbox to communicate with the ucpu. The dclk pin_pol of vop must not be invert for DP. Signed-off-by: Chris Zhong Reviewed-by: Sean Paul Acked-by: Mark Yao --- Changes in v14.2: - Modify some

Re: [v2 PATCH 2/3] clk: rockchip: add dclk_vop_frac ids for vop

Hi Heiko On 09/02/2016 01:43 PM, Heiko Stübner wrote: Am Donnerstag, 1. September 2016, 20:26:24 schrieb Chris Zhong: From: Yakir Yang Export the dclk_vop_frac out, so we can set the dclk_vop as the child of dclk_vop_frac, and then we can start to take use of the fractional dividers

[v2 PATCH 2/3] clk: rockchip: add dclk_vop_frac ids for vop

From: Yakir Yang Export the dclk_vop_frac out, so we can set the dclk_vop as the child of dclk_vop_frac, and then we can start to take use of the fractional dividers. Signed-off-by: Xing Zheng Signed-off-by: Yakir Yang Signed-off-by: Chris Zhong --- include/dt-bindings/clock/rk3399-cru.h

[v2 PATCH 3/3] clk: rockchip: use the dclk_vop_frac clock ids

From: Yakir Yang Export the dclk_vop_frac out, so we can set the dclk_vop as the child of dclk_vop_frac, and then we can start to take use of the fractional dividers. Signed-off-by: Xing Zheng Signed-off-by: Yakir Yang Signed-off-by: Chris Zhong --- drivers/clk/rockchip/clk-rk3399.c | 4

[v2 PATCH 1/3] clk: rockchip: Fractional dividers can't set parent rates

e out how to make fractional dividers able to use CLK_SET_RATE_PARENT, but until they do let's not confuse the common clock framework (and anyone using it) by setting the flag. Signed-off-by: Douglas Anderson Signed-off-by: Chris Zhong --- drivers/clk/rockchip/clk-rk3

[PATCH 2/3] clk: rockchip: add dclk_vop_frac ids for vop

From: Yakir Yang Export the dclk_vop_frac out, so we can set the dclk_vop as the child of dclk_vop_frac, and then we can start to take use of the fractional dividers. Signed-off-by: Xing Zheng Signed-off-by: Yakir Yang Signed-off-by: Chris Zhong --- include/dt-bindings/clock/rk3399-cru.h

[PATCH 3/3] clk: rockchip: use the dclk_vop_frac clock ids

From: Yakir Yang Export the dclk_vop_frac out, so we can set the dclk_vop as the child of dclk_vop_frac, and then we can start to take use of the fractional dividers. Signed-off-by: Xing Zheng Signed-off-by: Yakir Yang Signed-off-by: Chris Zhong --- drivers/clk/rockchip/clk-rk3399.c | 4

[PATCH 1/3] clk: rockchip: Fractional dividers can't set parent rates

e out how to make fractional dividers able to use CLK_SET_RATE_PARENT, but until they do let's not confuse the common clock framework (and anyone using it) by setting the flag. Signed-off-by: Douglas Anderson Signed-off-by: Chris Zhong --- drivers/clk/rockchip/clk-rk3

[PATCH] drm/rockchip: vop: make vop register setting take effect

: Chris Zhong --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index efbc41a..a0bfcff 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b

[v14.1 PATCH 5/5] drm/rockchip: cdn-dp: add cdn DP support for rk3399

/firmware/rockchip/dptx.bin. The uCPU in charge of aux communication and link training, the host use mailbox to communicate with the ucpu. The dclk pin_pol of vop must not be invert for DP. Signed-off-by: Chris Zhong Reviewed-by: Sean Paul Acked-by: Mark Yao --- Changes in v14.1: - power on the power

[v14 PATCH 4/5] Documentation: bindings: add dt documentation for cdn DP controller

This patch adds a binding that describes the cdn DP controller for rk3399. Signed-off-by: Chris Zhong Acked-by: Rob Herring Reviewed-by: Guenter Roeck --- Changes in v14: None Changes in v13: - add dptx and apb reset Changes in v12: None Changes in v11: - refer dp phy Changes in v10: - add

[v14 PATCH 1/5] Documentation: bindings: add dt doc for Rockchip USB Type-C PHY

This patch adds a binding that describes the Rockchip USB Type-C PHY for rk3399 Signed-off-by: Chris Zhong Reviewed-by: Tomasz Figa Reviewed-by: Kever Yang Reviewed-by: Guenter Roeck Acked-by: Rob Herring --- Changes in v14: None Changes in v13: None Changes in v12: None Changes in v11

[v14 PATCH 2/5] phy: Add USB Type-C PHY driver for rk3399

registers them under the child node. Signed-off-by: Chris Zhong Signed-off-by: Kever Yang Reviewed-by: Guenter Roeck Tested-by: Guenter Roeck --- Changes in v14: - change the name of property from super speed to EXTCON_PROP_USB_SS Changes in v13: - add some description in front of driver

[v14 PATCH 3/5] arm64: dts: rockchip: add Type-C phy for RK3399

There are 2 Type-C phy on RK3399, they are almost same, except the address of register. They support USB3.0 Type-C and DisplayPort1.3 Alt Mode on USB Type-C. Register a phy, supply it to USB3 controller and DP controller. Signed-off-by: Chris Zhong Reviewed-by: Guenter Roeck --- Changes in

[v14 PATCH 0/5] Rockchip Type-C and DisplayPort driver

ption - add #sound-dai-cells description - use extcon API - use hdmi-codec for the DP Asoc - do not initialize the "ret" - printk a err log when drm_of_encoder_active_endpoint_id - modify the dclk pin_pol to a single line Chris Zhong (5): Documentation: bindings: add dt doc for Rockchip U

[v14 PATCH 5/5] drm/rockchip: cdn-dp: add cdn DP support for rk3399

/firmware/rockchip/dptx.bin. The uCPU in charge of aux communication and link training, the host use mailbox to communicate with the ucpu. The dclk pin_pol of vop must not be invert for DP. Signed-off-by: Chris Zhong Reviewed-by: Sean Paul Acked-by: Mark Yao --- Changes in v14: - change super speed

Re: [v13.1 PATCH 2/5] phy: Add USB Type-C PHY driver for rk3399

nux/kernel/git/chanwoo/extcon.git ib-extcon-phy-4.9 Regards, Chanwoo Choi On 2016년 08월 23일 14:02, Chris Zhong wrote: Add a PHY provider driver for the rk3399 SoC Type-c PHY. The USB Type-C PHY is designed to support the USB3 and DP applications. The USB3 operates in SuperSpeed mode and the DP can

[v13.1 PATCH 2/5] phy: Add USB Type-C PHY driver for rk3399

registers them under the child node. Signed-off-by: Chris Zhong Signed-off-by: Kever Yang Reviewed-by: Guenter Roeck Tested-by: Guenter Roeck --- Changes in v13.1: - add some description in front of driver - change name of usb to usb3 - add a USB3 RX register configuration Changes in v13: - do

[v13 PATCH 3/5] arm64: dts: rockchip: add Type-C phy for RK3399

There are 2 Type-C phy on RK3399, they are almost same, except the address of register. They support USB3.0 Type-C and DisplayPort1.3 Alt Mode on USB Type-C. Register a phy, supply it to USB3 controller and DP controller. Signed-off-by: Chris Zhong Reviewed-by: Guenter Roeck --- Changes in

[v13 PATCH 2/5] phy: Add USB Type-C PHY driver for rk3399

PHY deivces, the phy[0] for DP, and phy[1] for USB3. Signed-off-by: Chris Zhong Signed-off-by: Kever Yang Reviewed-by: Guenter Roeck Tested-by: Guenter Roeck --- Changes in v13: - do not return err if nothing connected with Type-C, when usb phy power on, since the USB core driver will call

[v13 PATCH 1/5] Documentation: bindings: add dt doc for Rockchip USB Type-C PHY

This patch adds a binding that describes the Rockchip USB Type-C PHY for rk3399 Signed-off-by: Chris Zhong Reviewed-by: Tomasz Figa Reviewed-by: Kever Yang Reviewed-by: Guenter Roeck Acked-by: Rob Herring --- Changes in v13: None Changes in v12: None Changes in v11: - make a clearer

[v13 PATCH 0/5] Rockchip Type-C and DisplayPort driver

rn err number when get clk failed - remove ADDR_ADJ define - use devm_clk_get(&pdev->dev, "tcpdcore") - add extcon node description - add #sound-dai-cells description - use extcon API - use hdmi-codec for the DP Asoc - do not initialize the "ret" - printk a err log when drm_o

[v13 PATCH 4/5] Documentation: bindings: add dt documentation for cdn DP controller

This patch adds a binding that describes the cdn DP controller for rk3399. Signed-off-by: Chris Zhong Acked-by: Rob Herring Reviewed-by: Guenter Roeck --- Changes in v13: - add dptx and apb reset Changes in v12: None Changes in v11: - refer dp phy Changes in v10: - add pclk_vio_grf clock

[v13 PATCH 5/5] drm/rockchip: cdn-dp: add cdn DP support for rk3399

/firmware/rockchip/dptx.bin. The uCPU in charge of aux communication and link training, the host use mailbox to communicate with the ucpu. The dclk pin_pol of vop must not be invert for DP. Signed-off-by: Chris Zhong Reviewed-by: Sean Paul Acked-by: Mark Yao --- Changes in v13: - support suspend

[PATCH v12 PATCH 2/5] phy: Add USB Type-C PHY driver for rk3399

PHY deivces, the phy[0] for DP, and phy[1] for USB3. Signed-off-by: Chris Zhong Signed-off-by: Kever Yang Reviewed-by: Guenter Roeck Tested-by: Guenter Roeck --- Changes in v12: - enable DP+USB3 mode, only when EXTCON_PROP_USB_SUPERSPEED equal 1 and DP is attached Changes in v11: - make a

[PATCH v12 PATCH 5/5] drm/rockchip: cdn-dp: add cdn DP support for rk3399

/firmware/rockchip/dptx.bin. The uCPU in charge of aux communication and link training, the host use mailbox to communicate with the ucpu. The dclk pin_pol of vop must not be invert for DP. Signed-off-by: Chris Zhong Reviewed-by: Sean Paul Acked-by: Mark Yao --- Changes in v12: - use

[PATCH v12 PATCH 0/5] Rockchip Type-C and DisplayPort driver

rn err number when get clk failed - remove ADDR_ADJ define - use devm_clk_get(&pdev->dev, "tcpdcore") - add extcon node description - add #sound-dai-cells description - use extcon API - use hdmi-codec for the DP Asoc - do not initialize the "ret" - printk a err log when drm_o

[PATCH v12 PATCH 1/5] Documentation: bindings: add dt doc for Rockchip USB Type-C PHY

This patch adds a binding that describes the Rockchip USB Type-C PHY for rk3399 Signed-off-by: Chris Zhong Reviewed-by: Tomasz Figa Reviewed-by: Kever Yang Reviewed-by: Guenter Roeck Acked-by: Rob Herring --- Changes in v12: None Changes in v11: - make a clearer emarcation between usb phy

[PATCH v12 PATCH 4/5] Documentation: bindings: add dt documentation for cdn DP controller

This patch adds a binding that describes the cdn DP controller for rk3399. Signed-off-by: Chris Zhong Acked-by: Rob Herring --- Changes in v12: None Changes in v11: - refer dp phy Changes in v10: - add pclk_vio_grf clock Changes in v9: - modify the reference phy = <&tcphy0 0>,

[PATCH v12 PATCH 3/5] arm64: dts: rockchip: add Type-C phy for RK3399

There are 2 Type-C phy on RK3399, they are almost same, except the address of register. They support USB3.0 Type-C and DisplayPort1.3 Alt Mode on USB Type-C. Register a phy, supply it to USB3 controller and DP controller. Signed-off-by: Chris Zhong Reviewed-by: Guenter Roeck --- Changes in

[RESEND PATCH v11 PATCH 5/5] drm/rockchip: cdn-dp: add cdn DP support for rk3399

/firmware/rockchip/dptx.bin. The uCPU in charge of aux communication and link training, the host use mailbox to communicate with the ucpu. The dclk pin_pol of vop must not be invert for DP. Signed-off-by: Chris Zhong Reviewed-by: Sean Paul Acked-by: Mark Yao --- Changes in v11: - add best_encoder back

[RESEND PATCH v11 PATCH 0/5] Rockchip Type-C and DisplayPort driver

se extcon API - use hdmi-codec for the DP Asoc - do not initialize the "ret" - printk a err log when drm_of_encoder_active_endpoint_id - modify the dclk pin_pol to a single line Chris Zhong (5): Documentation: bindings: add dt doc for Rockchip USB Type-C PHY phy: Add USB Type-C PHY driver for rk339

<    1   2   3   4   5   6   7   >