Hi Heiko
On 06/16/2016 06:11 AM, Heiko Stuebner wrote:
Am Montag, 13. Juni 2016, 17:39:46 schrieb Chris Zhong:
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2:
- add some registers descr
Hi Heiko
On 06/16/2016 06:11 AM, Heiko Stuebner wrote:
Am Montag, 13. Juni 2016, 17:39:46 schrieb Chris Zhong:
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399
Signed-off-by: Chris Zhong
---
Changes in v2:
- add some registers description
Changes in v1
Hi Guenter
Thanks for your comments
On 06/09/2016 06:13 AM, Guenter Roeck wrote:
+ if (ret < 0) {
>+ dev_err(dp->dev, "failed to request firmware %d\n", ret);
>+ return ret;
>+ }
>+
>+ hdr = (struct cdn_firmware_header *)fw->data;
>+ if (fw->size !=
Hi Guenter
Thanks for your comments
On 06/09/2016 06:13 AM, Guenter Roeck wrote:
+ if (ret < 0) {
>+ dev_err(dp->dev, "failed to request firmware %d\n", ret);
>+ return ret;
>+ }
>+
>+ hdr = (struct cdn_firmware_header *)fw->data;
>+ if (fw->size !=
"ret"
- printk a err log when drm_of_encoder_active_endpoint_id
- modify the dclk pin_pol to a single line
Chris Zhong (4):
Documentation: bindings: add dt doc for Rockchip USB Type-C PHY
phy: Add USB Type-C PHY driver for rk3399
Documentation: bindings: add dt documentation for cdn DP con
"ret"
- printk a err log when drm_of_encoder_active_endpoint_id
- modify the dclk pin_pol to a single line
Chris Zhong (4):
Documentation: bindings: add dt doc for Rockchip USB Type-C PHY
phy: Add USB Type-C PHY driver for rk3399
Documentation: bindings: add dt documentation for cdn DP con
/firmware/cdn/dptx.bin. The
uCPU in charge of aux communication and link training, the host use
mailbox to communicate with the ucpu.
The dclk pin_pol of vop must not be invert for DP.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2:
- Alphabetic order
- remove excess error m
/firmware/cdn/dptx.bin. The
uCPU in charge of aux communication and link training, the host use
mailbox to communicate with the ucpu.
The dclk pin_pol of vop must not be invert for DP.
Signed-off-by: Chris Zhong
---
Changes in v2:
- Alphabetic order
- remove excess error message
- use define clk_rate
-by: Chris Zhong <z...@rock-chips.com>
Signed-off-by: Kever Yang <kever.y...@rock-chips.com>
---
Changes in v2:
- select RESET_CONTROLLER
- alphabetic order
- modify some spelling mistakes
- make mode cleaner
- use bool for enable/disable
- check all of the return value
- return a bette
-by: Chris Zhong
Signed-off-by: Kever Yang
---
Changes in v2:
- select RESET_CONTROLLER
- alphabetic order
- modify some spelling mistakes
- make mode cleaner
- use bool for enable/disable
- check all of the return value
- return a better err number
- use more readx_poll_timeout
This patch adds a binding that describes the cdn DP controller for
rk3399.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
Changes in v1:
- add extcon node description
- add #sound-dai-cells description
.../bindings/display/rockchip/cdn-dp-rockchip.txt
This patch adds a binding that describes the cdn DP controller for
rk3399.
Signed-off-by: Chris Zhong
---
Changes in v2: None
Changes in v1:
- add extcon node description
- add #sound-dai-cells description
.../bindings/display/rockchip/cdn-dp-rockchip.txt | 62 ++
1 file
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2:
- add some registers description
Changes in v1:
- add extcon node description
- move the registers in phy driver
- remove the suffix of
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399
Signed-off-by: Chris Zhong
---
Changes in v2:
- add some registers description
Changes in v1:
- add extcon node description
- move the registers in phy driver
- remove the suffix of reset
.../devicetree/bindings
Hi Rob
On 06/07/2016 09:46 PM, Rob Herring wrote:
On Mon, Jun 6, 2016 at 7:33 PM, Chris Zhong <z...@rock-chips.com> wrote:
Hi Rob
On 06/06/2016 10:27 PM, Rob Herring wrote:
On Fri, Jun 03, 2016 at 11:15:08PM +0800, Chris Zhong wrote:
This patch adds a binding that describes the Ro
Hi Rob
On 06/07/2016 09:46 PM, Rob Herring wrote:
On Mon, Jun 6, 2016 at 7:33 PM, Chris Zhong wrote:
Hi Rob
On 06/06/2016 10:27 PM, Rob Herring wrote:
On Fri, Jun 03, 2016 at 11:15:08PM +0800, Chris Zhong wrote:
This patch adds a binding that describes the Rockchip USB Type-C PHY
Hi Rob
On 06/06/2016 10:27 PM, Rob Herring wrote:
On Fri, Jun 03, 2016 at 11:15:08PM +0800, Chris Zhong wrote:
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v1:
- add extcon node descr
Hi Rob
On 06/06/2016 10:27 PM, Rob Herring wrote:
On Fri, Jun 03, 2016 at 11:15:08PM +0800, Chris Zhong wrote:
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399
Signed-off-by: Chris Zhong
---
Changes in v1:
- add extcon node description
- move the registers
-by: Chris Zhong <z...@rock-chips.com>
Signed-off-by: Kever Yang <kever.y...@rock-chips.com>
---
Changes in v1:
- update the licence note
- init core clock to 50MHz
- use extcon API
- remove unused global
- add some comments for magic num
- change usleep_range(1000, 2000) tousleep_rang
-by: Chris Zhong
Signed-off-by: Kever Yang
---
Changes in v1:
- update the licence note
- init core clock to 50MHz
- use extcon API
- remove unused global
- add some comments for magic num
- change usleep_range(1000, 2000) tousleep_range(1000, 1050)
- remove __func__ from dev_err
- return err number
/firmware/cdn/dptx.bin. The
uCPU in charge of aux communication and link training, the host use
mailbox to communicate with the ucpu.
The dclk pin_pol of vop must not be invert for DP.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v1:
- use extcon API
- use hdmi-codec for the D
/firmware/cdn/dptx.bin. The
uCPU in charge of aux communication and link training, the host use
mailbox to communicate with the ucpu.
The dclk pin_pol of vop must not be invert for DP.
Signed-off-by: Chris Zhong
---
Changes in v1:
- use extcon API
- use hdmi-codec for the DP Asoc
- do not initialize
define
- use devm_clk_get(>dev, "tcpdcore")
- add extcon node description
- add #sound-dai-cells description
- use extcon API
- use hdmi-codec for the DP Asoc
- do not initialize the "ret"
- printk a err log when drm_of_encoder_active_endpoint_id
- modify the dclk pin_pol
define
- use devm_clk_get(>dev, "tcpdcore")
- add extcon node description
- add #sound-dai-cells description
- use extcon API
- use hdmi-codec for the DP Asoc
- do not initialize the "ret"
- printk a err log when drm_of_encoder_active_endpoint_id
- modify the dclk pin_pol
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v1:
- add extcon node description
- move the registers in phy driver
- remove the suffix of reset
.../devicetree/bindings/phy/phy-rockchip-typ
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399
Signed-off-by: Chris Zhong
---
Changes in v1:
- add extcon node description
- move the registers in phy driver
- remove the suffix of reset
.../devicetree/bindings/phy/phy-rockchip-typec.txt | 46
This patch adds a binding that describes the cdn DP controller for
rk3399.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v1:
- add extcon node description
- add #sound-dai-cells description
.../bindings/display/rockchip/cdn-dp-rockchip.txt | 62 +++
This patch adds a binding that describes the cdn DP controller for
rk3399.
Signed-off-by: Chris Zhong
---
Changes in v1:
- add extcon node description
- add #sound-dai-cells description
.../bindings/display/rockchip/cdn-dp-rockchip.txt | 62 ++
1 file changed, 62
Hi Rob
On 06/01/2016 10:54 PM, Rob Herring wrote:
On Fri, May 27, 2016 at 06:45:38PM +0800, Chris Zhong wrote:
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
.../devicetree/bindings/phy/phy-ro
Hi Rob
On 06/01/2016 10:54 PM, Rob Herring wrote:
On Fri, May 27, 2016 at 06:45:38PM +0800, Chris Zhong wrote:
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399.
Signed-off-by: Chris Zhong
---
.../devicetree/bindings/phy/phy-rockchip-typec.txt | 55
On 06/01/2016 03:57 AM, Doug Anderson wrote:
Chris,
On Fri, May 27, 2016 at 1:46 AM, Chris Zhong <z...@rock-chips.com> wrote:
Hi Heiko
On 05/27/2016 04:29 PM, Heiko Stuebner wrote:
Hi Chris,
Am Freitag, 27. Mai 2016, 14:02:15 schrieb Chris Zhong:
This patch adds a binding that des
On 06/01/2016 03:57 AM, Doug Anderson wrote:
Chris,
On Fri, May 27, 2016 at 1:46 AM, Chris Zhong wrote:
Hi Heiko
On 05/27/2016 04:29 PM, Heiko Stuebner wrote:
Hi Chris,
Am Freitag, 27. Mai 2016, 14:02:15 schrieb Chris Zhong:
This patch adds a binding that describes the Rockchip USB
Hi Doug
Thanks for your review, I will modified them in next version(v1)
and with Guenter Roeck's comments in:
https://chromium-review.googlesource.com/#/c/348154/
On 06/01/2016 05:35 AM, Doug Anderson wrote:
Chris,
On Thu, May 26, 2016 at 11:02 PM, Chris Zhong <z...@rock-chips.com>
Hi Doug
Thanks for your review, I will modified them in next version(v1)
and with Guenter Roeck's comments in:
https://chromium-review.googlesource.com/#/c/348154/
On 06/01/2016 05:35 AM, Doug Anderson wrote:
Chris,
On Thu, May 26, 2016 at 11:02 PM, Chris Zhong wrote:
Add a PHY provider
Hi Mark & Vinod
Thanks for your suggestion, I am going to use this HDMI codec driver.
But it seems no one use it, currently.
On 05/30/2016 11:33 AM, Vinod Koul wrote:
On Fri, May 27, 2016 at 09:23:12PM +0100, Mark Brown wrote:
On Fri, May 27, 2016 at 06:45:41PM +0800, Chris Zhong w
Hi Mark & Vinod
Thanks for your suggestion, I am going to use this HDMI codec driver.
But it seems no one use it, currently.
On 05/30/2016 11:33 AM, Vinod Koul wrote:
On Fri, May 27, 2016 at 09:23:12PM +0100, Mark Brown wrote:
On Fri, May 27, 2016 at 06:45:41PM +0800, Chris Zhong w
-by: Chris Zhong <z...@rock-chips.com>
---
drivers/phy/Kconfig| 7 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-rockchip-typec.c | 823 +
include/linux/phy/phy-rockchip-typec.h | 72 +++
4 files changed, 903 inse
/firmware/cdn/dptx.bin. The
uCPU in charge of aux communication and link training, the host use
mailbox to communicate with the ucpu.
The dclk pin_pol of vop must not be invert for DP.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
drivers/gpu/drm/rockchip/Kconfig| 9 +
drive
This patch adds a binding that describes the cdn DP controller for
rk3399.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
.../bindings/display/rockchip/cdn-dp-rockchip.txt | 57 ++
1 file changed, 57 insertions(+)
create mode 100644
Documentation/devicetree/bi
-by: Chris Zhong
---
drivers/phy/Kconfig| 7 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-rockchip-typec.c | 823 +
include/linux/phy/phy-rockchip-typec.h | 72 +++
4 files changed, 903 insertions(+)
create mode 100644
/firmware/cdn/dptx.bin. The
uCPU in charge of aux communication and link training, the host use
mailbox to communicate with the ucpu.
The dclk pin_pol of vop must not be invert for DP.
Signed-off-by: Chris Zhong
---
drivers/gpu/drm/rockchip/Kconfig| 9 +
drivers/gpu/drm/rockchip/Makefile
This patch adds a binding that describes the cdn DP controller for
rk3399.
Signed-off-by: Chris Zhong
---
.../bindings/display/rockchip/cdn-dp-rockchip.txt | 57 ++
1 file changed, 57 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/rockchip/cdn
codec driver get some interfaces from cdn-dp driver, than using those
to set DP audio formats, corresponding to alsa formats.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
sound/soc/codecs/Kconfig| 3 +
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/cdn-dp-a
The driver is used for cdn dp codec embedded in rk3399
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
.../bindings/sound/rockchip-cdn-dp-audio.txt | 12 ++
sound/soc/rockchip/Kconfig | 9 ++
sound/soc/rockchip/Makefile
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
.../devicetree/bindings/phy/phy-rockchip-typec.txt | 55 ++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devi
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399.
Signed-off-by: Chris Zhong
---
.../devicetree/bindings/phy/phy-rockchip-typec.txt | 55 ++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/phy
The driver is used for cdn dp codec embedded in rk3399
Signed-off-by: Chris Zhong
---
.../bindings/sound/rockchip-cdn-dp-audio.txt | 12 ++
sound/soc/rockchip/Kconfig | 9 ++
sound/soc/rockchip/Makefile| 2 +
sound/soc/rockchip
codec driver get some interfaces from cdn-dp driver, than using those
to set DP audio formats, corresponding to alsa formats.
Signed-off-by: Chris Zhong
---
sound/soc/codecs/Kconfig| 3 +
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/cdn-dp-audio.c | 246
,
this branch has no rk3399.dtsi, so the patch about dts is not included
in this series.
Chris Zhong (6):
phy: Add USB Type-C PHY driver for rk3399
Documentation: bindings: add dt doc for Rockchip USB Type-C PHY
drm/rockchip: vop: add cdn DP support for rk3399
Documentation: bindings: add
,
this branch has no rk3399.dtsi, so the patch about dts is not included
in this series.
Chris Zhong (6):
phy: Add USB Type-C PHY driver for rk3399
Documentation: bindings: add dt doc for Rockchip USB Type-C PHY
drm/rockchip: vop: add cdn DP support for rk3399
Documentation: bindings: add
Hi Heiko
On 05/27/2016 04:29 PM, Heiko Stuebner wrote:
Hi Chris,
Am Freitag, 27. Mai 2016, 14:02:15 schrieb Chris Zhong:
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
.../devicetree/bindings/p
Hi Heiko
On 05/27/2016 04:29 PM, Heiko Stuebner wrote:
Hi Chris,
Am Freitag, 27. Mai 2016, 14:02:15 schrieb Chris Zhong:
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399.
Signed-off-by: Chris Zhong
---
.../devicetree/bindings/phy/phy-rockchip-typec.txt | 55
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
.../devicetree/bindings/phy/phy-rockchip-typec.txt | 55 ++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devi
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399.
Signed-off-by: Chris Zhong
---
.../devicetree/bindings/phy/phy-rockchip-typec.txt | 55 ++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/phy
/firmware/cdn/dptx.bin. The
uCPU in charge of aux communication and link training, the host use
mailbox to communicate with the ucpu.
The dclk pin_pol of vop must not be invert for DP.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
drivers/gpu/drm/rockchip/Kconfig| 9 +
drive
The driver is used for cdn dp codec embedded in rk3399
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
.../bindings/sound/rockchip-cdn-dp-audio.txt | 12 ++
sound/soc/rockchip/Kconfig | 9 ++
sound/soc/rockchip/Makefile
codec driver get some interfaces from cdn-dp driver, than using those
to set DP audio formats, corresponding to alsa formats.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
sound/soc/codecs/Kconfig| 3 +
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/cdn-dp-a
/firmware/cdn/dptx.bin. The
uCPU in charge of aux communication and link training, the host use
mailbox to communicate with the ucpu.
The dclk pin_pol of vop must not be invert for DP.
Signed-off-by: Chris Zhong
---
drivers/gpu/drm/rockchip/Kconfig| 9 +
drivers/gpu/drm/rockchip/Makefile
The driver is used for cdn dp codec embedded in rk3399
Signed-off-by: Chris Zhong
---
.../bindings/sound/rockchip-cdn-dp-audio.txt | 12 ++
sound/soc/rockchip/Kconfig | 9 ++
sound/soc/rockchip/Makefile| 2 +
sound/soc/rockchip
codec driver get some interfaces from cdn-dp driver, than using those
to set DP audio formats, corresponding to alsa formats.
Signed-off-by: Chris Zhong
---
sound/soc/codecs/Kconfig| 3 +
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/cdn-dp-audio.c | 246
This patch adds a binding that describes the cdn DP controller for
rk3399.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
.../bindings/display/rockchip/cdn-dp-rockchip.txt | 57 ++
1 file changed, 57 insertions(+)
create mode 100644
Documentation/devicetree/bi
This patch adds a binding that describes the cdn DP controller for
rk3399.
Signed-off-by: Chris Zhong
---
.../bindings/display/rockchip/cdn-dp-rockchip.txt | 57 ++
1 file changed, 57 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/rockchip/cdn
about dts is not included
in this series.
Chris Zhong (6):
phy: Add USB Type-C PHY driver for rk3399
Documentation: bindings: add dt doc for Rockchip USB Type-C PHY
drm/rockchip: vop: add cdn DP support for rk3399
Documentation: bindings: add dt documentation for cdn DP controller
ASoC: cdn
about dts is not included
in this series.
Chris Zhong (6):
phy: Add USB Type-C PHY driver for rk3399
Documentation: bindings: add dt doc for Rockchip USB Type-C PHY
drm/rockchip: vop: add cdn DP support for rk3399
Documentation: bindings: add dt documentation for cdn DP controller
ASoC: cdn
-by: Chris Zhong <z...@rock-chips.com>
---
drivers/phy/Kconfig | 7 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-rockchip-typec.c | 823 +++
3 files changed, 831 insertions(+)
create mode 100644 drivers/phy/phy-rockchip-typec.c
-by: Chris Zhong
---
drivers/phy/Kconfig | 7 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-rockchip-typec.c | 823 +++
3 files changed, 831 insertions(+)
create mode 100644 drivers/phy/phy-rockchip-typec.c
diff --git a/drivers/phy
Hi Mark
On 01/06/2016 09:48 AM, Mark yao wrote:
On 2015年12月23日 11:43, Chris Zhong wrote:
+static int dw_mipi_dsi_register(struct drm_device *drm,
+ struct dw_mipi_dsi *dsi)
+{
+struct drm_encoder *encoder = >encoder;
+struct drm_connector *connector = >con
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong
Acked-by: Mark Yao
---
Changes in v7.2:
- make sure disable clk when drm_panel_prepare err (Mark Yao)
Changes in v7:
- modify the config to tristate for modules build (Mark
Hi Mark
On 01/06/2016 09:48 AM, Mark yao wrote:
On 2015年12月23日 11:43, Chris Zhong wrote:
+static int dw_mipi_dsi_register(struct drm_device *drm,
+ struct dw_mipi_dsi *dsi)
+{
+struct drm_encoder *encoder = >encoder;
+struct drm_connector *connector = >con
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
Acked-by: Mark Yao <mark@rock-chips.com>
---
Changes in v7.2:
- make sure disable clk when drm_panel_prepare err (Mark Yao)
Changes in
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong
Acked-by: Mark Yao
---
Changes in v7.1:
- make sure disable clk when drm_panel_prepare err (Mark Yao)
Changes in v7:
- modify the config to tristate for modules build (Mark
o bindings/display/rockchip/
Chris Zhong (5):
drm/rockchip: return a true clock rate to adjusted_mode
Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver
drm: rockchip: Support Synopsys DW MIPI DSI
ARM: dts: rockchip: add rk3288 mipi_dsi nodes
ARM: dts: rockchip: add support
Since the mipi dsi driver need to use the clock of vop to make the
calculation of Blanking. But sometimes the clock driver can not set a
accurate clock_rate for vop, get it by clk_round_rate before mode_set,
so we can get the true value.
Signed-off-by: Chris Zhong
Acked-by: Mark Yao
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong
---
Changes in v7:
- Move the lcd_en control to act8846 dts
Changes in v6: None
Changes in v5:
- add a blank line befor lcd_en
Changes in v4: None
Changes in v3: None
arch
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong
Acked-by: Rob Herring
---
Changes in v7: None
Changes in v6:
- update the document, since the bridge device has been deleted.
Changes in v5: None
Changes in v4: None
Changes in v3:
- move
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong
---
Changes in v7: None
Changes in v6: None
Changes in v5:
- modify the clk name to SCLK_MIPIDSI_24M
Changes in v4: None
Changes in v3: None
arch/arm/boot/dts/rk3288.dtsi | 39
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong
Acked-by: Mark Yao
---
Changes in v7:
- modify the config to tristate for modules build (Mark Yao)
- Pass NULL 'name' to drm_encoder_init() to fix compile err (Mark Yao
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
Acked-by: Mark Yao <mark@rock-chips.com>
---
Changes in v7.1:
- make sure disable clk when drm_panel_prepare err (Mark Yao)
Changes in
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong <z...@rock-chips.com>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes in v7: None
Changes in v6:
- update the document, since the bridge device has been deleted.
Changes in v5:
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v7: None
Changes in v6: None
Changes in v5:
- modify the clk name to SCLK_MIPIDSI_24M
Changes in v4: None
Changes in v3: None
arch/ar
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
Acked-by: Mark Yao <mark@rock-chips.com>
---
Changes in v7:
- modify the config to tristate for modules build (Mark Yao)
- Pas
Since the mipi dsi driver need to use the clock of vop to make the
calculation of Blanking. But sometimes the clock driver can not set a
accurate clock_rate for vop, get it by clk_round_rate before mode_set,
so we can get the true value.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v7:
- Move the lcd_en control to act8846 dts
Changes in v6: None
Changes in v5:
- add a blank line befor lcd_en
Changes in v4
o bindings/display/rockchip/
Chris Zhong (5):
drm/rockchip: return a true clock rate to adjusted_mode
Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver
drm: rockchip: Support Synopsys DW MIPI DSI
ARM: dts: rockchip: add rk3288 mipi_dsi nodes
ARM: dts: rockchip: add support
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong
---
Changes in v6.3:
- move the mipi_en gate to ockchip_drm_crtc_mode_config
Changes in v6.2:
- Remove the atomic feature check (Mark Yao)
Changes in v6.1:
- Add atomic API
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v6.3:
- move the mipi_en gate to ockchip_drm_crtc_mode_config
Changes in v6.2:
- Remove the atomic feature check (Mark Yao)
C
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong
---
Changes in v6.2:
- Remove the atomic feature check (Mark Yao)
Changes in v6.1:
- Add atomic API support (Heiko Stübne)
Changes in v6:
- Do not use bridge driver
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v6.2:
- Remove the atomic feature check (Mark Yao)
Changes in v6.1:
- Add atomic API support (Heiko Stübne)
Changes in v6:
- Do n
Hi Heiko
Thanks for your reminder.
I have post the v6.1 mipi patch with the atomic support.
<https://patchwork.kernel.org/patch/7881781/>
On 12/17/2015 05:29 PM, Heiko Stübner wrote:
Hi Chris,
Am Mittwoch, 16. Dezember 2015, 18:10:10 schrieb Chris Zhong:
The rk3288 MIPI DSI is a Sy
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong
---
Changes in v6.1:
- Add atomic API support (Heiko Stübne)
Changes in v6:
- Do not use bridge driver (Thierry Reding)
- Optimization the phy init sequence
Changes in v5
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v6.1:
- Add atomic API support (Heiko Stübne)
Changes in v6:
- Do not use bridge driver (Thierry Reding)
- Optimization the ph
Hi Heiko
Thanks for your reminder.
I have post the v6.1 mipi patch with the atomic support.
<https://patchwork.kernel.org/patch/7881781/>
On 12/17/2015 05:29 PM, Heiko Stübner wrote:
Hi Chris,
Am Mittwoch, 16. Dezember 2015, 18:10:10 schrieb Chris Zhong:
The rk3288 MIPI DSI is a Sy
From: Liu Ying
Signed-off-by: Liu Ying
Acked-by: Thierry Reding
Signed-off-by: Chris Zhong
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
include/drm/drm_mipi_dsi.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/include/drm
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong
---
Changes in v6: None
Changes in v5:
- modify the clk name to SCLK_MIPIDSI_24M
Changes in v4: None
Changes in v3: None
arch/arm/boot/dts/rk3288.dtsi | 39
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong
---
Changes in v6:
- Do not use bridge driver (Thierry Reding)
- Optimization the phy init sequence
Changes in v5: None
Changes in v4: None
Changes in v3: None
drivers/gpu
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong
---
Changes in v6: None
Changes in v5:
- add a blank line befor lcd_en
Changes in v4: None
Changes in v3: None
arch/arm/boot/dts/rk3288-evb.dtsi | 20 +++-
1
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong
Acked-by: Rob Herring
---
Changes in v6:
- update the document, since the bridge device has been deleted.
Changes in v5: None
Changes in v4: None
Changes in v3:
- move dw_mipi_dsi_rockchip.txt
mode_fixup
Changes in v3:
- move dw_mipi_dsi_rockchip.txt to bindings/display/rockchip/
Chris Zhong (5):
drm/rockchip: return a true clock rate to adjusted_mode
Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver
drm: rockchip: Support Synopsys DW MIPI DSI
ARM: dts: roc
Since the mipi dsi driver need to use the clock of vop to make the
calculation of Blanking. But sometimes the clock driver can not set a
accurate clock_rate for vop, get it by clk_round_rate before mode_set,
so we can get the true value.
Signed-off-by: Chris Zhong
Acked-by: Mark Yao
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v6: None
Changes in v5:
- add a blank line befor lcd_en
Changes in v4: None
Changes in v3: None
arch/arm/boot/dts/rk3288-evb.dts
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