On Wed, Aug 30, 2017 at 03:08:01PM +0100, Marc Zyngier wrote:
> On 28/08/17 19:18, Christoffer Dall wrote:
> > On Mon, Jul 31, 2017 at 06:26:22PM +0100, Marc Zyngier wrote:
> >> When the guest issues a MOVI, we need to tell the physical ITS
> >> that we're now targetti
On Wed, Aug 30, 2017 at 01:53:30PM +0100, Marc Zyngier wrote:
> On 30/08/17 12:46, Christoffer Dall wrote:
> > On Wed, Aug 30, 2017 at 11:28:08AM +0100, Marc Zyngier wrote:
> >> On 26/08/17 20:48, Christoffer Dall wrote:
> >>> On Mon, Jul 31, 2017 at 06:26:
On Wed, Aug 30, 2017 at 01:53:30PM +0100, Marc Zyngier wrote:
> On 30/08/17 12:46, Christoffer Dall wrote:
> > On Wed, Aug 30, 2017 at 11:28:08AM +0100, Marc Zyngier wrote:
> >> On 26/08/17 20:48, Christoffer Dall wrote:
> >>> On Mon, Jul 31, 2017 at 06:26:
On Wed, Aug 30, 2017 at 12:30:02PM +0100, Marc Zyngier wrote:
> On 28/08/17 19:18, Christoffer Dall wrote:
> > On Mon, Jul 31, 2017 at 06:26:35PM +0100, Marc Zyngier wrote:
> >> Yet another braindump so I can free some cells...
> >>
> >> Signed-off-by
On Wed, Aug 30, 2017 at 12:30:02PM +0100, Marc Zyngier wrote:
> On 28/08/17 19:18, Christoffer Dall wrote:
> > On Mon, Jul 31, 2017 at 06:26:35PM +0100, Marc Zyngier wrote:
> >> Yet another braindump so I can free some cells...
> >>
> >> Signed-off-by: Marc
On Wed, Aug 30, 2017 at 10:59:46AM +0100, Marc Zyngier wrote:
> On 28/08/17 19:17, Christoffer Dall wrote:
> > On Mon, Jul 31, 2017 at 06:26:31PM +0100, Marc Zyngier wrote:
> >> The redistributor needs to be told which vPE is about to be run,
> >> and tells us whethe
On Wed, Aug 30, 2017 at 10:59:46AM +0100, Marc Zyngier wrote:
> On 28/08/17 19:17, Christoffer Dall wrote:
> > On Mon, Jul 31, 2017 at 06:26:31PM +0100, Marc Zyngier wrote:
> >> The redistributor needs to be told which vPE is about to be run,
> >> and tells us whethe
On Wed, Aug 30, 2017 at 12:31:41PM +0200, Andrew Jones wrote:
> On Mon, Aug 28, 2017 at 08:18:50PM +0200, Christoffer Dall wrote:
> > On Fri, Aug 04, 2017 at 08:44:04AM +0100, Marc Zyngier wrote:
> > > On 31/07/17 18:26, Marc Zyngier wrote:
> > > > When a vPE is
On Wed, Aug 30, 2017 at 12:31:41PM +0200, Andrew Jones wrote:
> On Mon, Aug 28, 2017 at 08:18:50PM +0200, Christoffer Dall wrote:
> > On Fri, Aug 04, 2017 at 08:44:04AM +0100, Marc Zyngier wrote:
> > > On 31/07/17 18:26, Marc Zyngier wrote:
> > > > When a vPE is
On Wed, Aug 30, 2017 at 11:28:08AM +0100, Marc Zyngier wrote:
> On 26/08/17 20:48, Christoffer Dall wrote:
> > On Mon, Jul 31, 2017 at 06:26:19PM +0100, Marc Zyngier wrote:
> >> Let's use the irq bypass mechanism introduced for platform device
> >> interrupts to intercep
On Wed, Aug 30, 2017 at 11:28:08AM +0100, Marc Zyngier wrote:
> On 26/08/17 20:48, Christoffer Dall wrote:
> > On Mon, Jul 31, 2017 at 06:26:19PM +0100, Marc Zyngier wrote:
> >> Let's use the irq bypass mechanism introduced for platform device
> >> interrupts to intercep
On Mon, Aug 21, 2017 at 10:35:23PM +0200, Radim Krčmář wrote:
> The index in kvm->vcpus array and vcpu->vcpu_id are very different
> things. Comparing struct kvm_vcpu pointers is a sure way to know.
>
> Signed-off-by: Radim Krčmář <rkrc...@redhat.com>
Acked-
On Mon, Aug 21, 2017 at 10:35:23PM +0200, Radim Krčmář wrote:
> The index in kvm->vcpus array and vcpu->vcpu_id are very different
> things. Comparing struct kvm_vcpu pointers is a sure way to know.
>
> Signed-off-by: Radim Krčmář
Acked-by: Christoffer Dall
> ---
>
On Mon, Aug 21, 2017 at 10:35:25PM +0200, Radim Krčmář wrote:
> No new VCPUs can be created because we are holding the kvm->lock.
> This means that if we successfuly lock all VCPUs, we'll be unlocking the
> same set and there is no need to do extra bookkeeping.
>
> Signed-off-by: Radim Krčmář
On Mon, Aug 21, 2017 at 10:35:25PM +0200, Radim Krčmář wrote:
> No new VCPUs can be created because we are holding the kvm->lock.
> This means that if we successfuly lock all VCPUs, we'll be unlocking the
> same set and there is no need to do extra bookkeeping.
>
> Signed-off-by: Radim Krčmář
>
On Mon, Aug 21, 2017 at 10:35:29PM +0200, Radim Krčmář wrote:
> Going through all VCPUs is more natural with a list and the RCU list can
> work as lockless with our constraints.
>
> This makes kvm->vcpus lose most users, so it will be easier to make
> something out of it.
>
> A nice side-effect
On Mon, Aug 21, 2017 at 10:35:29PM +0200, Radim Krčmář wrote:
> Going through all VCPUs is more natural with a list and the RCU list can
> work as lockless with our constraints.
>
> This makes kvm->vcpus lose most users, so it will be easier to make
> something out of it.
>
> A nice side-effect
On Wed, Aug 23, 2017 at 10:58:38AM +0200, Auger Eric wrote:
> Hi Christoffer,
>
> On 21/07/2017 15:13, Christoffer Dall wrote:
> > On Thu, Jun 15, 2017 at 02:52:38PM +0200, Eric Auger wrote:
> >> Implements kvm_vgic_[set|unset]_forwarding.
> >>
>
On Wed, Aug 23, 2017 at 10:58:38AM +0200, Auger Eric wrote:
> Hi Christoffer,
>
> On 21/07/2017 15:13, Christoffer Dall wrote:
> > On Thu, Jun 15, 2017 at 02:52:38PM +0200, Eric Auger wrote:
> >> Implements kvm_vgic_[set|unset]_forwarding.
> >>
>
On Tue, Aug 22, 2017 at 04:33:42PM +0200, Auger Eric wrote:
> Hi Christoffer,
>
> On 21/07/2017 14:11, Christoffer Dall wrote:
> > On Thu, Jun 15, 2017 at 02:52:37PM +0200, Eric Auger wrote:
> >> Currently, the line level of unmapped level sensitive SPIs is
> >>
On Tue, Aug 22, 2017 at 04:33:42PM +0200, Auger Eric wrote:
> Hi Christoffer,
>
> On 21/07/2017 14:11, Christoffer Dall wrote:
> > On Thu, Jun 15, 2017 at 02:52:37PM +0200, Eric Auger wrote:
> >> Currently, the line level of unmapped level sensitive SPIs is
> >>
On Mon, Jul 31, 2017 at 06:26:34PM +0100, Marc Zyngier wrote:
> The GICv4 architecture doesn't prevent CPUs implementing GICv4 to
> cohabit with CPUs limited to GICv3 in the same system.
>
> This is mad (the sheduler would have to be made aware of the v4
*scheduler
> capability), and we're
On Mon, Jul 31, 2017 at 06:26:34PM +0100, Marc Zyngier wrote:
> The GICv4 architecture doesn't prevent CPUs implementing GICv4 to
> cohabit with CPUs limited to GICv3 in the same system.
>
> This is mad (the sheduler would have to be made aware of the v4
*scheduler
> capability), and we're
arc.zyng...@arm.com>
So I'm wondering if we should have a per-VM option to turn this on or
off, which may be useful for debugging and profiling.
On the other hand, I can't see x86 having this feature, so maybe it's
not worth it.
For this patch:
Acked-by: Christoffer Dall <cd...@linaro.org>
ndering if we should have a per-VM option to turn this on or
off, which may be useful for debugging and profiling.
On the other hand, I can't see x86 having this feature, so maybe it's
not worth it.
For this patch:
Acked-by: Christoffer Dall
> ---
> Documentation/admin-guide/kernel-param
terrupt
> using the normal userspace API...
>
> Signed-off-by: Marc Zyngier <marc.zyng...@arm.com>
Acked-by: Christoffer Dall <cd...@linaro.org>
> ---
> virt/kvm/arm/vgic/vgic-its.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/virt/kvm/arm/vgi
terrupt
> using the normal userspace API...
>
> Signed-off-by: Marc Zyngier
Acked-by: Christoffer Dall
> ---
> virt/kvm/arm/vgic/vgic-its.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
&g
..@arm.com>
Acked-by: Christoffer Dall <cd...@linaro.org>
> ---
> virt/kvm/arm/vgic/vgic-its.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
> index aaad577ce328..2c065c970ba0 100644
> --- a/virt/kvm/ar
On Mon, Jul 31, 2017 at 06:26:23PM +0100, Marc Zyngier wrote:
> Handling CLEAR is pretty easy. Just ask the ITS driver to clear
> the corresponding pending bit (which will turn into a CLEAR
> command on the physical side).
>
> Signed-off-by: Marc Zyngier
Acked-by: C
* injected. Same thing if GICv4 is used, as VLPI
> + * delivery is gated by ICH_HCR_EL2.En.
>*/
> - if (static_branch_unlikely(_v3_cpuif_trap))
> + if (static_branch_unlikely(_v3_cpuif_trap) ||
> + cpu_if->its_vpe.its_vm)
> write_gicreg(cpu_if->vgic_hcr, ICH_HCR_EL2);
> }
>
> --
> 2.11.0
>
Acked-by: Christoffer Dall <cd...@linaro.org>
* delivery is gated by ICH_HCR_EL2.En.
>*/
> - if (static_branch_unlikely(_v3_cpuif_trap))
> + if (static_branch_unlikely(_v3_cpuif_trap) ||
> + cpu_if->its_vpe.its_vm)
> write_gicreg(cpu_if->vgic_hcr, ICH_HCR_EL2);
> }
>
> --
> 2.11.0
>
Acked-by: Christoffer Dall
On Mon, Jul 31, 2017 at 06:26:25PM +0100, Marc Zyngier wrote:
> Upon updating a property, we propagate it all the way to the physical
> ITS, and ask for an INV command to be executed there.
>
> Signed-off-by: Marc Zyngier <marc.zyng...@arm.com>
Acked-by: Christoffer Dall
On Mon, Jul 31, 2017 at 06:26:25PM +0100, Marc Zyngier wrote:
> Upon updating a property, we propagate it all the way to the physical
> ITS, and ask for an INV command to be executed there.
>
> Signed-off-by: Marc Zyngier
Acked-by: Christoffer Dall
> ---
> virt/kvm/arm/v
kvm *kvm, struct vgic_its *its,
>u32 devid, u32 eventid, struct vgic_irq **irq);
> struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi);
> +int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
> + struct kvm_vcpu *filter_vcpu, bool needs_inv);
>
> bool vgic_is_v4_capable(struct kvm *kvm);
> int vgic_v4_init(struct kvm *kvm);
> --
> 2.11.0
>
Acked-by: Christoffer Dall <cd...@linaro.org>
s *its,
>u32 devid, u32 eventid, struct vgic_irq **irq);
> struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi);
> +int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
> + struct kvm_vcpu *filter_vcpu, bool needs_inv);
>
> bool vgic_is_v4_capable(struct kvm *kvm);
> int vgic_v4_init(struct kvm *kvm);
> --
> 2.11.0
>
Acked-by: Christoffer Dall
rq)
> + enable_irq(irq);
> + }
> +}
> +
> +void kvm_vgic_v4_disable_doorbell(struct kvm_vcpu *vcpu)
> +{
> + if (vgic_is_v4_capable(vcpu->kvm)) {
> + int irq = vcpu->arch.vgic_cpu.vgic_v3.its_vpe.irq;
> + if (irq)
> + disable_irq(irq);
> + }
> +}
> --
> 2.11.0
>
Reviewed-by: Christoffer Dall <cd...@linaro.org>
enable_irq(irq);
> + }
> +}
> +
> +void kvm_vgic_v4_disable_doorbell(struct kvm_vcpu *vcpu)
> +{
> + if (vgic_is_v4_capable(vcpu->kvm)) {
> + int irq = vcpu->arch.vgic_cpu.vgic_v3.its_vpe.irq;
> + if (irq)
> + disable_irq(irq);
> + }
> +}
> --
> 2.11.0
>
Reviewed-by: Christoffer Dall
On Mon, Jul 31, 2017 at 06:26:29PM +0100, Marc Zyngier wrote:
> When a vPE is not running, a VLPI being made pending results in a
> doorbell interrupt being delivered. Let's handle this interrupt
> and update the pending_last flag that indicates that VLPIs are
> pending. The corresponding vcpu is
On Mon, Jul 31, 2017 at 06:26:29PM +0100, Marc Zyngier wrote:
> When a vPE is not running, a VLPI being made pending results in a
> doorbell interrupt being delivered. Let's handle this interrupt
> and update the pending_last flag that indicates that VLPIs are
> pending. The corresponding vcpu is
On Fri, Aug 04, 2017 at 08:44:04AM +0100, Marc Zyngier wrote:
> On 31/07/17 18:26, Marc Zyngier wrote:
> > When a vPE is not running, a VLPI being made pending results in a
> > doorbell interrupt being delivered. Let's handle this interrupt
> > and update the pending_last flag that indicates that
On Fri, Aug 04, 2017 at 08:44:04AM +0100, Marc Zyngier wrote:
> On 31/07/17 18:26, Marc Zyngier wrote:
> > When a vPE is not running, a VLPI being made pending results in a
> > doorbell interrupt being delivered. Let's handle this interrupt
> > and update the pending_last flag that indicates that
y: Marc Zyngier <marc.zyng...@arm.com>
Acked-by: Christoffer Dall <cd...@linaro.org>
> ---
> virt/kvm/arm/vgic/vgic-its.c | 15 +--
> 1 file changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
y: Marc Zyngier
Acked-by: Christoffer Dall
> ---
> virt/kvm/arm/vgic/vgic-its.c | 15 +--
> 1 file changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
> index 9e46081e5f15..b395df1bf47c 100644
> --- a/
return false;
>
> + if (vcpu->arch.vgic_cpu.vgic_v3.its_vpe.pending_last)
> + return true;
> +
> spin_lock(_cpu->ap_list_lock);
>
> list_for_each_entry(irq, _cpu->ap_list_head, ap_list) {
> --
> 2.11.0
>
Acked-by: Christoffer Dall <cd...@linaro.org>
;
>
> + if (vcpu->arch.vgic_cpu.vgic_v3.its_vpe.pending_last)
> + return true;
> +
> spin_lock(_cpu->ap_list_lock);
>
> list_for_each_entry(irq, _cpu->ap_list_head, ap_list) {
> --
> 2.11.0
>
Acked-by: Christoffer Dall
On Mon, Jul 31, 2017 at 06:26:24PM +0100, Marc Zyngier wrote:
> The current implementation of MOVALL doesn't allow us to call
> into the core ITS code as we hold a number of spinlocks.
>
> Let's try a method used in other parts of the code, were we copy
> the intids of the candicate interrupts,
On Mon, Jul 31, 2017 at 06:26:24PM +0100, Marc Zyngier wrote:
> The current implementation of MOVALL doesn't allow us to call
> into the core ITS code as we hold a number of spinlocks.
>
> Let's try a method used in other parts of the code, were we copy
> the intids of the candicate interrupts,
On Mon, Jul 31, 2017 at 06:26:22PM +0100, Marc Zyngier wrote:
> When the guest issues a MOVI, we need to tell the physical ITS
> that we're now targetting a new vcpu. This is done by extracting
> the current mapping, updating the target, and reapplying the
> mapping. The core ITS code should do
On Mon, Jul 31, 2017 at 06:26:22PM +0100, Marc Zyngier wrote:
> When the guest issues a MOVI, we need to tell the physical ITS
> that we're now targetting a new vcpu. This is done by extracting
> the current mapping, updating the target, and reapplying the
> mapping. The core ITS code should do
On Mon, Jul 31, 2017 at 06:26:35PM +0100, Marc Zyngier wrote:
> Yet another braindump so I can free some cells...
>
> Signed-off-by: Marc Zyngier
> ---
> virt/kvm/arm/vgic/vgic-v4.c | 68
> +
> 1 file changed, 68 insertions(+)
>
On Mon, Jul 31, 2017 at 06:26:35PM +0100, Marc Zyngier wrote:
> Yet another braindump so I can free some cells...
>
> Signed-off-by: Marc Zyngier
> ---
> virt/kvm/arm/vgic/vgic-v4.c | 68
> +
> 1 file changed, 68 insertions(+)
>
> diff --git
its_unmap_vlpi(ite->irq->host_irq);
nit: should we raise a warning on a bad return value?
Otherwise:
Acked-by: Christoffer Dall <cd...@linaro.org>
> +
> vgic_put_irq(kvm, ite->irq);
> + }
>
> kfree(ite);
> }
> --
> 2.11.0
>
irq->host_irq);
nit: should we raise a warning on a bad return value?
Otherwise:
Acked-by: Christoffer Dall
> +
> vgic_put_irq(kvm, ite->irq);
> + }
>
> kfree(ite);
> }
> --
> 2.11.0
>
On Mon, Jul 31, 2017 at 06:26:31PM +0100, Marc Zyngier wrote:
> The redistributor needs to be told which vPE is about to be run,
> and tells us whether there is any pending VLPI on exit.
>
> Let's add the scheduling calls to the vgic flush/sync functions,
> allowing the VLPIs to be delivered to
On Mon, Jul 31, 2017 at 06:26:31PM +0100, Marc Zyngier wrote:
> The redistributor needs to be told which vPE is about to be run,
> and tells us whether there is any pending VLPI on exit.
>
> Let's add the scheduling calls to the vgic flush/sync functions,
> allowing the VLPIs to be delivered to
fdefs, let's just select the whole
> of the GICv3 suport code.
>
> You know you want it.
Acked-by: Christoffer Dall <cd...@linaro.org>
>
> Signed-off-by: Marc Zyngier <marc.zyng...@arm.com>
> ---
> arch/arm/kvm/Kconfig | 2 ++
> 1 file changed, 2 insertions(+)
fdefs, let's just select the whole
> of the GICv3 suport code.
>
> You know you want it.
Acked-by: Christoffer Dall
>
> Signed-off-by: Marc Zyngier
> ---
> arch/arm/kvm/Kconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/kvm/Kconfig b
On Mon, Jul 31, 2017 at 06:26:17PM +0100, Marc Zyngier wrote:
> Add a new has_gicv4 field in the global VGIC state that indicates
> whether the HW is GICv4 capable, as a per-VM predicate indicating
> if there is a possibility for a VM to support direct injection
> (the above being true and the VM
On Mon, Jul 31, 2017 at 06:26:17PM +0100, Marc Zyngier wrote:
> Add a new has_gicv4 field in the global VGIC state that indicates
> whether the HW is GICv4 capable, as a per-VM predicate indicating
> if there is a possibility for a VM to support direct injection
> (the above being true and the VM
On Mon, Jul 31, 2017 at 06:26:19PM +0100, Marc Zyngier wrote:
> Let's use the irq bypass mechanism introduced for platform device
> interrupts to intercept the virtual PCIe endpoint configuration
> and establish our LPI->VLPI mapping.
>
> Signed-off-by: Marc Zyngier
> ---
>
On Mon, Jul 31, 2017 at 06:26:19PM +0100, Marc Zyngier wrote:
> Let's use the irq bypass mechanism introduced for platform device
> interrupts to intercept the virtual PCIe endpoint configuration
> and establish our LPI->VLPI mapping.
>
> Signed-off-by: Marc Zyngier
> ---
>
er_msi(kvm, its, msi->devid, msi->data);
> + mutex_unlock(>its_lock);
>
> if (ret < 0)
> return ret;
> diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
> index da254ae29aec..3002b72d938b 100644
> --- a/virt/kvm/arm/vgic/vgic.h
> +++ b/virt/kvm/arm/vgic/vgic.h
> @@ -225,4 +225,8 @@ int vgic_debug_destroy(struct kvm *kvm);
> bool lock_all_vcpus(struct kvm *kvm);
> void unlock_all_vcpus(struct kvm *kvm);
>
> +int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
> + u32 devid, u32 eventid, struct vgic_irq **irq);
> +struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi);
> +
> #endif
> --
> 2.11.0
>
Reviewed-by: Christoffer Dall <cd...@linaro.org>
On Mon, Jul 31, 2017 at 06:26:18PM +0100, Marc Zyngier wrote:
> In order to control the GICv4 view of virtual CPUs, we rely
> on an irqdomain allocated for that purpose. Let's add a couple
> of helpers to that effect.
>
> At the same time, the vgic data structures gain new fields to
> track all
vid, msi->data);
> + mutex_unlock(>its_lock);
>
> if (ret < 0)
> return ret;
> diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
> index da254ae29aec..3002b72d938b 100644
> --- a/virt/kvm/arm/vgic/vgic.h
> +++ b/virt/kvm/arm/vgic/vgic.h
> @@ -225,4 +225,8 @@ int vgic_debug_destroy(struct kvm *kvm);
> bool lock_all_vcpus(struct kvm *kvm);
> void unlock_all_vcpus(struct kvm *kvm);
>
> +int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
> + u32 devid, u32 eventid, struct vgic_irq **irq);
> +struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi);
> +
> #endif
> --
> 2.11.0
>
Reviewed-by: Christoffer Dall
On Mon, Jul 31, 2017 at 06:26:18PM +0100, Marc Zyngier wrote:
> In order to control the GICv4 view of virtual CPUs, we rely
> on an irqdomain allocated for that purpose. Let's add a couple
> of helpers to that effect.
>
> At the same time, the vgic data structures gain new fields to
> track all
s the beginning of kvm_arch_destroy_vm,
> which seems more sensible.
>
Acked-by: Christoffer Dall <cd...@linaro.org>
> Signed-off-by: Marc Zyngier <marc.zyng...@arm.com>
> ---
> virt/kvm/arm/arm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> d
s the beginning of kvm_arch_destroy_vm,
> which seems more sensible.
>
Acked-by: Christoffer Dall
> Signed-off-by: Marc Zyngier
> ---
> virt/kvm/arm/arm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c
&g
On Fri, Aug 25, 2017 at 10:11 AM, Marc Zyngier wrote:
> Hi Stephen,
>
> On Fri, Aug 25 2017 at 2:57:21 pm BST, Stephen Rothwell
> wrote:
>> Hi all,
>>
>> Today's linux-next merge of the kvm-arm tree got a conflict in:
>>
>>
On Fri, Aug 25, 2017 at 10:11 AM, Marc Zyngier wrote:
> Hi Stephen,
>
> On Fri, Aug 25 2017 at 2:57:21 pm BST, Stephen Rothwell
> wrote:
>> Hi all,
>>
>> Today's linux-next merge of the kvm-arm tree got a conflict in:
>>
>> arch/arm64/include/asm/esr.h
>>
>> between commit:
>>
>>
On Wed, Aug 23, 2017 at 12:25:36PM +0530, Arvind Yadav wrote:
> vgic_debug_seq_ops and file_operations are not supposed to change
> at runtime and none of the structures is modified.
>
> Signed-off-by: Arvind Yadav
Applied, thanks.
-Christoffer
> ---
>
On Wed, Aug 23, 2017 at 12:25:36PM +0530, Arvind Yadav wrote:
> vgic_debug_seq_ops and file_operations are not supposed to change
> at runtime and none of the structures is modified.
>
> Signed-off-by: Arvind Yadav
Applied, thanks.
-Christoffer
> ---
> virt/kvm/arm/vgic/vgic-debug.c | 4 ++--
On Tue, Aug 22, 2017 at 04:35:26PM +0200, Auger Eric wrote:
> Hi,
>
> On 25/07/2017 17:41, Marc Zyngier wrote:
> > On 25/07/17 15:48, Christoffer Dall wrote:
> >> On Tue, Jul 25, 2017 at 02:47:55PM +0100, Marc Zyngier wrote:
> >>> On 21/07/17 14:03, Christoff
On Tue, Aug 22, 2017 at 04:35:26PM +0200, Auger Eric wrote:
> Hi,
>
> On 25/07/2017 17:41, Marc Zyngier wrote:
> > On 25/07/17 15:48, Christoffer Dall wrote:
> >> On Tue, Jul 25, 2017 at 02:47:55PM +0100, Marc Zyngier wrote:
> >>> On 21/07/17 14:03, Christoff
On Fri, Aug 18, 2017 at 10:11:54PM +0800, Dongjiu Geng wrote:
You should put KVM and arm64 in the subject here.
> In armv8.2 RAS extension, it adds virtual SError exception
> syndrome registeri(VSESR_EL2), user space will specify that
> value. so user space will check whether CPU feature has RAS
On Fri, Aug 18, 2017 at 10:11:54PM +0800, Dongjiu Geng wrote:
You should put KVM and arm64 in the subject here.
> In armv8.2 RAS extension, it adds virtual SError exception
> syndrome registeri(VSESR_EL2), user space will specify that
> value. so user space will check whether CPU feature has RAS
On Tue, Aug 8, 2017 at 1:25 PM, David Hildenbrand wrote:
> On 08.08.2017 06:05, Longpeng(Mike) wrote:
>> This is a simple optimization for kvm_vcpu_on_spin, the
>> main idea is described in patch-1's commit msg.
>>
>> I did some tests base on the RFC version, the result shows
>>
On Tue, Aug 8, 2017 at 1:25 PM, David Hildenbrand wrote:
> On 08.08.2017 06:05, Longpeng(Mike) wrote:
>> This is a simple optimization for kvm_vcpu_on_spin, the
>> main idea is described in patch-1's commit msg.
>>
>> I did some tests base on the RFC version, the result shows
>> that it can
On Tue, Aug 8, 2017 at 9:39 AM, Christoffer Dall <cd...@linaro.org> wrote:
> On Tue, Aug 08, 2017 at 12:05:35PM +0800, Longpeng(Mike) wrote:
>> This implements the kvm_arch_vcpu_in_kernel() for ARM.
>>
>> Signed-off-by: Longpeng(Mike) <longpe...@huawei.com>
On Tue, Aug 8, 2017 at 9:39 AM, Christoffer Dall wrote:
> On Tue, Aug 08, 2017 at 12:05:35PM +0800, Longpeng(Mike) wrote:
>> This implements the kvm_arch_vcpu_in_kernel() for ARM.
>>
>> Signed-off-by: Longpeng(Mike)
>> ---
>> virt/kvm/arm/arm.c | 2 +-
>
- return false;
> + return vcpu_mode_priv(vcpu);
> }
>
> /* Just ensure a guest exit from a particular CPU */
> --
> 1.8.3.1
>
>
I'm not taking any position on whether this series makes sense overall
or not (it's a bit concerning to do this without having meas
return vcpu_mode_priv(vcpu);
> }
>
> /* Just ensure a guest exit from a particular CPU */
> --
> 1.8.3.1
>
>
I'm not taking any position on whether this series makes sense overall
or not (it's a bit concerning to do this without having measured a
benefit), but for the arm/arm64 change:
Acked-by: Christoffer Dall
Hi Shanker,
On Mon, Aug 07, 2017 at 02:03:28PM -0500, Shanker Donthineni wrote:
> The SMC/HVC instructions with an immediate value non-zero are not compliant
> according to 'SMC calling convention system software document'. Add a
> validation check in handle_hvc() to avoid malicious HVC calls
Hi Shanker,
On Mon, Aug 07, 2017 at 02:03:28PM -0500, Shanker Donthineni wrote:
> The SMC/HVC instructions with an immediate value non-zero are not compliant
> according to 'SMC calling convention system software document'. Add a
> validation check in handle_hvc() to avoid malicious HVC calls
On Tue, Aug 01, 2017 at 03:26:07PM +0100, Mark Rutland wrote:
> On Tue, Aug 01, 2017 at 01:00:14PM +0200, Christoffer Dall wrote:
> > On Wed, Jul 19, 2017 at 05:01:31PM +0100, Mark Rutland wrote:
> > > When pointer authentication is supported, a guest may wish to use it.
>
On Tue, Aug 01, 2017 at 03:26:07PM +0100, Mark Rutland wrote:
> On Tue, Aug 01, 2017 at 01:00:14PM +0200, Christoffer Dall wrote:
> > On Wed, Jul 19, 2017 at 05:01:31PM +0100, Mark Rutland wrote:
> > > When pointer authentication is supported, a guest may wish to use it.
>
On Tue, Aug 01, 2017 at 10:07:40AM -0400, Jintack Lim wrote:
> On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall <cd...@linaro.org> wrote:
> > On Tue, Jul 18, 2017 at 11:58:30AM -0500, Jintack Lim wrote:
> >> Nested virtualizaion is in use only if all
On Tue, Aug 01, 2017 at 10:07:40AM -0400, Jintack Lim wrote:
> On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall wrote:
> > On Tue, Jul 18, 2017 at 11:58:30AM -0500, Jintack Lim wrote:
> >> Nested virtualizaion is in use only if all three conditions are met:
> >>
On Tue, Aug 01, 2017 at 07:03:35AM -0400, Jintack Lim wrote:
> Hi Christoffer,
>
> On Mon, Jul 31, 2017 at 8:59 AM, Christoffer Dall <cd...@linaro.org> wrote:
> > On Tue, Jul 18, 2017 at 11:59:04AM -0500, Jintack Lim wrote:
> >> Forward CPACR_EL1 traps to the v
On Tue, Aug 01, 2017 at 07:03:35AM -0400, Jintack Lim wrote:
> Hi Christoffer,
>
> On Mon, Jul 31, 2017 at 8:59 AM, Christoffer Dall wrote:
> > On Tue, Jul 18, 2017 at 11:59:04AM -0500, Jintack Lim wrote:
> >> Forward CPACR_EL1 traps to the virtual EL2 if virtual CPT
ode.
>
> For the hyp TLB maintenance code, __tlb_switch_to_host_vhe() is updated
> to toggle the TGE bit with a RMW sequence, as we already do in
> __tlb_switch_to_guest_vhe().
>
> The now unused HCR_HOST_VHE_FLAGS definition is removed.
>
> Signed-off-by: Mark Rutland <mark.rutl.
ode.
>
> For the hyp TLB maintenance code, __tlb_switch_to_host_vhe() is updated
> to toggle the TGE bit with a RMW sequence, as we already do in
> __tlb_switch_to_guest_vhe().
>
> The now unused HCR_HOST_VHE_FLAGS definition is removed.
>
> Signed-off-by: Mark Rutland
> Cc: Chr
of this as
well.
>
> Signed-off-by: Mark Rutland <mark.rutl...@arm.com>
> Cc: Christoffer Dall <christoffer.d...@linaro.org>
> Cc: Marc Zyngier <marc.zyng...@arm.com>
> Cc: kvm...@lists.cs.columbia.edu
> ---
> arch/arm64/include/asm/kvm_host.h | 23 +++
of this as
well.
>
> Signed-off-by: Mark Rutland
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> Cc: kvm...@lists.cs.columbia.edu
> ---
> arch/arm64/include/asm/kvm_host.h | 23 +-
> arch/arm64/include/asm/kvm_hyp.h | 7 +++
> arch/arm64/kvm/handle_exit.c | 21 ++
On Sat, Jul 29, 2017 at 02:22:57PM +0800, Longpeng(Mike) wrote:
> We had disscuss the idea here:
> https://www.spinics.net/lists/kvm/msg140593.html
This is not a very nice way to start a commit description.
Please provide the necessary background to understand your change
directly in the commit
On Sat, Jul 29, 2017 at 02:22:57PM +0800, Longpeng(Mike) wrote:
> We had disscuss the idea here:
> https://www.spinics.net/lists/kvm/msg140593.html
This is not a very nice way to start a commit description.
Please provide the necessary background to understand your change
directly in the commit
ages and comments from the perspective of supporting
> execution environments to VMs, rather than from the perspective of the guest
> hypervisor running in them.
> - Fixed a few bugs to make it run on the FastModel.
> - Tested on ARMv8.3 with four configurations. (host/guest.
ages and comments from the perspective of supporting
> execution environments to VMs, rather than from the perspective of the guest
> hypervisor running in them.
> - Fixed a few bugs to make it run on the FastModel.
> - Tested on ARMv8.3 with four configurations. (host/guest.
On Tue, Jul 18, 2017 at 11:59:04AM -0500, Jintack Lim wrote:
> Forward CPACR_EL1 traps to the virtual EL2 if virtual CPTR_EL2 is
> configured to trap CPACR_EL1 accesses from EL1.
>
> This is for recursive nested virtualization.
>
> Signed-off-by: Jintack Lim
> ---
>
On Tue, Jul 18, 2017 at 11:59:04AM -0500, Jintack Lim wrote:
> Forward CPACR_EL1 traps to the virtual EL2 if virtual CPTR_EL2 is
> configured to trap CPACR_EL1 accesses from EL1.
>
> This is for recursive nested virtualization.
>
> Signed-off-by: Jintack Lim
> ---
> arch/arm64/kvm/sys_regs.c |
On Tue, Jul 18, 2017 at 11:59:03AM -0500, Jintack Lim wrote:
> Forward ELR_EL1, SPSR_EL1 and VBAR_EL1 traps to the virtual EL2 if the
> virtual HCR_EL2.NV bit is set.
>
> This is for recursive nested virtualization.
>
> Signed-off-by: Jintack Lim
> ---
>
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