Add SAMA7G5 SHDWC.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 24d5fd06d487..d6cfe7c4bb00 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -794,6 +794,7
From: Eugen Hristev
Introduce new family of SoCs, sama7, and first SoC, sama7g5.
Signed-off-by: Eugen Hristev
[claudiu.bez...@microchip.com: keep only the sama7_dt]
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/sama7.c | 32
Add support for SAMA7G5 power management modes: standby, ulp0, ulp1, backup.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/generic.h | 2 ++
arch/arm/mach-at91/pm.c | 37
arch/arm/mach-at91/sama7.c | 1 +
3 files changed, 40 insertions
Adapt at91_pm_backup_init() to work for SAMA7G5. Also, set the LPM pin
to shutdown controller. This will signal to PMIC that it needs to switch
to the state corresponding to backup mode.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 3 ++-
arch/arm/mach-at91/pm_suspend.S
Add SAMA7G5 DDR controller to the list of DDR controller compatibles.
At the moment there is no standby support. Adapt the code for this.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-at91
by bootloader in DDR PHY reconfiguration
process. Also, in the process or recalibration the first 8 words of
the memory may get corrupted. To solve this, these 8 words are saved
in the securam and restored by bootloader in the process of PHY
configuration.
Signed-off-by: Claudiu Beznea
---
arch
SAMA7G5 self-refresh procedure accesses also the DDR PHY registers.
Adapt the code so that the at91_dt_ramc() to look also for DDR PHYs,
in case it is mandatory.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 27 +--
1 file changed, 21 insertions(+), 6
Add SAMA7G5's PMC to compatible list.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index fcb20272d65d..f4e66a7c7d18 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach
Add RAM controller and RAM PHY controller DT bindings.
Signed-off-by: Claudiu Beznea
---
.../devicetree/bindings/arm/atmel-sysregs.txt | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
b/Documentation
Wait for DDR power mode off before shutting down the core.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index 9c9e08fd8300..7396e18dd7e5 100644
Add support to disable/enable 2.5V LDO regulator when entering/exiting
any ULP mode.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.h | 1 +
arch/arm/mach-at91/pm_suspend.S | 29 +
2 files changed, 30 insertions(+)
diff --git a/arch/arm/mach-at91
Add self-refresh support for SAMA7G5.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.h | 2 +
arch/arm/mach-at91/pm_data-offsets.c | 2 +
arch/arm/mach-at91/pm_suspend.S | 199 +++
3 files changed, 203 insertions(+)
diff --git a/arch/arm
Add registers and bits definitions for SAMA7G5's UDDRC and DDR3PHY.
Signed-off-by: Claudiu Beznea
---
include/soc/at91/sama7-ddr.h | 80
1 file changed, 80 insertions(+)
create mode 100644 include/soc/at91/sama7-ddr.h
diff --git a/include/soc/at91/sama7
Add support for MCK1..4 save restore for ULP modes.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 126
1 file changed, 126 insertions(+)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index 84418120ba67
Add SFRBU registers definitions for SAMA7G5.
Signed-off-by: Claudiu Beznea
---
include/soc/at91/sama7-sfrbu.h | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 include/soc/at91/sama7-sfrbu.h
diff --git a/include/soc/at91/sama7-sfrbu.h b/include/soc
SAMA7G5 has 5 master clocks 0..4. MCK0 is controlled differently than
MCK 1..4. MCK 1..4 should also be saved/restored in the last phase of
suspend/resume. Thus, adapt wait_mckrdy to support also MCK1..4.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 48
Replace CONFIG_SOC_SAM9X60 with CONFIG_HAVE_AT91_SAM9X60_PLL as the
SAM9X60's PLL is also present on SAMA7G5.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach
adding self-refresh and PM support for SAMA7G5.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 397 +---
1 file changed, 205 insertions(+), 192 deletions(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index
Use r7 instead of tmp1 in macros. This prepares the filed for
next commits.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
Move the setup of soc_pm.bu->suspended in platform_suspend::begin
function so that the PMC code in charge with clocks suspend/resume
to differentiate b/w standard PM mode and backup mode.
Signed-off-by: Claudiu Beznea
Reviewed-by: Alexandre Belloni
---
arch/arm/mach-at91/pm.c |
There is no need to initialize pdev.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 5a6ce1d88971..65e13769cf50 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch
is adapted for this. This patch prepares
the field for next commits.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 143 +---
1 file changed, 91 insertions(+), 52 deletions(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index
Document at91_soc_pm structure.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 3742a1fb76db..3029351ec78e 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91
Move pm_bu to soc_pm data structure.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 34 +-
1 file changed, 21 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 90dcdfe3b3d0..e13ceef7ac9a 100644
Hi,
This series adds PM support for SAMA7G5. The standby, ulp0, ulp1, and
backup modes are supported.
Thank you,
Claudiu Beznea
Changes in v3:
- drop: status = "okay" in patch 16/24
Changes in v2:
- keep only the generic sama7_dt in patch 22/24 and adapt patch 23/24
- collected tag
creeners or not.
Fixes: a14d273ba159 ("net: macb: restore cmp registers on resume path")
Signed-off-by: Claudiu Beznea
---
drivers/net/ethernet/cadence/macb_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/e
Add SAMA7G5 SHDWC.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 24d5fd06d487..d6cfe7c4bb00 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -794,6 +794,7
From: Eugen Hristev
Introduce new family of SoCs, sama7, and first SoC, sama7g5.
Signed-off-by: Eugen Hristev
[claudiu.bez...@microchip.com: keep only the sama7_dt]
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/sama7.c | 32
Add support for SAMA7G5 power management modes: standby, ulp0, ulp1, backup.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/generic.h | 2 ++
arch/arm/mach-at91/pm.c | 37
arch/arm/mach-at91/sama7.c | 1 +
3 files changed, 40 insertions
Add SAMA7G5's PMC to compatible list.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index fcb20272d65d..f4e66a7c7d18 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach
Adapt at91_pm_backup_init() to work for SAMA7G5. Also, set the LPM pin
to shutdown controller. This will signal to PMIC that it needs to switch
to the state corresponding to backup mode.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 3 ++-
arch/arm/mach-at91/pm_suspend.S
by bootloader in DDR PHY reconfiguration
process. Also, in the process or recalibration the first 8 words of
the memory may get corrupted. To solve this, these 8 words are saved
in the securam and restored by bootloader in the process of PHY
configuration.
Signed-off-by: Claudiu Beznea
---
arch
SAMA7G5 self-refresh procedure accesses also the DDR PHY registers.
Adapt the code so that the at91_dt_ramc() to look also for DDR PHYs,
in case it is mandatory.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 27 +--
1 file changed, 21 insertions(+), 6
Add SAMA7G5 DDR controller to the list of DDR controller compatibles.
At the moment there is no standby support. Adapt the code for this.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-at91
Add RAM controller and RAM PHY controller DT bindings.
Signed-off-by: Claudiu Beznea
---
.../devicetree/bindings/arm/atmel-sysregs.txt | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
b/Documentation
Wait for DDR power mode off before shutting down the core.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index 9c9e08fd8300..7396e18dd7e5 100644
Add support to disable/enable 2.5V LDO regulator when entering/exiting
any ULP mode.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.h | 1 +
arch/arm/mach-at91/pm_suspend.S | 29 +
2 files changed, 30 insertions(+)
diff --git a/arch/arm/mach-at91
Add support for MCK1..4 save restore for ULP modes.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 126
1 file changed, 126 insertions(+)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index 84418120ba67
Add self-refresh support for SAMA7G5.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.h | 2 +
arch/arm/mach-at91/pm_data-offsets.c | 2 +
arch/arm/mach-at91/pm_suspend.S | 199 +++
3 files changed, 203 insertions(+)
diff --git a/arch/arm
Add registers and bits definitions for SAMA7G5's UDDRC and DDR3PHY.
Signed-off-by: Claudiu Beznea
---
include/soc/at91/sama7-ddr.h | 80
1 file changed, 80 insertions(+)
create mode 100644 include/soc/at91/sama7-ddr.h
diff --git a/include/soc/at91/sama7
Replace CONFIG_SOC_SAM9X60 with CONFIG_HAVE_AT91_SAM9X60_PLL as the
SAM9X60's PLL is also present on SAMA7G5.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach
SAMA7G5 has 5 master clocks 0..4. MCK0 is controlled differently than
MCK 1..4. MCK 1..4 should also be saved/restored in the last phase of
suspend/resume. Thus, adapt wait_mckrdy to support also MCK1..4.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 48
Add SFRBU registers definitions for SAMA7G5.
Signed-off-by: Claudiu Beznea
---
include/soc/at91/sama7-sfrbu.h | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 include/soc/at91/sama7-sfrbu.h
diff --git a/include/soc/at91/sama7-sfrbu.h b/include/soc
adding self-refresh and PM support for SAMA7G5.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 397 +---
1 file changed, 205 insertions(+), 192 deletions(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index
Use r7 instead of tmp1 in macros. This prepares the filed for
next commits.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
There is no need to initialize pdev.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 5a6ce1d88971..65e13769cf50 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch
is adapted for this. This patch prepares
the field for next commits.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 143 +---
1 file changed, 91 insertions(+), 52 deletions(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index
Document at91_soc_pm structure.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 3742a1fb76db..3029351ec78e 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91
Move the setup of soc_pm.bu->suspended in platform_suspend::begin
function so that the PMC code in charge with clocks suspend/resume
to differentiate b/w standard PM mode and backup mode.
Signed-off-by: Claudiu Beznea
Reviewed-by: Alexandre Belloni
---
arch/arm/mach-at91/pm.c |
Move pm_bu to soc_pm data structure.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 34 +-
1 file changed, 21 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 90dcdfe3b3d0..e13ceef7ac9a 100644
Hi,
This series adds PM support for SAMA7G5. The standby, ulp0, ulp1, and
backup modes are supported.
Thank you,
Claudiu Beznea
Changes in v2:
- keep only the generic sama7_dt in patch 22/24 and adapt patch 23/24
- collected tags
Claudiu Beznea (23):
ARM: at91: pm: move pm_bu to soc_pm data
Enable CONFIG_NO_HZ_IDLE and CONFIG_HIGH_RES_TIMERS=y to be used
in conjunction with PIT64B present on SAM9X60.
Signed-off-by: Claudiu Beznea
---
arch/arm/configs/at91_dt_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/at91_dt_defconfig
b/arch/arm/configs
c02e4", "atmel,24mac02e4"
compatible for the usage w/ 24AA025E{48, 64} type of EEPROMs and adapt
the driver to not do offset adjustments.
Signed-off-by: Claudiu Beznea
---
Hi Bartosz,
For the previously available compatibles the offset adjustment is done
(probably for compatibilit
Restore CMP screener registers on resume path.
Fixes: c1e85c6ce57ef ("net: macb: save/restore the remaining registers and
features")
Signed-off-by: Claudiu Beznea
---
drivers/net/ethernet/cadence/macb_main.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/ne
Use devm_of_iomap() to map resources. This will avoid the necessity to
track the mapped resources and free them on failure path or on remove.
Reported-by: kernel test robot
Reported-by: Dan Carpenter
Suggested-by: Nicolas Ferre
Signed-off-by: Claudiu Beznea
---
Changes in v2:
- use
Improve readability in clk_sama7g5_master_set() by using local
variables.
Suggested-by: Nicolas Ferre
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/clk-master.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk
Add SECURAM's peripheral clock.
Signed-off-by: Claudiu Beznea
Acked-by: Nicolas Ferre
---
drivers/clk/at91/sama7g5.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 9e1ec48c4474..9c87b50abbae 100644
--- a/drivers/clk/at91
not alter
the tcb_clksrc since the changes are related to clocks suspend/resume
procedure that will be executed at the user space request, thus long
ago after postcore_initcall().
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/pmc.c | 48 ++
1 file changed, 39
Add register definitions for SAMA7G5's master clock. These would be
also used by architecture specific power saving code. With this, update
also clk-master.c.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/clk-master.c | 50 ---
include/linux/clk/at91_pmc.h
the requests at [1].
Patch 6/6 clean up a bit the code in clk-master as suggested by Nicolas.
Thank you,
Claudiu Beznea
[1] https://lore.kernel.org/lkml/20210105104426.4tmgc2l3vyicwedd@vireshk-i7/
Changes in v2:
- addressed code review comments
- collected tags
Claudiu Beznea (6):
clk: at91: re-factor
r clock divider on
PRE_RATE_CHANGE and POST_RATE_CHANGE events to avoid master clock
divider over/under clocking and also to preserve its initial value
(200MHz).
[1]
https://lore.kernel.org/lkml/1609842147-8161-1-git-send-email-claudiu.bez...@microchip.com/
Signed-off-by: Claudiu Beznea
---
d
.save_context()/.resume_context() support to each clocks driver and call
this from PMC driver.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/clk-generated.c| 46 +--
drivers/clk/at91/clk-main.c | 66 ++
drivers/clk/at91/clk-master.c | 183
Add SAMA7G5's PMC to compatible list.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index fcb20272d65d..f4e66a7c7d18 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach
by bootloader in DDR PHY reconfiguration
process. Also, in the process or recalibration the first 8 words of
the memory may get corrupted. To solve this, these 8 words are saved
in the securam and restored by bootloader in the process of PHY
configuration.
Signed-off-by: Claudiu Beznea
---
arch
Add SAMA7G5 SHDWC.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 24d5fd06d487..d6cfe7c4bb00 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -794,6 +794,7
Add support for SAMA7G5 power management modes: standby, ulp0, ulp1, backup.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/generic.h | 2 ++
arch/arm/mach-at91/pm.c | 37
arch/arm/mach-at91/sama7.c | 1 +
3 files changed, 40 insertions
From: Eugen Hristev
Introduce new family of SoCs, sama7, and first SoC, sama7g5.
Signed-off-by: Eugen Hristev
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/sama7.c | 48 +
2 files changed, 49 insertions
Adapt at91_pm_backup_init() to work for SAMA7G5. Also, set the LPM pin
to shutdown controller. This will signal to PMIC that it needs to switch
to the state corresponding to backup mode.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 3 ++-
arch/arm/mach-at91/pm_suspend.S
SAMA7G5 self-refresh procedure accesses also the DDR PHY registers.
Adapt the code so that the at91_dt_ramc() to look also for DDR PHYs,
in case it is mandatory.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 27 +--
1 file changed, 21 insertions(+), 6
Add SAMA7G5 DDR controller to the list of DDR controller compatibles.
At the moment there is no standby support. Adapt the code for this.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-at91
Add support to disable/enable 2.5V LDO regulator when entering/exiting
any ULP mode.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.h | 1 +
arch/arm/mach-at91/pm_suspend.S | 29 +
2 files changed, 30 insertions(+)
diff --git a/arch/arm/mach-at91
Add RAM controller and RAM PHY controller DT bindings.
Signed-off-by: Claudiu Beznea
---
.../devicetree/bindings/arm/atmel-sysregs.txt | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
b/Documentation
Wait for DDR power mode off before shutting down the core.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index 9c9e08fd8300..7396e18dd7e5 100644
Move the setup of soc_pm.bu->suspended in platform_suspend::begin
function so that the PMC code in charge with clocks suspend/resume
to differentiate b/w standard PM mode and backup mode.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 15 ---
1 file changed,
There is no need to initialize pdev.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 5a6ce1d88971..65e13769cf50 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch
is adapted for this. This patch prepares
the field for next commits.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 143 +---
1 file changed, 91 insertions(+), 52 deletions(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index
Move pm_bu to soc_pm data structure.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 34 +-
1 file changed, 21 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 90dcdfe3b3d0..e13ceef7ac9a 100644
Document at91_soc_pm structure.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 3742a1fb76db..3029351ec78e 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91
Add support for MCK1..4 save restore for ULP modes.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 126
1 file changed, 126 insertions(+)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index 84418120ba67
Add SFRBU registers definitions for SAMA7G5.
Signed-off-by: Claudiu Beznea
---
include/soc/at91/sama7-sfrbu.h | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 include/soc/at91/sama7-sfrbu.h
diff --git a/include/soc/at91/sama7-sfrbu.h b/include/soc
Hi,
This series adds PM support for SAMA7G5. The standby, ulp0, ulp1, and
backup modes are supported.
Thank you,
Claudiu Beznea
Claudiu Beznea (23):
ARM: at91: pm: move pm_bu to soc_pm data structure
ARM: at91: pm: move the setup of soc_pm.bu->suspended
ARM: at91: pm: document at91_soc
Add self-refresh support for SAMA7G5.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.h | 2 +
arch/arm/mach-at91/pm_data-offsets.c | 2 +
arch/arm/mach-at91/pm_suspend.S | 199 +++
3 files changed, 203 insertions(+)
diff --git a/arch/arm
Use r7 instead of tmp1 in macros. This prepares the filed for
next commits.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
SAMA7G5 has 5 master clocks 0..4. MCK0 is controlled differently than
MCK 1..4. MCK 1..4 should also be saved/restored in the last phase of
suspend/resume. Thus, adapt wait_mckrdy to support also MCK1..4.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 48
adding self-refresh and PM support for SAMA7G5.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 397 +---
1 file changed, 205 insertions(+), 192 deletions(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index
Add registers and bits definitions for SAMA7G5's UDDRC and DDR3PHY.
Signed-off-by: Claudiu Beznea
---
include/soc/at91/sama7-ddr.h | 80
1 file changed, 80 insertions(+)
create mode 100644 include/soc/at91/sama7-ddr.h
diff --git a/include/soc/at91/sama7
Replace CONFIG_SOC_SAM9X60 with CONFIG_HAVE_AT91_SAM9X60_PLL as the
SAM9X60's PLL is also present on SAMA7G5.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach
r clock divider on
PRE_RATE_CHANGE and POST_RATE_CHANGE events to avoid master clock
divider over/under clocking and also to preserve its initial value
(200MHz).
[1]
https://lore.kernel.org/lkml/1609842147-8161-1-git-send-email-claudiu.bez...@microchip.com/
Signed-off-by: Claudiu Beznea
---
d
Add SECURAM's peripheral clock.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/sama7g5.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index a6e20b35960e..28e26fb90417 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk
Add register definitions for SAMA7G5's master clock. These would be
also used by architecture specific power saving code. With this, update
also clk-master.c.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/clk-master.c | 51 +--
include/linux/clk/at91_pmc.h
not alter
the tcb_clksrc since the changes are related to clocks suspend/resume
procedure that will be executed at the user space request, thus long
ago after postcore_initcall().
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/pmc.c | 48 ++
1 file changed, 39
.save_context()/.resume_context() support to each clocks driver and call
this from PMC driver.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/clk-generated.c| 45 +--
drivers/clk/at91/clk-main.c | 66 ++
drivers/clk/at91/clk-master.c | 183
the requests at [1].
Thank you,
Claudiu Beznea
[1] https://lore.kernel.org/lkml/20210105104426.4tmgc2l3vyicwedd@vireshk-i7/
Claudiu Beznea (5):
clk: at91: re-factor clocks suspend/resume
clk: at91: pmc: execute suspend/resume only for backup mode
clk: at91: sama7g5: add securam's peripheral clock
) +--+
-->| |->| |--->| |
pinY | PIO | EXT_IRQ1 | EIC | int 154 (for pinY) | GIC |
-->| |->| |--->| |
+--+ +--++--+
where PIO is the pin controller.
Thank you,
Claud
Add support for Microchip External Interrupt Controller.
Signed-off-by: Claudiu Beznea
---
MAINTAINERS| 6 +
drivers/irqchip/Kconfig| 7 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-mchp-eic.c | 350 +
4 files
Add DT bindings for Microchip External Interrupt Controller.
Signed-off-by: Claudiu Beznea
---
.../interrupt-controller/mchp,eic.yaml| 74 +++
1 file changed, 74 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/mchp,eic.yaml
diff
The following commit has been merged into the timers/core branch of tip:
Commit-ID: e85c1d21b16b278f50d191155bc674633270e9c6
Gitweb:
https://git.kernel.org/tip/e85c1d21b16b278f50d191155bc674633270e9c6
Author:Claudiu Beznea
AuthorDate:Tue, 19 Jan 2021 14:59:25 +02:00
Free resources on exit path (failure path of probe and remove).
Reported-by: kernel test robot
Reported-by: Dan Carpenter
Signed-off-by: Claudiu Beznea
---
drivers/power/reset/at91-reset.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers
Enable drivers for sam9x60/sam9x60-ek:
- shutdown controller
- CAN
- AT24 EEPROM (present on SAM9X60-EK)
- MCP23S08 (present on SAM9X60-EK)
- AES, TDES, SHA
And use "make savedefconfig".
Signed-off-by: Claudiu Beznea
---
arch/arm/configs/at91_dt_defconfig | 12 +++-
1 file
Hi,
This series adds support for slew rate on SAMA7G5. Along with this
patch 3/3 fixes some checkpatch.pl warnings.
Thank you,
Claudiu Beznea
Changes in v2:
- s/sr/slew_rate_support/g in patch 2/3
- collected tags
Claudiu Beznea (3):
dt-bindings: pinctrl: at91-pio4: add slew-rate
pinctrl
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