[PATCH v1 2/2] arm64: handle NOTIFY_SEI notification by the APEI driver

When kernel or KVM gets the NOTIFY_SEI notification, it firstly calls the APEI driver to handle this notification. Signed-off-by: Dongjiu Geng --- arch/arm64/kernel/traps.c | 15 +++ 1 file changed, 15 insertions(+) --- change since https://www.spinics.net/lists/kvm/msg168919.html

[PATCH v1 1/2] ACPI / APEI: Add SEI notification type support for ARMv8

ACPI 6.x adds support for NOTIFY_SEI as a GHES notification mechanism, so add new GHES notification handling functions. Expose API ghes_notify_sei() to arch code, arch code will call this API when it gets this NOTIFY_SEI. Signed-off-by: Dongjiu Geng --- Note: Firmware will follow the SError mask

[PATCH v12 3/4] ACPI / APEI: Add SEI notification type support for ARMv8

ACPI 6.x adds support for NOTIFY_SEI as a GHES notification mechanism, so add new GHES notification handling functions. Expose API ghes_notify_sei() to arch code, arch code will call this API when it gets this NOTIFY_SEI. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Note: Fi

[PATCH v12 3/4] ACPI / APEI: Add SEI notification type support for ARMv8

ACPI 6.x adds support for NOTIFY_SEI as a GHES notification mechanism, so add new GHES notification handling functions. Expose API ghes_notify_sei() to arch code, arch code will call this API when it gets this NOTIFY_SEI. Signed-off-by: Dongjiu Geng Note: Firmware will follow the SError mask

[PATCH v12 1/4] arm64: KVM: export the capability to set guest SError syndrome

to user space, otherwise returns false. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Reviewed-by: James Morse <james.mo...@arm.com> Change from V11: 1. Change the commit message 2. Update the Documentation/virtual/kvm/api.tx --- Documentation/virtual/kvm/api.txt | 11 +++

[PATCH v12 1/4] arm64: KVM: export the capability to set guest SError syndrome

to user space, otherwise returns false. Signed-off-by: Dongjiu Geng Reviewed-by: James Morse Change from V11: 1. Change the commit message 2. Update the Documentation/virtual/kvm/api.tx --- Documentation/virtual/kvm/api.txt | 11 +++ arch/arm64/kvm/reset.c| 3 +++ include

[PATCH v12 4/4] arm64: handle NOTIFY_SEI notification by the APEI driver

Add a helper to handle the NOTIFY_SEI notification, when kernel gets the NOTIFY_SEI notification, call this helper and let APEI driver to handle this notification. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/include/asm/system_misc.h | 1 + arch/arm64/kernel/t

[PATCH v12 4/4] arm64: handle NOTIFY_SEI notification by the APEI driver

Add a helper to handle the NOTIFY_SEI notification, when kernel gets the NOTIFY_SEI notification, call this helper and let APEI driver to handle this notification. Signed-off-by: Dongjiu Geng --- arch/arm64/include/asm/system_misc.h | 1 + arch/arm64/kernel/traps.c| 4 arch

[PATCH v12 2/4] arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS

, user space can get/set the SError exception state to do migrate/snapshot/suspend. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Change since V11: Address James's comments, thanks James 1. Align the struct of kvm_vcpu_events to 64 bytes 2. Avoid exposing the stale ESR

[PATCH v12 2/4] arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS

, user space can get/set the SError exception state to do migrate/snapshot/suspend. Signed-off-by: Dongjiu Geng Change since V11: Address James's comments, thanks James 1. Align the struct of kvm_vcpu_events to 64 bytes 2. Avoid exposing the stale ESR value in the kvm_arm_vcpu_get_events() 3. Change

[PATCH v12 0/4] set VSESR_EL2 by user space and support NOTIFY_SEI notification

that padding transferred to user-space doesn't contain kernel stack. Dongjiu Geng (4): arm64: KVM: export the capability to set guest SError syndrome arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS ACPI / APEI: Add SEI notification type support for ARMv8 arm64: handle NOTIFY_SEI

[PATCH v12 0/4] set VSESR_EL2 by user space and support NOTIFY_SEI notification

that padding transferred to user-space doesn't contain kernel stack. Dongjiu Geng (4): arm64: KVM: export the capability to set guest SError syndrome arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS ACPI / APEI: Add SEI notification type support for ARMv8 arm64: handle NOTIFY_SEI

[PATCH v11 4/4] arm64: handle NOTIFY_SEI notification by the APEI driver

Add a helper to handle the NOTIFY_SEI notification, when kernel gets the NOTIFY_SEI notification, call this helper and let APEI driver to handle this notification. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/include/asm/system_misc.h | 1 + arch/arm64/kernel/t

[PATCH v11 4/4] arm64: handle NOTIFY_SEI notification by the APEI driver

Add a helper to handle the NOTIFY_SEI notification, when kernel gets the NOTIFY_SEI notification, call this helper and let APEI driver to handle this notification. Signed-off-by: Dongjiu Geng --- arch/arm64/include/asm/system_misc.h | 1 + arch/arm64/kernel/traps.c| 4 arch

[PATCH v11 2/4] arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS

This new IOCTL exports user-invisible states related to SError. Together with appropriate user space changes, it can inject SError with specified syndrome to guest by setup kvm_vcpu_events value. Also it can support live migration. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>

[PATCH v11 2/4] arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS

This new IOCTL exports user-invisible states related to SError. Together with appropriate user space changes, it can inject SError with specified syndrome to guest by setup kvm_vcpu_events value. Also it can support live migration. Signed-off-by: Dongjiu Geng Change since V10: Address James's

[PATCH v11 3/4] ACPI / APEI: Add SEI notification type support for ARMv8

ACPI 6.x adds support for NOTIFY_SEI as a GHES notification mechanism, so add new GHES notification handling functions. Expose API ghes_notify_sei() to arch code, arch code will call this API when it gets this NOTIFY_SEI. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- drivers/acp

[PATCH v11 3/4] ACPI / APEI: Add SEI notification type support for ARMv8

ACPI 6.x adds support for NOTIFY_SEI as a GHES notification mechanism, so add new GHES notification handling functions. Expose API ghes_notify_sei() to arch code, arch code will call this API when it gets this NOTIFY_SEI. Signed-off-by: Dongjiu Geng --- drivers/acpi/apei/Kconfig | 15

[PATCH v11 0/4] set VSESR_EL2 by user space and support NOTIFY_SEI notification

kvm_vcpu_events struct align to 4 bytes 4. Add something check in the kvm_arm_vcpu_set_events() 5. Check kvm_arm_vcpu_get/set_events()'s return value. 6. Initialise kvm_vcpu_events to 0 so that padding transferred to user-space doesn't contain kernel stack. Dongjiu Geng (4): arm64: KVM: export

[PATCH v11 1/4] arm64: KVM: export the capability to set guest SError syndrome

Before user space injects a SError, it needs to know whether it can specify the guest Exception Syndrome, so KVM should tell user space whether it has such capability. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- Documentation/virtual/kvm/api.txt | 11 +++ arch/arm

[PATCH v11 0/4] set VSESR_EL2 by user space and support NOTIFY_SEI notification

kvm_vcpu_events struct align to 4 bytes 4. Add something check in the kvm_arm_vcpu_set_events() 5. Check kvm_arm_vcpu_get/set_events()'s return value. 6. Initialise kvm_vcpu_events to 0 so that padding transferred to user-space doesn't contain kernel stack. Dongjiu Geng (4): arm64: KVM: export

[PATCH v11 1/4] arm64: KVM: export the capability to set guest SError syndrome

Before user space injects a SError, it needs to know whether it can specify the guest Exception Syndrome, so KVM should tell user space whether it has such capability. Signed-off-by: Dongjiu Geng --- Documentation/virtual/kvm/api.txt | 11 +++ arch/arm64/kvm/reset.c| 3

[PATCH v10 2/5] arm64: KVM: export the capability to set guest SError syndrome

Before user space injects a SError, it needs to know whether it can specify the guest Exception Syndrome, so KVM should tell user space whether it has such capability. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- Documentation/virtual/kvm/api.txt | 11 +++ arch/arm

[PATCH v10 2/5] arm64: KVM: export the capability to set guest SError syndrome

Before user space injects a SError, it needs to know whether it can specify the guest Exception Syndrome, so KVM should tell user space whether it has such capability. Signed-off-by: Dongjiu Geng --- Documentation/virtual/kvm/api.txt | 11 +++ arch/arm64/kvm/reset.c| 3

[PATCH v10 0/5] set VSESR_EL2 by user space and support NOTIFY_SEI notification

this notification in software, KVM or kernel ARCH code call handle_guest_sei() to let ACP driver to handle this notification. Dongjiu Geng (5): arm64: KVM: Prepare set virtual SEI syndrome value arm64: KVM: export the capability to set guest SError syndrome arm/arm64: KVM: Introduce set and get per-vcpu

[PATCH v10 0/5] set VSESR_EL2 by user space and support NOTIFY_SEI notification

this notification in software, KVM or kernel ARCH code call handle_guest_sei() to let ACP driver to handle this notification. Dongjiu Geng (5): arm64: KVM: Prepare set virtual SEI syndrome value arm64: KVM: export the capability to set guest SError syndrome arm/arm64: KVM: Introduce set and get per-vcpu

[PATCH v10 1/5] arm64: KVM: Prepare set virtual SEI syndrome value

Export one API to specify virtual SEI syndrome value for guest, and add a helper to get the VSESR_EL2 value. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/include/asm/kvm_emulate.h | 5 + arch/arm64/include/asm/kvm_host.h| 2 ++ arch/arm64/kvm/inject_f

[PATCH v10 1/5] arm64: KVM: Prepare set virtual SEI syndrome value

Export one API to specify virtual SEI syndrome value for guest, and add a helper to get the VSESR_EL2 value. Signed-off-by: Dongjiu Geng --- arch/arm64/include/asm/kvm_emulate.h | 5 + arch/arm64/include/asm/kvm_host.h| 2 ++ arch/arm64/kvm/inject_fault.c| 5 + 3 files

[PATCH v10 5/5] arm64: handle NOTIFY_SEI notification by the APEI driver

Add a helper to handle the NOTIFY_SEI notification, when kernel gets the NOTIFY_SEI notification, call this helper and let APEI driver to handle this notification. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/include/asm/system_misc.h | 1 + arch/arm64/kernel/t

[PATCH v10 5/5] arm64: handle NOTIFY_SEI notification by the APEI driver

Add a helper to handle the NOTIFY_SEI notification, when kernel gets the NOTIFY_SEI notification, call this helper and let APEI driver to handle this notification. Signed-off-by: Dongjiu Geng --- arch/arm64/include/asm/system_misc.h | 1 + arch/arm64/kernel/traps.c| 4 arch

[PATCH v10 3/5] arm/arm64: KVM: Introduce set and get per-vcpu event

-by: Dongjiu Geng <gengdong...@huawei.com> --- Documentation/virtual/kvm/api.txt | 26 -- arch/arm/include/asm/kvm_host.h | 6 ++ arch/arm/kvm/guest.c | 12 arch/arm64/include/asm/kvm_host.h | 5 + arch/arm64/include/uapi/asm/kvm.

[PATCH v10 3/5] arm/arm64: KVM: Introduce set and get per-vcpu event

-by: Dongjiu Geng --- Documentation/virtual/kvm/api.txt | 26 -- arch/arm/include/asm/kvm_host.h | 6 ++ arch/arm/kvm/guest.c | 12 arch/arm64/include/asm/kvm_host.h | 5 + arch/arm64/include/uapi/asm/kvm.h | 10 ++ arch/arm64/kvm

[PATCH v10 4/5] ACPI / APEI: Add SEI notification type support for ARMv8

ACPI 6.x adds support for NOTIFY_SEI as a GHES notification mechanism, so add new GHES notification handling functions. Expose API ghes_notify_sei() to arch code, arch code will call this API when it gets this NOTIFY_SEI. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- drivers/acp

[PATCH v10 4/5] ACPI / APEI: Add SEI notification type support for ARMv8

ACPI 6.x adds support for NOTIFY_SEI as a GHES notification mechanism, so add new GHES notification handling functions. Expose API ghes_notify_sei() to arch code, arch code will call this API when it gets this NOTIFY_SEI. Signed-off-by: Dongjiu Geng --- drivers/acpi/apei/Kconfig | 15

[PATCH] arm64: rename the function arm64_is_ras_serror() to avoid confusion

(), this function is used to judge whether it is categorized RAS Serror. Change some code notes, unrecoverable RAS errors is imprecise, but Recoverable RAS errors is precise. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/include/asm/traps.h | 20 arch

[PATCH] arm64: rename the function arm64_is_ras_serror() to avoid confusion

(), this function is used to judge whether it is categorized RAS Serror. Change some code notes, unrecoverable RAS errors is imprecise, but Recoverable RAS errors is precise. Signed-off-by: Dongjiu Geng --- arch/arm64/include/asm/traps.h | 20 arch/arm64/kernel/traps.c | 9

[PATCH v9 0/7] Handle guest RAS Error in KVM and kernel

for recoverable error (UER) 4. update some patch's commit messages and clean some patches Dongjiu Geng (5): acpi: apei: Add SEI notification type support for ARMv8 KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl arm64: kvm:

[PATCH v9 6/7] arm64: kvm: Set Virtual SError Exception Syndrome for guest

, restore this value to VSESR_EL2 only when HCR_EL2.VSE is set. This value no need to be saved because it is stale vale when guest exit. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> [Set an impdef ESR for Virtual-SError] Signed-off-by: James Morse <james.mo...@arm.com> ---

[PATCH v9 6/7] arm64: kvm: Set Virtual SError Exception Syndrome for guest

, restore this value to VSESR_EL2 only when HCR_EL2.VSE is set. This value no need to be saved because it is stale vale when guest exit. Signed-off-by: Dongjiu Geng [Set an impdef ESR for Virtual-SError] Signed-off-by: James Morse --- arch/arm64/include/asm/kvm_emulate.h | 10 ++ arch

[PATCH v9 0/7] Handle guest RAS Error in KVM and kernel

for recoverable error (UER) 4. update some patch's commit messages and clean some patches Dongjiu Geng (5): acpi: apei: Add SEI notification type support for ARMv8 KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl arm64: kvm:

[PATCH v9 3/7] acpi: apei: Add SEI notification type support for ARMv8

users. External modules can call this exposed API to parse APEI table and handle the SEI notification. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- drivers/acpi/apei/Kconfig | 15 ++ drivers/acpi/apei/ghes.c | 53 +++ includ

[PATCH v9 3/7] acpi: apei: Add SEI notification type support for ARMv8

users. External modules can call this exposed API to parse APEI table and handle the SEI notification. Signed-off-by: Dongjiu Geng --- drivers/acpi/apei/Kconfig | 15 ++ drivers/acpi/apei/ghes.c | 53 +++ include/acpi/ghes.h | 1 + 3

[PATCH v9 7/7] arm64: kvm: handle guest SError Interrupt by categorization

and has not (yet) been architecturally consumed by the PE, the exception is precise. In order to make it simple, we temporarily shut down the VM to isolate the error. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- change since v8: 1. Check handle_guest_sei()'s return value 2. Tempo

[PATCH v9 5/7] arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl

, If has, will set it. Otherwise, nothing to do. For this ESR specifying, Only support for AArch64, not support AArch32. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- change the name to KVM_CAP_ARM_INJECT_SERROR_ESR instead of X_ARM_RAS_EXTENSION, suggested here

[PATCH v9 1/7] arm64: cpufeature: Detect CPU RAS Extentions

onfig option, reworded commit message] Signed-off-by: James Morse <james.mo...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Reviewed-by: Catalin Marinas <catalin.mari...@arm.com> --- arch/arm64/Kconfig | 16 arch/arm64/include/asm/

[PATCH v9 7/7] arm64: kvm: handle guest SError Interrupt by categorization

and has not (yet) been architecturally consumed by the PE, the exception is precise. In order to make it simple, we temporarily shut down the VM to isolate the error. Signed-off-by: Dongjiu Geng --- change since v8: 1. Check handle_guest_sei()'s return value 2. Temporarily shut down the VM

[PATCH v9 5/7] arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl

, If has, will set it. Otherwise, nothing to do. For this ESR specifying, Only support for AArch64, not support AArch32. Signed-off-by: Dongjiu Geng --- change the name to KVM_CAP_ARM_INJECT_SERROR_ESR instead of X_ARM_RAS_EXTENSION, suggested here https://patchwork.kernel.org/patch/9925203

[PATCH v9 1/7] arm64: cpufeature: Detect CPU RAS Extentions

-by: James Morse Signed-off-by: Dongjiu Geng Reviewed-by: Catalin Marinas --- arch/arm64/Kconfig | 16 arch/arm64/include/asm/cpucaps.h | 3 ++- arch/arm64/include/asm/sysreg.h | 2 ++ arch/arm64/kernel/cpufeature.c | 13 + 4 files changed, 33 insertions

[PATCH v9 4/7] KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA

raps attempts to access the physical error registers. ERRIDR_EL1 advertises the number of error records, we return zero meaning we can treat all the other registers as RAZ/WI too. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> [removed specific emulation, use trap_raz_wi() directly for

[PATCH v9 4/7] KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA

raps attempts to access the physical error registers. ERRIDR_EL1 advertises the number of error records, we return zero meaning we can treat all the other registers as RAZ/WI too. Signed-off-by: Dongjiu Geng [removed specific emulation, use trap_raz_wi() directly for everything, rephrased p

[PATCH v9 2/7] KVM: arm64: Save ESR_EL2 on guest SError

From: James Morse When we exit a guest due to an SError the vcpu fault info isn't updated with the ESR. Today this is only done for traps. The v8.2 RAS Extensions define ISS values for SError. Update the vcpu's fault_info with the ESR on SError so that handle_exit() can

[PATCH v9 2/7] KVM: arm64: Save ESR_EL2 on guest SError

From: James Morse When we exit a guest due to an SError the vcpu fault info isn't updated with the ESR. Today this is only done for traps. The v8.2 RAS Extensions define ISS values for SError. Update the vcpu's fault_info with the ESR on SError so that handle_exit() can determine if this was a

[PATCH v3] arm64: fault: avoid send SIGBUS two times

arm64_notify_die() so can always return success. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Reviewed-by: James Morse <james.mo...@arm.com> Reviewed-by: Xie XiuQi <xiexi...@huawei.com> --- Change since V2: 1. Address James's comments to not change the si_code for SIGBUS Change si

[PATCH v3] arm64: fault: avoid send SIGBUS two times

arm64_notify_die() so can always return success. Signed-off-by: Dongjiu Geng Reviewed-by: James Morse Reviewed-by: Xie XiuQi --- Change since V2: 1. Address James's comments to not change the si_code for SIGBUS Change since V1: 1. Address James's comments to update the commit messages --- arch/arm64/mm

[PATCH v3] arm64: v8.4: Support for new floating point multiplication instructions

detects this feature and let the userspace know about it via a HWCAP bit and MRS emulation. Cc: Dave Martin <dave.mar...@arm.com> Cc: Suzuki K Poulose <suzuki.poul...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Reviewed-by: Dave Martin <dave.mar...@arm.com>

[PATCH v3] arm64: v8.4: Support for new floating point multiplication instructions

detects this feature and let the userspace know about it via a HWCAP bit and MRS emulation. Cc: Dave Martin Cc: Suzuki K Poulose Signed-off-by: Dongjiu Geng Reviewed-by: Dave Martin --- Change since v2: 1. Change the HWCAP_FHM to HWCAP_ASIMDFHM Change since v1: 1. Address Dave and Suzuki's

[PATCH v2] arm64: v8.4: Support for new floating point multiplication instructions

detects this feature and let the userspace know about it via a HWCAP bit and MRS emulation. Cc: Dave Martin <dave.mar...@arm.com> Cc: Suzuki K Poulose <suzuki.poul...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- Change since v1: 1. Address Dave and Suzuki's

[PATCH v2] arm64: v8.4: Support for new floating point multiplication instructions

detects this feature and let the userspace know about it via a HWCAP bit and MRS emulation. Cc: Dave Martin Cc: Suzuki K Poulose Signed-off-by: Dongjiu Geng --- Change since v1: 1. Address Dave and Suzuki's comments to update the commit message. 2. Address Dave's comments to update Documentation

[RESEND PATCH V2] arm64: fault: avoid send SIGBUS two times

arm64_notify_die() so can always return success. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- 1. Address James's comments to update the commit messages 2. Address James's comments to not change the si_code for SIGBUS --- arch/arm64/mm/fault.c | 7 +++ 1 file changed, 3 insertions

[RESEND PATCH V2] arm64: fault: avoid send SIGBUS two times

arm64_notify_die() so can always return success. Signed-off-by: Dongjiu Geng --- 1. Address James's comments to update the commit messages 2. Address James's comments to not change the si_code for SIGBUS --- arch/arm64/mm/fault.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch

[RESEND PATCH] arm64: v8.4: Support for new floating point multiplication variant

ARM v8.4 extensions include support for new floating point multiplication variant instructions to the AArch64 SIMD instructions set. Let the userspace know about it via a HWCAP bit and MRS emulation. Cc: Suzuki K Poulose <suzuki.poul...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@h

[RESEND PATCH] arm64: v8.4: Support for new floating point multiplication variant

ARM v8.4 extensions include support for new floating point multiplication variant instructions to the AArch64 SIMD instructions set. Let the userspace know about it via a HWCAP bit and MRS emulation. Cc: Suzuki K Poulose Signed-off-by: Dongjiu Geng --- My platform supports this feature, so I

[PATCH] arm64: v8.4: Support for new floating point multiplication variant

ARM v8.4 extensions include support for new floating point multiplication variant instructions to the AArch64 SIMD instructions set. Let the userspace know about it via a HWCAP bit and MRS emulation. Cc: Suzuki K Poulose <suzuki.poul...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@h

[PATCH] arm64: v8.4: Support for new floating point multiplication variant

ARM v8.4 extensions include support for new floating point multiplication variant instructions to the AArch64 SIMD instructions set. Let the userspace know about it via a HWCAP bit and MRS emulation. Cc: Suzuki K Poulose Signed-off-by: Dongjiu Geng --- My platform supports this feature, so I

[PATCH V2] arm64: fault: avoid send SIGBUS two times

arm64_notify_die() so can always return success. The si_code BUS_MCEERR_AR can tell user-space there is a hardware error that needs to be dealt with immediately Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/mm/fault.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-)

[PATCH V2] arm64: fault: avoid send SIGBUS two times

arm64_notify_die() so can always return success. The si_code BUS_MCEERR_AR can tell user-space there is a hardware error that needs to be dealt with immediately Signed-off-by: Dongjiu Geng --- arch/arm64/mm/fault.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm64/mm

[PATCH RESEND] arm64: fault: avoid send SIGBUS two times

If APEI handling the memory error is failed, the do_mem_abort() and do_sea() will all deliver SIGBUS. In fact, sending one time can be enough, so correct it. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/mm/fault.c | 5 ++--- 1 file changed, 2 insertions(+), 3 del

[PATCH RESEND] arm64: fault: avoid send SIGBUS two times

If APEI handling the memory error is failed, the do_mem_abort() and do_sea() will all deliver SIGBUS. In fact, sending one time can be enough, so correct it. Signed-off-by: Dongjiu Geng --- arch/arm64/mm/fault.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm64

[PATCH] arm64: avoid send SIGBUS two times

If APEI handling the memory error is failed, the SIGBUS will be sent twice. In fact, send one time can be enough, so correct it. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/mm/fault.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/ar

[PATCH] arm64: avoid send SIGBUS two times

If APEI handling the memory error is failed, the SIGBUS will be sent twice. In fact, send one time can be enough, so correct it. Signed-off-by: Dongjiu Geng --- arch/arm64/mm/fault.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm

[PATCH v8 2/7] KVM: arm64: Save ESR_EL2 on guest SError

() can determine if this was a RAS SError and decode its severity. Signed-off-by: James Morse <james.mo...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/kvm/hyp/switch.c | 15 --- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/

[PATCH v8 2/7] KVM: arm64: Save ESR_EL2 on guest SError

if this was a RAS SError and decode its severity. Signed-off-by: James Morse Signed-off-by: Dongjiu Geng --- arch/arm64/kvm/hyp/switch.c | 15 --- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c index 945e79c..c6f17c7 100644

[PATCH v8 4/7] KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA

raps attempts to access the physical error registers. ERRIDR_EL1 advertises the number of error records, we return zero meaning we can treat all the other registers as RAZ/WI too. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> [removed specific emulation, use trap_raz_wi() directly for

[PATCH v8 4/7] KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA

raps attempts to access the physical error registers. ERRIDR_EL1 advertises the number of error records, we return zero meaning we can treat all the other registers as RAZ/WI too. Signed-off-by: Dongjiu Geng [removed specific emulation, use trap_raz_wi() directly for everything, rephrased p

[PATCH v8 3/7] acpi: apei: Add SEI notification type support for ARMv8

users. External modules can call this exposed API to parse APEI table and handle the SEI notification. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- drivers/acpi/apei/Kconfig | 15 ++ drivers/acpi/apei/ghes.c | 53 +++ includ

[PATCH v8 3/7] acpi: apei: Add SEI notification type support for ARMv8

users. External modules can call this exposed API to parse APEI table and handle the SEI notification. Signed-off-by: Dongjiu Geng --- drivers/acpi/apei/Kconfig | 15 ++ drivers/acpi/apei/ghes.c | 53 +++ include/acpi/ghes.h | 1 + 3

[PATCH v8 0/7] Support RAS virtualization in KVM

', so set this ESR to IMPLEMENTATION DEFINED by default if user space does not specify it. Dongjiu Geng (5): acpi: apei: Add SEI notification type support for ARMv8 KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl a

[PATCH v8 0/7] Support RAS virtualization in KVM

', so set this ESR to IMPLEMENTATION DEFINED by default if user space does not specify it. Dongjiu Geng (5): acpi: apei: Add SEI notification type support for ARMv8 KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl a

[PATCH v8 1/7] arm64: cpufeature: Detect CPU RAS Extentions

b and config option, reworded commit message] Signed-off-by: James Morse <james.mo...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Reviewed-by: Catalin Marinas <catalin.mari...@arm.com> --- arch/arm64/Kconfig | 16 arch/arm64/incl

[PATCH v8 1/7] arm64: cpufeature: Detect CPU RAS Extentions

-by: James Morse Signed-off-by: Dongjiu Geng Reviewed-by: Catalin Marinas --- arch/arm64/Kconfig | 16 arch/arm64/include/asm/barrier.h | 1 + arch/arm64/include/asm/cpucaps.h | 3 ++- arch/arm64/include/asm/sysreg.h | 2 ++ arch/arm64/kernel/cpufeature.c

[PATCH v8 6/7] arm64: kvm: Set Virtual SError Exception Syndrome for guest

switch, restore this value to VSESR_EL2 only when HCR_EL2.VSE is set. This value no need to be saved because it is stale vale when guest exit. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@huawei.com> [Set an impdef ESR for Virtual-SError

[PATCH v8 6/7] arm64: kvm: Set Virtual SError Exception Syndrome for guest

switch, restore this value to VSESR_EL2 only when HCR_EL2.VSE is set. This value no need to be saved because it is stale vale when guest exit. Signed-off-by: Dongjiu Geng Signed-off-by: Quanming Wu [Set an impdef ESR for Virtual-SError] Signed-off-by: James Morse --- arch/arm64/include/asm

[PATCH v8 5/7] arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl

, If has, will set it. Otherwise, nothing to do. For this ESR specifying, Only support for AArch64, not support AArch32. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@huawei.com> change the name to KVM_CAP_ARM_INJECT_SERROR

[PATCH v8 5/7] arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl

, If has, will set it. Otherwise, nothing to do. For this ESR specifying, Only support for AArch64, not support AArch32. Signed-off-by: Dongjiu Geng Signed-off-by: Quanming Wu change the name to KVM_CAP_ARM_INJECT_SERROR_ESR instead of X_ARM_RAS_EXTENSION, suggested here https

[PATCH v8 7/7] arm64: kvm: handle SError Interrupt by categorization

a valid ESR and inject virtual SError, guest can just kill the current application if the non-consumed error coming from guest application. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@huawei.com> --- arch/arm64/include/asm/esr.h

[PATCH v8 7/7] arm64: kvm: handle SError Interrupt by categorization

a valid ESR and inject virtual SError, guest can just kill the current application if the non-consumed error coming from guest application. Signed-off-by: Dongjiu Geng Signed-off-by: Quanming Wu --- arch/arm64/include/asm/esr.h | 15 arch/arm64/include/asm/kvm_asm.h | 3

[PATCH v1 2/3] arm64: add error synchronization barrier in kernel_entry/kernel_exit

, it will immediately trap to EL3 firmware. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/kernel/entry.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index e147c1d..6dde644 100644 --- a/arch/arm64/kernel/entry.S

[PATCH v1 2/3] arm64: add error synchronization barrier in kernel_entry/kernel_exit

, it will immediately trap to EL3 firmware. Signed-off-by: Dongjiu Geng --- arch/arm64/kernel/entry.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index e147c1d..6dde644 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S

[PATCH v1 3/3] KVM: arm64: add ESB in exception handler entry and exit.

synchronization operation. Only add the ESB in the important exception handler path to reduce the impact on performance. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/kvm/hyp/entry.S | 2 ++ arch/arm64/kvm/hyp/hyp-entry.S | 1 + 2 files changed, 3 insertions(+)

[PATCH v1 3/3] KVM: arm64: add ESB in exception handler entry and exit.

synchronization operation. Only add the ESB in the important exception handler path to reduce the impact on performance. Signed-off-by: Dongjiu Geng --- arch/arm64/kvm/hyp/entry.S | 2 ++ arch/arm64/kvm/hyp/hyp-entry.S | 1 + 2 files changed, 3 insertions(+) diff --git a/arch/arm64/kvm/hyp

[PATCH v1 1/3] arm64: add a macro for SError synchronization

Barrier(ESB) operations. In this macros, if system supports RAS Extensdddon instead of IESB, it will insert an ESB instruction. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/include/asm/assembler.h | 9 + 1 file changed, 9 insertions(+) diff --git a/arch

[PATCH v1 1/3] arm64: add a macro for SError synchronization

Barrier(ESB) operations. In this macros, if system supports RAS Extensdddon instead of IESB, it will insert an ESB instruction. Signed-off-by: Dongjiu Geng --- arch/arm64/include/asm/assembler.h | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm64/include/asm/assembler.h b

[PATCH v1 0/3] manually add Error Synchronization Barrier at exception handler entry and exit

pport". In Huawei's platform, we do not support IESB, so software needs to insert that. Dongjiu Geng (3): arm64: add a macro for SError synchronization arm64: add error synchronization barrier in kernel_entry/kernel_exit KVM: arm64: add ESB in exception handler entry and exit. James

[PATCH v1 0/3] manually add Error Synchronization Barrier at exception handler entry and exit

pport". In Huawei's platform, we do not support IESB, so software needs to insert that. Dongjiu Geng (3): arm64: add a macro for SError synchronization arm64: add error synchronization barrier in kernel_entry/kernel_exit KVM: arm64: add ESB in exception handler entry and exit. James

[PATCH v4] KVM: arm/arm64: fix the incompatible matching for external abort

value. Using kvm_vcpu_trap_get_fault() instead fixes it for good. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Acked-by: Marc Zyngier <marc.zyng...@arm.com> --- arch/arm/include/asm/kvm_emulate.h | 2 +- arch/arm64/include/asm/kvm_emulate.h | 2 +- 2 files changed, 2 inse

[PATCH v4] KVM: arm/arm64: fix the incompatible matching for external abort

value. Using kvm_vcpu_trap_get_fault() instead fixes it for good. Signed-off-by: Dongjiu Geng Acked-by: Marc Zyngier --- arch/arm/include/asm/kvm_emulate.h | 2 +- arch/arm64/include/asm/kvm_emulate.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm

[PATCH v3] KVM: arm/arm64: fix the incompatible matching for external abort

For this matching, switch expression uses fault type which is not {I,D}FSC value, but the case expression uses {I,D}FSC, they are incompatible. So change the switch expression to use {I,D}FSC. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm/include/asm/kvm_emulate.h

[PATCH v3] KVM: arm/arm64: fix the incompatible matching for external abort

For this matching, switch expression uses fault type which is not {I,D}FSC value, but the case expression uses {I,D}FSC, they are incompatible. So change the switch expression to use {I,D}FSC. Signed-off-by: Dongjiu Geng --- arch/arm/include/asm/kvm_emulate.h | 2 +- arch/arm64/include/asm

[PATCH v2] KVM: arm/arm64: Fix external abort type matching

FSC_SEA_TTW2 FSC_SEA_TTW3 0x18FSC_SECC 0x1cFSC_SECC_TTW0 FSC_SECC_TTW1 FSC_SECC_TTW2 FSC_SECC_TTW3 CC: James Morse <james.mo...@arm.com> CC: Tyler Baicar <tbai...@codeaurora.org> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- As shown below code: The kvm_vcpu_t

[PATCH v2] KVM: arm/arm64: Fix external abort type matching

FSC_SEA_TTW2 FSC_SEA_TTW3 0x18FSC_SECC 0x1cFSC_SECC_TTW0 FSC_SECC_TTW1 FSC_SECC_TTW2 FSC_SECC_TTW3 CC: James Morse CC: Tyler Baicar Signed-off-by: Dongjiu Geng --- As shown below code: The kvm_vcpu_trap_get_fault_type() only return {I,D}FSC bit[5]:bit[2], not the whole {I,D}FSC

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