On Wed, Nov 18, 2020 at 08:32:35AM -0800, Randy Dunlap wrote:
> On 11/18/20 5:03 AM, Eduardo Habkost wrote:
> > On Tue, Nov 17, 2020 at 04:23:49PM -0800, Randy Dunlap wrote:
> >> On 11/17/20 2:36 PM, Eduardo Habkost wrote:
> >>> Add a kernel-doc test scri
On Tue, Nov 17, 2020 at 04:23:49PM -0800, Randy Dunlap wrote:
> On 11/17/20 2:36 PM, Eduardo Habkost wrote:
> > Add a kernel-doc test script to tools/testing/kernel-doc.
> >
> > radix_tree_lookup_slot test case provided by Matthew Wilcox.
> >
> > Signed-off-by
On Wed, Nov 18, 2020 at 09:21:11AM +0100, Paolo Bonzini wrote:
> On 17/11/20 23:36, Eduardo Habkost wrote:
> > +# the -man output includes the build date
> > +export KBUILD_BUILD_TIMESTAMP=1991-08-25
>
> Nice :)
>
> > +ok=yes
> > +
> > +# don't eve
Add a kernel-doc test script to tools/testing/kernel-doc.
radix_tree_lookup_slot test case provided by Matthew Wilcox.
Signed-off-by: Eduardo Habkost
---
tools/testing/kernel-doc/test-case.h | 111 ++
.../testing/kernel-doc/test-case.man.expected | 150
On Fri, Nov 13, 2020 at 10:39:12PM +, Matthew Wilcox wrote:
> On Fri, Nov 13, 2020 at 03:21:06PM -0700, Jonathan Corbet wrote:
> > On Fri, 30 Oct 2020 15:47:13 +0100
> > Paolo Bonzini wrote:
> >
> > > From: Eduardo Habkost
> > >
> > > Exam
On Mon, Sep 28, 2020 at 10:51:03PM +0800, Xu, Like wrote:
> Hi Eduardo,
>
> Thanks for your detailed review.
>
> On 2020/9/25 6:05, Eduardo Habkost wrote:
> > I've just noticed this on my review queue (apologies for the long
> > delay). Comments below:
> >
e without lbr_fmt values OR,
> - the requested guest vcpu model doesn't support PDCM.
>
> Cc: Paolo Bonzini
> Cc: Richard Henderson
> Cc: Eduardo Habkost
> Cc: "Michael S. Tsirkin"
> Cc: Marcel Apfelbaum
> Cc: Marcelo Tosatti
> Cc: qemu-de...@nongnu.org
> Sig
CPUs. Make this apparent in the
> result of KVM_GET_SUPPORTED_CPUID as well.
>
> While at it, reuse X86_FEATURE_* constants for the SVM leaf too.
>
> However, we need to hide the bit on Intel processors, so move
> the setting to svm_set_supported_cpuid.
>
> Cc: Konrad Rz
CPUs. Make this apparent in the
> result of KVM_GET_SUPPORTED_CPUID as well.
>
> Cc: Konrad Rzeszutek Wilk
> Reported-by: Eduardo Habkost
> Signed-off-by: Paolo Bonzini
> ---
> arch/x86/kvm/cpuid.c | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
On Fri, Jul 12, 2019 at 04:29:06PM +0800, Tao Xu wrote:
> UMWAIT and TPAUSE instructions use IA32_UMWAIT_CONTROL at MSR index E1H
> to determines the maximum time in TSC-quanta that the processor can reside
> in either C0.1 or C0.2.
>
> This patch emulates MSR IA32_UMWAIT_CONTROL in guest and
On Wed, Dec 12, 2018 at 09:08:03PM +0100, Borislav Petkov wrote:
> On Wed, Dec 12, 2018 at 05:52:35PM -0200, Eduardo Habkost wrote:
> > Why did you remove this entry from PC_COMPAT_2_4?
> >
> > We must keep compatibility with old behavior of Opteron_G2 on
> > pc-2.
BIOS and Kernel Developer's Guide (BKDG) for AMD Family
15h Models 00h-0Fh Processors".
Signed-off-by: Eduardo Habkost
---
arch/x86/include/asm/msr-index.h | 1 +
arch/x86/kvm/x86.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/inc
On Tue, Dec 11, 2018 at 05:14:40PM +0100, Borislav Petkov wrote:
> + qemu-devel.
>
> On Tue, Dec 11, 2018 at 03:30:17PM +, Daniel P. Berrangé wrote:
> > Great, then, this is a non-issue - we just need to mention that fact
> > in the commit that sets the min version for the kernel
>
> Ok,
On Tue, Dec 11, 2018 at 10:38:39AM +, Daniel P. Berrangé wrote:
> On Mon, Dec 10, 2018 at 06:08:43PM -0200, Eduardo Habkost wrote:
> > On Mon, Dec 10, 2018 at 08:42:58PM +0100, Borislav Petkov wrote:
> > > On Mon, Dec 10, 2018 at 05:06:00PM -0200, Eduardo Habkost wro
On Mon, Dec 10, 2018 at 08:42:58PM +0100, Borislav Petkov wrote:
> On Mon, Dec 10, 2018 at 05:06:00PM -0200, Eduardo Habkost wrote:
> > I mean documenting it. We already have code that will print
> > warnings if a feature isn't available.
> >
> > See my previous atte
On Mon, Dec 10, 2018 at 07:41:53PM +0100, Borislav Petkov wrote:
> On Mon, Dec 10, 2018 at 04:37:30PM -0200, Eduardo Habkost wrote:
> > It isn't as simply as reverting commit 33b5e8c03ae7, but we can
> > surely re-add RDTSCP on pc-*-4.0 and newer.
>
> Sure. If yo
On Mon, Dec 10, 2018 at 07:41:53PM +0100, Borislav Petkov wrote:
> On Mon, Dec 10, 2018 at 04:37:30PM -0200, Eduardo Habkost wrote:
> > It isn't as simply as reverting commit 33b5e8c03ae7, but we can
> > surely re-add RDTSCP on pc-*-4.0 and newer.
>
> Sure. If yo
On Mon, Dec 10, 2018 at 07:13:28PM +0100, Borislav Petkov wrote:
> Reviving an old thread here.
>
> On Wed, Jul 06, 2016 at 11:27:16PM +0200, Paolo Bonzini wrote:
> > On 06/07/2016 19:34, Eduardo Habkost wrote:
> > >> > Nothing is needed in the kernel actuall
On Wed, Dec 05, 2018 at 05:02:06PM -0500, Konrad Rzeszutek Wilk wrote:
> On Wed, Dec 05, 2018 at 05:19:56PM -0200, Eduardo Habkost wrote:
> > Months ago, we have added code to allow direct access to MSR_IA32_SPEC_CTRL
> > to the guest, which makes STIBP available to guests. This
On Wed, Dec 05, 2018 at 05:02:06PM -0500, Konrad Rzeszutek Wilk wrote:
> On Wed, Dec 05, 2018 at 05:19:56PM -0200, Eduardo Habkost wrote:
> > Months ago, we have added code to allow direct access to MSR_IA32_SPEC_CTRL
> > to the guest, which makes STIBP available to guests. This
w direct access to
MSR_IA32_SPEC_CTRL").
However, we never updated GET_SUPPORTED_CPUID to let userspace know that
STIBP can be enabled in CPUID. Fix that by updating
kvm_cpuid_8000_0008_ebx_x86_features and kvm_cpuid_7_0_edx_x86_features.
Signed-off-by: Eduardo Habkost
---
arch/x86/kvm/cpuid.c | 4 ++-
w direct access to
MSR_IA32_SPEC_CTRL").
However, we never updated GET_SUPPORTED_CPUID to let userspace know that
STIBP can be enabled in CPUID. Fix that by updating
kvm_cpuid_8000_0008_ebx_x86_features and kvm_cpuid_7_0_edx_x86_features.
Signed-off-by: Eduardo Habkost
---
arch/x86/kvm/cpuid.c | 4 ++-
Commit-ID: 8b2f245faa6238e28a1d801e8633515251d1acfc
Gitweb: https://git.kernel.org/tip/8b2f245faa6238e28a1d801e8633515251d1acfc
Author: Eduardo Habkost
AuthorDate: Fri, 5 Oct 2018 17:40:58 -0300
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 8 Oct 2018 14:30:45 -0300
perf python
Commit-ID: 8b2f245faa6238e28a1d801e8633515251d1acfc
Gitweb: https://git.kernel.org/tip/8b2f245faa6238e28a1d801e8633515251d1acfc
Author: Eduardo Habkost
AuthorDate: Fri, 5 Oct 2018 17:40:58 -0300
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 8 Oct 2018 14:30:45 -0300
perf python
Commit-ID: e13a5d69c31d35538e80176d54d95b6addf4dcbf
Gitweb: https://git.kernel.org/tip/e13a5d69c31d35538e80176d54d95b6addf4dcbf
Author: Eduardo Habkost
AuthorDate: Fri, 5 Oct 2018 17:40:57 -0300
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 8 Oct 2018 14:30:44 -0300
perf python
Commit-ID: e13a5d69c31d35538e80176d54d95b6addf4dcbf
Gitweb: https://git.kernel.org/tip/e13a5d69c31d35538e80176d54d95b6addf4dcbf
Author: Eduardo Habkost
AuthorDate: Fri, 5 Oct 2018 17:40:57 -0300
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 8 Oct 2018 14:30:44 -0300
perf python
Use a bytes literal so it works with Python 3's version of
Popen(). Note that the b"..." syntax requires Python 2.6+.
Signed-off-by: Eduardo Habkost
---
tools/perf/util/setup.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/perf/util/setup.py b/tools
-by: Eduardo Habkost
---
tools/perf/util/setup.py | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/tools/perf/util/setup.py b/tools/perf/util/setup.py
index 261a55e7e1b2..63f758c655d5 100644
--- a/tools/perf/util/setup.py
+++ b/tools/perf/util/setup.py
@@ -9,12 +9,14
Use a bytes literal so it works with Python 3's version of
Popen(). Note that the b"..." syntax requires Python 2.6+.
Signed-off-by: Eduardo Habkost
---
tools/perf/util/setup.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/perf/util/setup.py b/tools
-by: Eduardo Habkost
---
tools/perf/util/setup.py | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/tools/perf/util/setup.py b/tools/perf/util/setup.py
index 261a55e7e1b2..63f758c655d5 100644
--- a/tools/perf/util/setup.py
+++ b/tools/perf/util/setup.py
@@ -9,12 +9,14
This series contains a couple fixes to make it possible to build
perf with Python 3 and clang.
Eduardo Habkost (2):
perf: Make clang_has_option() work on Python 3
perf: More portable way to make CFLAGS work with clang
tools/perf/util/setup.py | 16 +---
1 file changed, 9
This series contains a couple fixes to make it possible to build
perf with Python 3 and clang.
Eduardo Habkost (2):
perf: Make clang_has_option() work on Python 3
perf: More portable way to make CFLAGS work with clang
tools/perf/util/setup.py | 16 +---
1 file changed, 9
On Fri, Jun 29, 2018 at 06:23:35PM +0200, Thomas Gleixner wrote:
> On Fri, 29 Jun 2018, Dave Hansen wrote:
> > On 06/29/2018 07:33 AM, Fenghua Yu wrote:
> > > +/* Detect feature of #AC for split lock by probing bit 29 in
> > > MSR_TEST_CTL. */
> > > +void detect_ac_split_lock(void)
> > > +{
> > >
On Fri, Jun 29, 2018 at 06:23:35PM +0200, Thomas Gleixner wrote:
> On Fri, 29 Jun 2018, Dave Hansen wrote:
> > On 06/29/2018 07:33 AM, Fenghua Yu wrote:
> > > +/* Detect feature of #AC for split lock by probing bit 29 in
> > > MSR_TEST_CTL. */
> > > +void detect_ac_split_lock(void)
> > > +{
> > >
On Fri, May 18, 2018 at 07:18:57PM +0200, Paolo Bonzini wrote:
> On 18/05/2018 19:13, Eduardo Habkost wrote:
> >> As much as we'd like to be helpful and validate input, you need a real
> >> time host too. I'm not sure how we'd find out - I suggest we do not
> >> b
On Fri, May 18, 2018 at 07:18:57PM +0200, Paolo Bonzini wrote:
> On 18/05/2018 19:13, Eduardo Habkost wrote:
> >> As much as we'd like to be helpful and validate input, you need a real
> >> time host too. I'm not sure how we'd find out - I suggest we do not
> >> b
On Fri, May 18, 2018 at 08:01:49PM +0300, Michael S. Tsirkin wrote:
> On Fri, May 18, 2018 at 01:04:31PM -0300, Eduardo Habkost wrote:
> > CCing qemu-devel, as I'm now discussing userspace.
> >
> > On Thu, May 17, 2018 at 10:55:33PM +0300, Michael S. Tsirkin wrote:
>
On Fri, May 18, 2018 at 08:01:49PM +0300, Michael S. Tsirkin wrote:
> On Fri, May 18, 2018 at 01:04:31PM -0300, Eduardo Habkost wrote:
> > CCing qemu-devel, as I'm now discussing userspace.
> >
> > On Thu, May 17, 2018 at 10:55:33PM +0300, Michael S. Tsirkin wrote:
>
CCing qemu-devel, as I'm now discussing userspace.
On Thu, May 17, 2018 at 10:55:33PM +0300, Michael S. Tsirkin wrote:
> On Thu, May 17, 2018 at 03:46:58PM -0300, Eduardo Habkost wrote:
> > On Thu, May 17, 2018 at 05:54:24PM +0300, Michael S. Tsirkin wrote:
> > > HIN
CCing qemu-devel, as I'm now discussing userspace.
On Thu, May 17, 2018 at 10:55:33PM +0300, Michael S. Tsirkin wrote:
> On Thu, May 17, 2018 at 03:46:58PM -0300, Eduardo Habkost wrote:
> > On Thu, May 17, 2018 at 05:54:24PM +0300, Michael S. Tsirkin wrote:
> > > HIN
On Thu, May 17, 2018 at 05:54:24PM +0300, Michael S. Tsirkin wrote:
> HINTS_DEDICATED seems to be somewhat confusing:
>
> Guest doesn't really care whether it's the only task running on a host
> CPU as long as it's not preempted.
>
> And there are more reasons for Guest to be preempted than host
On Thu, May 17, 2018 at 05:54:24PM +0300, Michael S. Tsirkin wrote:
> HINTS_DEDICATED seems to be somewhat confusing:
>
> Guest doesn't really care whether it's the only task running on a host
> CPU as long as it's not preempted.
>
> And there are more reasons for Guest to be preempted than host
On Mon, Apr 23, 2018 at 02:58:49PM +0200, Borislav Petkov wrote:
> On Wed, Apr 18, 2018 at 12:36:37PM +0200, Paolo Bonzini wrote:
> > On 18/04/2018 11:03, Eduardo Habkost wrote:
> > >>> QEMU setting ucode_rev automatically using the host value when
> > >&
On Mon, Apr 23, 2018 at 02:58:49PM +0200, Borislav Petkov wrote:
> On Wed, Apr 18, 2018 at 12:36:37PM +0200, Paolo Bonzini wrote:
> > On 18/04/2018 11:03, Eduardo Habkost wrote:
> > >>> QEMU setting ucode_rev automatically using the host value when
> > >&
On Wed, Apr 18, 2018 at 11:24:22AM +0800, Wanpeng Li wrote:
> 2018-04-18 4:24 GMT+08:00 Eduardo Habkost <ehabk...@redhat.com>:
> > On Tue, Apr 17, 2018 at 06:40:58PM +0800, Wanpeng Li wrote:
> >> Cc Eduardo,
> >> 2018-02-26 20:41 GMT+08:00 Paolo Bonzini <pbonz.
On Wed, Apr 18, 2018 at 11:24:22AM +0800, Wanpeng Li wrote:
> 2018-04-18 4:24 GMT+08:00 Eduardo Habkost :
> > On Tue, Apr 17, 2018 at 06:40:58PM +0800, Wanpeng Li wrote:
> >> Cc Eduardo,
> >> 2018-02-26 20:41 GMT+08:00 Paolo Bonzini :
> >> > On
On Tue, Apr 17, 2018 at 06:40:58PM +0800, Wanpeng Li wrote:
> Cc Eduardo,
> 2018-02-26 20:41 GMT+08:00 Paolo Bonzini :
> > On 26/02/2018 13:22, Borislav Petkov wrote:
> >> On Mon, Feb 26, 2018 at 01:18:07PM +0100, Paolo Bonzini wrote:
> In this context, "host-initiated"
On Tue, Apr 17, 2018 at 06:40:58PM +0800, Wanpeng Li wrote:
> Cc Eduardo,
> 2018-02-26 20:41 GMT+08:00 Paolo Bonzini :
> > On 26/02/2018 13:22, Borislav Petkov wrote:
> >> On Mon, Feb 26, 2018 at 01:18:07PM +0100, Paolo Bonzini wrote:
> In this context, "host-initiated" write means written by
On Tue, Apr 10, 2018 at 05:13:21PM +0800, Wanpeng Li wrote:
> Hi Eduardo,
> 2018-03-09 22:16 GMT+08:00 Eduardo Habkost <ehabk...@redhat.com>:
> > On Fri, Feb 09, 2018 at 06:15:25AM -0800, Wanpeng Li wrote:
> >> From: Wanpeng Li <wanpen...@tencent.com>
> >>
On Tue, Apr 10, 2018 at 05:13:21PM +0800, Wanpeng Li wrote:
> Hi Eduardo,
> 2018-03-09 22:16 GMT+08:00 Eduardo Habkost :
> > On Fri, Feb 09, 2018 at 06:15:25AM -0800, Wanpeng Li wrote:
> >> From: Wanpeng Li
> >>
> >> Add KVM_HINTS_DEDICATED performa
cks.
>
> Cc: Paolo Bonzini <pbonz...@redhat.com>
> Cc: Radim Krčmář <rkrc...@redhat.com>
> Cc: Eduardo Habkost <ehabk...@redhat.com>
> Signed-off-by: Wanpeng Li <wanpen...@tencent.com>
> ---
> v1 -> v2:
> * add a new feature word
>
>
Bonzini
> Cc: Radim Krčmář
> Cc: Eduardo Habkost
> Signed-off-by: Wanpeng Li
> ---
> v1 -> v2:
> * add a new feature word
>
> target/i386/cpu.c | 14 ++
> target/i386/cpu.h | 3 +++
> target/i386/kvm.c | 4
> 3 files changed, 21 insert
On Sun, Feb 11, 2018 at 11:29:44AM +0800, Wanpeng Li wrote:
[...]
> +KVM_HINTS_DEDICATED|| 0 || guest checks this feature bit
> + || || to determine if they run on
> dedicated
> + || || vCPUs,
On Sun, Feb 11, 2018 at 11:29:44AM +0800, Wanpeng Li wrote:
[...]
> +KVM_HINTS_DEDICATED|| 0 || guest checks this feature bit
> + || || to determine if they run on
> dedicated
> + || || vCPUs,
> PV_DEDICATED = 0, PV_UNHALT = 1: default is Hybrid PV queued/unfair lock
> PV_DEDICATED = 0, PV_UNHALT = 0: default is tas
>
> Cc: Paolo Bonzini <pbonz...@redhat.com>
> Cc: Radim Krčmář <rkrc...@redhat.com>
> Cc: Eduardo Habkost <ehabk...@redhat.com>
>
UNHALT = 1: default is Hybrid PV queued/unfair lock
> PV_DEDICATED = 0, PV_UNHALT = 0: default is tas
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: Eduardo Habkost
> Signed-off-by: Wanpeng Li
> ---
> v1 -> v2:
> * update to KVM_HINTS_DEDICATED
>
> Documentatio
cks.
>
> Cc: Paolo Bonzini <pbonz...@redhat.com>
> Cc: Radim Krčmář <rkrc...@redhat.com>
> Cc: Eduardo Habkost <ehabk...@redhat.com>
> Signed-off-by: Wanpeng Li <wanpen...@tencent.com>
[...]
> +[FEAT_KVM_HINTS] = {
> +.feat_names = {
>
Bonzini
> Cc: Radim Krčmář
> Cc: Eduardo Habkost
> Signed-off-by: Wanpeng Li
[...]
> +[FEAT_KVM_HINTS] = {
> +.feat_names = {
> +"hint-dedicated", NULL, NULL, NULL,
> +NULL, NULL, NULL, NULL,
> +NULL,
On Wed, Jan 31, 2018 at 11:15:50AM +0100, Thomas Gleixner wrote:
> On Wed, 31 Jan 2018, Christophe de Dinechin wrote:
> > > On 30 Jan 2018, at 21:46, Alan Cox wrote:
> > >
> > >> If you are ever going to migrate to Skylake, I think you should just
> > >> always tell
On Wed, Jan 31, 2018 at 11:15:50AM +0100, Thomas Gleixner wrote:
> On Wed, 31 Jan 2018, Christophe de Dinechin wrote:
> > > On 30 Jan 2018, at 21:46, Alan Cox wrote:
> > >
> > >> If you are ever going to migrate to Skylake, I think you should just
> > >> always tell the guests that you're
On Wed, Jan 31, 2018 at 02:04:49PM +, Dr. David Alan Gilbert wrote:
> * Borislav Petkov (b...@suse.de) wrote:
> > On Wed, Jan 31, 2018 at 12:30:36PM +, Dr. David Alan Gilbert wrote:
> > > Indeed, it's only for this weird case where you suddenly need to change
> > > it.
> >
> > No, there's
On Wed, Jan 31, 2018 at 02:04:49PM +, Dr. David Alan Gilbert wrote:
> * Borislav Petkov (b...@suse.de) wrote:
> > On Wed, Jan 31, 2018 at 12:30:36PM +, Dr. David Alan Gilbert wrote:
> > > Indeed, it's only for this weird case where you suddenly need to change
> > > it.
> >
> > No, there's
On Mon, Jan 29, 2018 at 07:32:06PM -0800, Linus Torvalds wrote:
> On Mon, Jan 29, 2018 at 5:32 PM, Arjan van de Ven
> wrote:
> >
> > the most simple solution is that we set the internal feature bit in Linux
> > to turn on the "stuff the RSB" workaround is we're on a SKL
On Mon, Jan 29, 2018 at 07:32:06PM -0800, Linus Torvalds wrote:
> On Mon, Jan 29, 2018 at 5:32 PM, Arjan van de Ven
> wrote:
> >
> > the most simple solution is that we set the internal feature bit in Linux
> > to turn on the "stuff the RSB" workaround is we're on a SKL *or* as a guest
> > in a
On Mon, Jan 29, 2018 at 02:25:12PM -0800, Andi Kleen wrote:
>
> I agree with your point that the common hypervisor practice to fake
> old model numbers will break some of the workarounds. Hypervisors
> may need to revisit their practice.
>
> > > In general, making these kinds of decisions based
On Mon, Jan 29, 2018 at 02:25:12PM -0800, Andi Kleen wrote:
>
> I agree with your point that the common hypervisor practice to fake
> old model numbers will break some of the workarounds. Hypervisors
> may need to revisit their practice.
>
> > > In general, making these kinds of decisions based
On Tue, Jan 30, 2018 at 01:20:52AM +, David Dunn wrote:
> Eduardo,
>
> This is why it would be good to have a CPUID bit that says:
> "apply SkyLake RSB stuffing." That's preferable to "trust FMS"
> for VMware.
Agreed it would be more useful than "trust FMS". However, I
believe a "no need
On Tue, Jan 30, 2018 at 01:20:52AM +, David Dunn wrote:
> Eduardo,
>
> This is why it would be good to have a CPUID bit that says:
> "apply SkyLake RSB stuffing." That's preferable to "trust FMS"
> for VMware.
Agreed it would be more useful than "trust FMS". However, I
believe a "no need
On Mon, Jan 29, 2018 at 02:12:02PM -0800, Jim Mattson wrote:
> On Mon, Jan 29, 2018 at 1:50 PM, Eduardo Habkost <ehabk...@redhat.com> wrote:
> > On Mon, Jan 29, 2018 at 01:37:05PM -0800, Jim Mattson wrote:
> >> For GCE, "you might be migrated to Skylake" is
On Mon, Jan 29, 2018 at 02:12:02PM -0800, Jim Mattson wrote:
> On Mon, Jan 29, 2018 at 1:50 PM, Eduardo Habkost wrote:
> > On Mon, Jan 29, 2018 at 01:37:05PM -0800, Jim Mattson wrote:
> >> For GCE, "you might be migrated to Skylake" is pretty much a
> >>
On Mon, Jan 29, 2018 at 05:10:11PM -0500, Konrad Rzeszutek Wilk wrote:
[...]
> The migration code could be 'tickled' (when arrived at the destination)
> to recheck the CPUID and do the alternative logic to turn the
> proper bits on.
>
> And this tickling could be as simple as an ACPI DSDT/AML
On Mon, Jan 29, 2018 at 05:10:11PM -0500, Konrad Rzeszutek Wilk wrote:
[...]
> The migration code could be 'tickled' (when arrived at the destination)
> to recheck the CPUID and do the alternative logic to turn the
> proper bits on.
>
> And this tickling could be as simple as an ACPI DSDT/AML
On Mon, Jan 29, 2018 at 02:49:51PM -0800, Jim Mattson wrote:
> And if we expect to introduce Cascade Lake into the pool in the
> future, we use a Cascade Lake model number?
>
> It sounds like you are suggesting that we set the model number to the
> highest model number that will ever be
On Mon, Jan 29, 2018 at 02:49:51PM -0800, Jim Mattson wrote:
> And if we expect to introduce Cascade Lake into the pool in the
> future, we use a Cascade Lake model number?
>
> It sounds like you are suggesting that we set the model number to the
> highest model number that will ever be
On Mon, Jan 29, 2018 at 10:29:28PM +, David Dunn wrote:
> On Mon, 2018-01-29 at 13:45:07 -0800, Eduardo Habkost wrote:
>
> > Maybe a generic "family/model/stepping/microcode really matches
> > the CPU you are running on" bit would be useful. The bit could
On Mon, Jan 29, 2018 at 10:29:28PM +, David Dunn wrote:
> On Mon, 2018-01-29 at 13:45:07 -0800, Eduardo Habkost wrote:
>
> > Maybe a generic "family/model/stepping/microcode really matches
> > the CPU you are running on" bit would be useful. The bit could
On Mon, Jan 29, 2018 at 01:37:05PM -0800, Jim Mattson wrote:
> For GCE, "you might be migrated to Skylake" is pretty much a
> certainty. Even if you're in a zone that doesn't currently have
> Skylake machines, chances are pretty good that it will have Skylake
> machines some day in the
On Mon, Jan 29, 2018 at 01:37:05PM -0800, Jim Mattson wrote:
> For GCE, "you might be migrated to Skylake" is pretty much a
> certainty. Even if you're in a zone that doesn't currently have
> Skylake machines, chances are pretty good that it will have Skylake
> machines some day in the
On Mon, Jan 29, 2018 at 09:02:39PM +, David Woodhouse wrote:
>
>
> On Mon, 2018-01-29 at 12:44 -0800, Arjan van de Ven wrote:
> > On 1/29/2018 12:42 PM, Eduardo Habkost wrote:
> > >
> > > The question is how the hypervisor could tell that to the guest.
>
On Mon, Jan 29, 2018 at 09:02:39PM +, David Woodhouse wrote:
>
>
> On Mon, 2018-01-29 at 12:44 -0800, Arjan van de Ven wrote:
> > On 1/29/2018 12:42 PM, Eduardo Habkost wrote:
> > >
> > > The question is how the hypervisor could tell that to the guest.
>
On Mon, Jan 29, 2018 at 08:17:02PM +, David Woodhouse wrote:
> On Mon, 2018-01-29 at 18:14 -0200, Eduardo Habkost wrote:
> >
> > Sorry for being confused here, as probably the answer is buried
> > on a LKML thread somewhere. The comment explains what the code
> &
On Mon, Jan 29, 2018 at 08:17:02PM +, David Woodhouse wrote:
> On Mon, 2018-01-29 at 18:14 -0200, Eduardo Habkost wrote:
> >
> > Sorry for being confused here, as probably the answer is buried
> > on a LKML thread somewhere. The comment explains what the code
> &
On Sat, Jan 20, 2018 at 08:22:56PM +0100, KarimAllah Ahmed wrote:
> From: David Woodhouse
>
> Not functional yet; just add the handling for it in the Spectre v2
> mitigation selection, and the X86_FEATURE_IBRS flag which will control
> the code to be added in later patches.
>
On Sat, Jan 20, 2018 at 08:22:56PM +0100, KarimAllah Ahmed wrote:
> From: David Woodhouse
>
> Not functional yet; just add the handling for it in the Spectre v2
> mitigation selection, and the X86_FEATURE_IBRS flag which will control
> the code to be added in later patches.
>
> Also take the
On Wed, Nov 29, 2017 at 04:42:16PM -0200, Eduardo Habkost wrote:
> On Wed, Nov 29, 2017 at 12:44:42PM +0100, Paolo Bonzini wrote:
> > On 29/11/2017 12:44, Eduardo Habkost wrote:
> > > On Mon, Nov 13, 2017 at 09:32:09AM +0100, Paolo Bonzini wrote:
> > >> On 13/1
On Wed, Nov 29, 2017 at 04:42:16PM -0200, Eduardo Habkost wrote:
> On Wed, Nov 29, 2017 at 12:44:42PM +0100, Paolo Bonzini wrote:
> > On 29/11/2017 12:44, Eduardo Habkost wrote:
> > > On Mon, Nov 13, 2017 at 09:32:09AM +0100, Paolo Bonzini wrote:
> > >> On 13/1
On Wed, Nov 29, 2017 at 09:10:47PM -0200, Eduardo Habkost wrote:
> On Wed, Nov 29, 2017 at 11:47:14PM +0100, Paolo Bonzini wrote:
> > On 29/11/2017 19:42, Eduardo Habkost wrote:
> > > The reproducer (not a full test case) is quite simple, see patch below.
> >
>
On Wed, Nov 29, 2017 at 09:10:47PM -0200, Eduardo Habkost wrote:
> On Wed, Nov 29, 2017 at 11:47:14PM +0100, Paolo Bonzini wrote:
> > On 29/11/2017 19:42, Eduardo Habkost wrote:
> > > The reproducer (not a full test case) is quite simple, see patch below.
> >
>
On Wed, Nov 29, 2017 at 11:47:14PM +0100, Paolo Bonzini wrote:
> On 29/11/2017 19:42, Eduardo Habkost wrote:
> > The reproducer (not a full test case) is quite simple, see patch below.
>
> Great, thanks. I assume that the patch doesn't fix it?!?
I was so convinced that it
On Wed, Nov 29, 2017 at 11:47:14PM +0100, Paolo Bonzini wrote:
> On 29/11/2017 19:42, Eduardo Habkost wrote:
> > The reproducer (not a full test case) is quite simple, see patch below.
>
> Great, thanks. I assume that the patch doesn't fix it?!?
I was so convinced that it
On Wed, Nov 29, 2017 at 12:44:42PM +0100, Paolo Bonzini wrote:
> On 29/11/2017 12:44, Eduardo Habkost wrote:
> > On Mon, Nov 13, 2017 at 09:32:09AM +0100, Paolo Bonzini wrote:
> >> On 13/11/2017 08:15, Wanpeng Li wrote:
> >>> 2017-11-10 17:49 GMT+08:00 Paol
On Wed, Nov 29, 2017 at 12:44:42PM +0100, Paolo Bonzini wrote:
> On 29/11/2017 12:44, Eduardo Habkost wrote:
> > On Mon, Nov 13, 2017 at 09:32:09AM +0100, Paolo Bonzini wrote:
> >> On 13/11/2017 08:15, Wanpeng Li wrote:
> >>> 2017-11-10 17:49 GMT+08:00 Paolo Bonzini :
On Mon, Nov 13, 2017 at 09:32:09AM +0100, Paolo Bonzini wrote:
> On 13/11/2017 08:15, Wanpeng Li wrote:
> > 2017-11-10 17:49 GMT+08:00 Paolo Bonzini :
> >> Sometimes, a processor might execute an instruction while another
> >> processor is updating the page tables for that
On Mon, Nov 13, 2017 at 09:32:09AM +0100, Paolo Bonzini wrote:
> On 13/11/2017 08:15, Wanpeng Li wrote:
> > 2017-11-10 17:49 GMT+08:00 Paolo Bonzini :
> >> Sometimes, a processor might execute an instruction while another
> >> processor is updating the page tables for that instruction's code page,
On Fri, Nov 04, 2016 at 10:57:27PM +0100, Paolo Bonzini wrote:
>
>
> On 04/11/2016 21:34, David Matlack wrote:
> > On Mon, Oct 31, 2016 at 6:37 PM, Kyle Huey wrote:
> >> + case MSR_PLATFORM_INFO:
> >> + /* cpuid faulting is supported */
> >> +
On Fri, Nov 04, 2016 at 10:57:27PM +0100, Paolo Bonzini wrote:
>
>
> On 04/11/2016 21:34, David Matlack wrote:
> > On Mon, Oct 31, 2016 at 6:37 PM, Kyle Huey wrote:
> >> + case MSR_PLATFORM_INFO:
> >> + /* cpuid faulting is supported */
> >> + msr_info->data =
On Thu, Jul 07, 2016 at 07:04:42PM +0200, Borislav Petkov wrote:
> On Thu, Jul 07, 2016 at 01:27:55PM -0300, Eduardo Habkost wrote:
> > You mean KVM kernel patches?
>
> No, other ones. Here's one example:
>
> https://lkml.kernel.org/r/1467633035-32080-2-git-send-email-
On Thu, Jul 07, 2016 at 07:04:42PM +0200, Borislav Petkov wrote:
> On Thu, Jul 07, 2016 at 01:27:55PM -0300, Eduardo Habkost wrote:
> > You mean KVM kernel patches?
>
> No, other ones. Here's one example:
>
> https://lkml.kernel.org/r/1467633035-32080-2-git-send-email-
On Thu, Jul 07, 2016 at 06:01:46PM +0200, Borislav Petkov wrote:
> On Thu, Jul 07, 2016 at 03:16:21PM +0200, Paolo Bonzini wrote:
> > Eduardo is the one to answer, but usually we add features to QEMU
> > before the processors are released (typically as soon as KVM supports
> > them). So with a
On Thu, Jul 07, 2016 at 06:01:46PM +0200, Borislav Petkov wrote:
> On Thu, Jul 07, 2016 at 03:16:21PM +0200, Paolo Bonzini wrote:
> > Eduardo is the one to answer, but usually we add features to QEMU
> > before the processors are released (typically as soon as KVM supports
> > them). So with a
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