The Marvell 88E6341 device is single-chip, 6-port Ethernet switch with
four integrated 10/100/1000Mbps Ethernet transceivers and one high speed
SerDes interfaces.
It belongs to the Topaz family and unlike the 88E6341 it does not have
a TCAM.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
The Marvell 88E6341 device is single-chip, 6-port Ethernet switch with
four integrated 10/100/1000Mbps Ethernet transceivers and one high speed
SerDes interfaces.
It belongs to the Topaz family and unlike the 88E6341 it does not have
a TCAM.
Signed-off-by: Gregory CLEMENT
---
drivers/net/dsa
Hi Chris,
On dim., janv. 29 2017, Chris Packham <chris.pack...@alliedtelesis.co.nz>
wrote:
> On 28/01/17 07:47, Stephen Boyd wrote:
>> On 01/27, Gregory CLEMENT wrote:
>>> Hi all,
>>>
>>> On ven., janv. 27 2017, Chris Packham <
Hi Chris,
On dim., janv. 29 2017, Chris Packham
wrote:
> On 28/01/17 07:47, Stephen Boyd wrote:
>> On 01/27, Gregory CLEMENT wrote:
>>> Hi all,
>>>
>>> On ven., janv. 27 2017, Chris Packham
>>> wrote:
>>>
>>>
us,rd-hold-ps = <0>;
> +
> + /* Write parameters */
> + devbus,sync-enable = <0>;
> + devbus,wr-high-ps = <6>;
> + devbus,wr-low-ps = <6>;
> + devbus,ale-wr-ps = <6>;
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + clock-frequency = <10>;
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> + num-cs = <1>;
> + marvell,nand-keep-config;
> + marvell,nand-enable-arbiter;
> + nand-on-flash-bbt;
> + nand-ecc-strength = <4>;
> + nand-ecc-step-size = <512>;
> +};
> +
> + {
> + status = "okay";
> +
> + spi-flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "m25p64";
> + reg = <0>; /* Chip select 0 */
> + spi-max-frequency = <2000>;
> + m25p,fast-read;
> +
> + partition@u-boot {
> + reg = <0x 0x0010>;
> + label = "u-boot";
> + };
> + partition@u-boot-env {
> + reg = <0x0010 0x0004>;
> + label = "u-boot-env";
> + };
> + partition@unused {
> + reg = <0x0014 0x00ec>;
> + label = "unused";
> + };
> +
> + };
> +};
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
s,badr-skew-ps = <0>;
> + devbus,acc-first-ps = <124000>;
> + devbus,acc-next-ps = <248000>;
> + devbus,rd-setup-ps = <0>;
> + devbus,rd-hold-ps = <0>;
> +
> + /* Write parameters */
> + devbus,sync-enable = <0>;
> + dev
r FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + * Contains definitions specific to the 98dx4521 SoC that are not
> + * common to all Armada XP SoCs.
> + */
> +
> +#include "armada-xp-98dx3236.dtsi"
> +
> +/ {
> + model = "Marvell 98DX4251 SoC";
> + compatible = "marvell,armadaxp-98dx4521", "marvell,armadaxp-98dx3236",
> "marvell,armadaxp", "marvell,armada-370-xp";
> +
> + cpus {
> + cpu@1 {
> + device_type = "cpu";
> + compatible = "marvell,sheeva-v7";
> + reg = <1>;
> + clocks = < 1>;
> + clock-latency = <100>;
> + };
> + };
> +
> + soc {
> + internal-regs {
> + resume@20980 {
> + compatible = "marvell,98dx3336-resume-ctrl";
> + reg = <0x20980 0x10>;
> + };
> + };
> + };
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + compatible = "marvell,98dx4251-pinctrl";
> +
> + sdio_pins: sdio-pins {
> + marvell,pins = "mpp5", "mpp6", "mpp7",
> +"mpp8", "mpp9", "mpp10";
> + marvell,function = "sd0";
> + };
> +};
> +
> + {
> + compatible = "marvell,prestera-98dx4251";
> +};
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
ributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
>
+}
> +
> +static const struct smp_operations mv98dx3236_smp_ops __initconst = {
> + .smp_init_cpus = armada_xp_smp_init_cpus,
> + .smp_prepare_cpus = armada_xp_smp_prepare_cpus,
> + .smp_boot_secondary = mv98dx3236_boot_secondary,
> + .smp_secondary_init = armada_xp_secondary_init,
> +#ifdef CONFIG_HOTPLUG_CPU
> + .cpu_die= armada_xp_cpu_die,
> + .cpu_kill = armada_xp_cpu_kill,
> +#endif
> +};
> +
> +CPU_METHOD_OF_DECLARE(mv98dx3236_smp, "marvell,98dx3236-smp",
> + _smp_ops);
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
deassert(hw_cpu);
> + if (ret) {
> + pr_warn("unable to boot CPU: %d\n", ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static const struct smp_operations mv98dx3236_smp_ops __initconst = {
> + .smp_init_cpus
e able to use other existing mmc DT bindings
> (perhaps also you need the brand new "mmc-ddr-3_3v"), instead of the
> "no-1-8-v".
OK I will try with this one. And if it works, I wonder if it worth
mentioning it as it is also part of the mmc binding.
Gregory
>
&
DT bindings
> (perhaps also you need the brand new "mmc-ddr-3_3v"), instead of the
> "no-1-8-v".
OK I will try with this one. And if it works, I wonder if it worth
mentioning it as it is also part of the mmc binding.
Gregory
>
> Kind regards
> Uffe
--
Hi,
On ven., janv. 27 2017, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> Hi all,
>
> On ven., janv. 27 2017, Chris Packham <chris.pack...@alliedtelesis.co.nz>
> wrote:
>
>> The 98DX3236, 98DX3336 and 98DX4251 are a set of switch ASICs
Hi,
On ven., janv. 27 2017, Gregory CLEMENT
wrote:
> Hi all,
>
> On ven., janv. 27 2017, Chris Packham
> wrote:
>
>> The 98DX3236, 98DX3336 and 98DX4251 are a set of switch ASICs with
>> integrated CPUs. They CPU block is common within these product lines a
he main benefit is when we try to have all
the device tree file of the same SoC we just have to parse the name of
the files.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
e just have to parse the name of
the files.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
t;0 0x 0 0x4000>; /* 1 GB */
> +};
> ++};
> +
> -+soc {
> -+ ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf100 0x10
> -+ MBUS_ID(0x01, 0x1d) 0 0 0xfff0 0x10
> -+ MBUS_ID(0x01, 0x2f) 0 0 0xf000 0x100
> -+ MBUS_ID(0x03, 0x00) 0 0 0xa800 0x400
> -+ MBUS_ID(0x08, 0x00) 0 0 0xac00 0x10>;
> -+
> -+devbus-bootcs {
> -+status = "okay";
> ++_bootcs {
> ++status = "okay";
> +
> -+/* Device Bus parameters are required */
> ++/* Device Bus parameters are required */
> +
> -+/* Read parameters */
> -+devbus,bus-width= <16>;
> -+devbus,turn-off-ps = <6>;
> -+devbus,badr-skew-ps = <0>;
> -+devbus,acc-first-ps = <124000>;
> -+devbus,acc-next-ps = <248000>;
> -+devbus,rd-setup-ps = <0>;
> -+devbus,rd-hold-ps = <0>;
> -+
> -+/* Write parameters */
> -+devbus,sync-enable = <0>;
> -+devbus,wr-high-ps = <6>;
> -+devbus,wr-low-ps = <6>;
> -+devbus,ale-wr-ps = <6>;
> -+};
> ++/* Read parameters */
> ++devbus,bus-width= <16>;
> ++devbus,turn-off-ps = <6>;
> ++devbus,badr-skew-ps = <0>;
> ++devbus,acc-first-ps = <124000>;
> ++devbus,acc-next-ps = <248000>;
> ++devbus,rd-setup-ps = <0>;
> ++devbus,rd-hold-ps = <0>;
> ++
> ++/* Write parameters */
> ++devbus,sync-enable = <0>;
> ++devbus,wr-high-ps = <6>;
> ++devbus,wr-low-ps = <6>;
> ++devbus,ale-wr-ps = <6>;
> ++};
> +
> -+internal-regs {
> -+serial@12000 {
> -+status = "okay";
> -+};
> -+serial@12100 {
> -+status = "okay";
> -+};
> ++ {
> ++status = "okay";
> ++};
> +
> -+i2c@11000 {
> -+clock-frequency = <10>;
> -+status = "okay";
> -+};
> ++ {
> ++status = "okay";
> ++};
> +
> -+mvsdio@d4000 {
> -+status = "disabled";
> -+};
> ++ {
> ++clock-frequency = <10>;
> ++status = "okay";
> ++};
> +
> -+nand@d {
> -+status = "okay";
> -+num-cs = <1>;
> -+marvell,nand-keep-config;
> -+marvell,nand-enable-arbiter;
> -+nand-on-flash-bbt;
> -+nand-ecc-strength = <4>;
> -+nand-ecc-step-size = <512>;
> -+};
> -+};
> -+};
> ++ {
> ++status = "okay";
> ++num-cs = <1>;
> ++marvell,nand-keep-config;
> ++marvell,nand-enable-arbiter;
> ++nand-on-flash-bbt;
> ++nand-ecc-strength = <4>;
> ++nand-ecc-step-size = <512>;
> +};
> +
> + {
>
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> @@ -1458,63 +1414,50 @@
> +device_type = "memory";
> +reg = <0 0x 0 0x4000>; /* 1 GB */
> +};
> ++};
> +
> -+soc {
>
boot.
> + */
> + ret = mvebu_cpu_reset_deassert(hw_cpu);
> + if (ret) {
> + pr_warn("unable to boot CPU: %d\n", ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static const struct smp_operations mv98dx3236_smp_ops __initconst = {
>
rn("unable to boot CPU: %d\n", ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static const struct smp_operations mv98dx3236_smp_ops __initconst = {
> + .smp_init_cpus = armada_xp_smp_init_cpus,
> + .smp_prepare_cpus = armada_xp_smp_prepare_cpus,
> + .smp_boot_secondary = mv98dx3236_boot_secondary,
> + .smp_secondary_init = armada_xp_secondary_init,
> +#ifdef CONFIG_HOTPLUG_CPU
> + .cpu_die= armada_xp_cpu_die,
> + .cpu_kill = armada_xp_cpu_kill,
> +#endif
> +};
> +
> +CPU_METHOD_OF_DECLARE(mv98dx3236_smp, "marvell,98dx3236-smp",
> + _smp_ops);
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
Hi Ulf,
On jeu., janv. 26 2017, Ulf Hansson <ulf.hans...@linaro.org> wrote:
> On 11 January 2017 at 18:19, Gregory CLEMENT
> <gregory.clem...@free-electrons.com> wrote:
>> From: Hu Ziji <huz...@marvell.com>
>>
>> Marvell Xenon SDHC can support eMMC
Hi Ulf,
On jeu., janv. 26 2017, Ulf Hansson wrote:
> On 11 January 2017 at 18:19, Gregory CLEMENT
> wrote:
>> From: Hu Ziji
>>
>> Marvell Xenon SDHC can support eMMC/SD/SDIO.
>> Add Xenon-specific properties.
>> Also add properties for Xenon PHY s
t;dev", "bootcs0", V_98DX3236_PLUS)),
> + MPP_VAR_FUNCTION(0x4, "dev", "bootcs", V_98DX3236_PLUS)),
> MPP_MODE(6,
>MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS),
>MPP_VAR_FUNCTION(0x2, "sd0", "clk", V_98DX4251),
> @@ -442,7 +442,8 @@ static struct mvebu_mpp_mode mv98dx3236_mpp_modes[] = {
>MPP_VAR_FUNCTION(0x3, "uart1", "txd", V_98DX3236_PLUS)),
> MPP_MODE(19,
>MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS),
> - MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V_98DX3236_PLUS)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V_98DX3236_PLUS),
> + MPP_VAR_FUNCTION(0x4, "dev", "rb", V_98DX3236_PLUS)),
> MPP_MODE(20,
>MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS),
>MPP_VAR_FUNCTION(0x4, "dev", "we0", V_98DX3236_PLUS)),
> @@ -548,7 +549,7 @@ static struct mvebu_mpp_ctrl mv98dx3236_mpp_controls[] = {
> };
>
> static struct pinctrl_gpio_range mv98dx3236_mpp_gpio_ranges[] = {
> - MPP_GPIO_RANGE(0, 0, 0, 32),
> + MPP_GPIO_RANGE(0, 0, 0, 32),
> };
>
> static int armada_xp_pinctrl_suspend(struct platform_device *pdev,
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
, V_98DX3236_PLUS)),
> + MPP_VAR_FUNCTION(0x4, "dev", "bootcs", V_98DX3236_PLUS)),
> MPP_MODE(6,
>MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS),
>MPP_VAR_FUNCTION(0x2, "sd0", "clk", V_98DX4251),
> @@ -442,7 +442,8 @@ static struct mvebu_mpp_mode mv98dx3236_mpp_modes[] = {
>MPP_VAR_FUNCTION(0x3, "uart1", "txd", V_98DX3236_PLUS)),
> MPP_MODE(19,
>MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS),
> - MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V_98DX3236_PLUS)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V_98DX3236_PLUS),
> + MPP_VAR_FUNCTION(0x4, "dev", "rb", V_98DX3236_PLUS)),
> MPP_MODE(20,
>MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS),
>MPP_VAR_FUNCTION(0x4, "dev", "we0", V_98DX3236_PLUS)),
> @@ -548,7 +549,7 @@ static struct mvebu_mpp_ctrl mv98dx3236_mpp_controls[] = {
> };
>
> static struct pinctrl_gpio_range mv98dx3236_mpp_gpio_ranges[] = {
> - MPP_GPIO_RANGE(0, 0, 0, 32),
> + MPP_GPIO_RANGE(0, 0, 0, 32),
> };
>
> static int armada_xp_pinctrl_suspend(struct platform_device *pdev,
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
status = "okay";
> + };
> +
> + mvsdio@d4000 {
> + status = "disabled";
> + };
> +
> + nand@d {
> + status = "okay";
> +
t; +
> + nand@d {
> + status = "okay";
> + num-cs = <1>;
> + marvell,nand-keep-config;
> + marvell,nand-enable-arbiter;
> + nand-on-flash-bbt;
> + nand-ecc-strength = <4>;
> + nand-ecc-step-size = <512>;
> + };
> + };
> + };
> +};
> +
> + {
> + status = "okay";
> +
> + spi-flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "m25p64";
> + reg = <0>; /* Chip select 0 */
> + spi-max-frequency = <2000>;
> + m25p,fast-read;
> +
> + partition@u-boot {
> + reg = <0x 0x0010>;
> + label = "u-boot";
> + };
> + partition@u-boot-env {
> + reg = <0x0010 0x0004>;
> + label = "u-boot-env";
> + };
> + partition@unused {
> + reg = <0x0014 0x00ec>;
> + label = "unused";
> + };
> +
> + };
> +};
> --
> 2.11.0.24.ge6920cf
>
>
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
riction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
&g
et. There is currently
> a bug in the mv88e6390 support code. I also set it to 15s. But in fact
> it is 3.75 seconds. The 6341 might also use 3.75 seconds.
When I read your series I also thought about it and indeed it is 3.75
seconds. I will fix it.
Thanks,
Gregory
>
>Thanks
>
g in the mv88e6390 support code. I also set it to 15s. But in fact
> it is 3.75 seconds. The 6341 might also use 3.75 seconds.
When I read your series I also thought about it and indeed it is 3.75
seconds. I will fix it.
Thanks,
Gregory
>
>Thanks
> Andrew
--
Gregory Cl
Hi Andrew,
On mar., janv. 24 2017, Andrew Lunn <and...@lunn.ch> wrote:
> On Tue, Jan 24, 2017 at 09:10:26PM +0100, Gregory CLEMENT wrote:
>> The PHY with the ID 0x1410C00
>
> :-(
>
> I don't have a better reference, but
> Linux/Documentation/devicetree/bind
Hi Andrew,
On mar., janv. 24 2017, Andrew Lunn wrote:
> On Tue, Jan 24, 2017 at 09:10:26PM +0100, Gregory CLEMENT wrote:
>> The PHY with the ID 0x1410C00
>
> :-(
>
> I don't have a better reference, but
> Linux/Documentation/devicetree/bindings/net/phy.txt says
Hi,
On mar., janv. 24 2017, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> From: Romain Perier <romain.per...@free-electrons.com>
>
> Some Marvell ethernet switches have internal ethernet transceivers with
> hardcoded phy addresses. These addre
Hi,
On mar., janv. 24 2017, Gregory CLEMENT
wrote:
> From: Romain Perier
>
> Some Marvell ethernet switches have internal ethernet transceivers with
> hardcoded phy addresses. These addresses can be greater than the number
> of ports or its value might be different than the
The Marvell 88E6341 device is single-chip, 6-port Ethernet switch with
four integrated 10/100/1000Mbps Ethernet transceivers and one high speed
SerDes interfaces.
It belongs to the Topaz family and unlike the 88E6341 it does not have
a TCAM.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
The PHY with the ID 0x1410C00 can be found embedded in the Marvell Topaz
switches (88E6141/88E6341). It is compatible with the 88E1510 (at least for
the temperature information), so add support for it, using the 88E1510
specific functions.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
The Marvell 88E6341 device is single-chip, 6-port Ethernet switch with
four integrated 10/100/1000Mbps Ethernet transceivers and one high speed
SerDes interfaces.
It belongs to the Topaz family and unlike the 88E6341 it does not have
a TCAM.
Signed-off-by: Gregory CLEMENT
---
drivers/net/dsa
The PHY with the ID 0x1410C00 can be found embedded in the Marvell Topaz
switches (88E6141/88E6341). It is compatible with the 88E1510 (at least for
the temperature information), so add support for it, using the 88E1510
specific functions.
Signed-off-by: Gregory CLEMENT
---
drivers/net/phy
,
Gregory
Changelog:
v5 -> v6:
- rebased on net-next/master (d140199af510)
- Fix the redundant check on mv88e6xxx_6341_family (reported by Julia
Lawall)
- Add support for the 88E6141
- Move support for temperature sensor in the phy part
Gregory CLEMENT (3):
net: dsa: mv88e6xxx: Add supp
,
Gregory
Changelog:
v5 -> v6:
- rebased on net-next/master (d140199af510)
- Fix the redundant check on mv88e6xxx_6341_family (reported by Julia
Lawall)
- Add support for the 88E6141
- Move support for temperature sensor in the phy part
Gregory CLEMENT (3):
net: dsa: mv88e6xxx: Add supp
for this switch by describing its
capabilities to the driver and introducing a new family.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/dsa/mv88e6xxx/chip.c | 54 ++--
drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | 19 +-
2
;and...@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/dsa/mv88e6xxx/chip.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index c7e08e13bb54..7d942f8a42a7 100644
--- a/d
for this switch by describing its
capabilities to the driver and introducing a new family.
Signed-off-by: Gregory CLEMENT
---
drivers/net/dsa/mv88e6xxx/chip.c | 54 ++--
drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | 19 +-
2 files changed, 69 insertions(+), 4 deletions
ports and internal
Port 1 to Port4 PHYs mapped at SMI addresses from 0x11 to 0x14.
This commits fixes the issue by removing the condition in MDIO callbacks.
Signed-off-by: Romain Perier
Reviewed-by: Andrew Lunn
Signed-off-by: Gregory CLEMENT
---
drivers/net/dsa/mv88e6xxx/chip.c | 6 --
1 file
Hi David,
On ven., janv. 20 2017, David Miller <da...@davemloft.net> wrote:
> From: Gregory CLEMENT <gregory.clem...@free-electrons.com>
> Date: Thu, 19 Jan 2017 22:49:32 +0100
>
>> I created a new family for this switch and filled the ops structure
>>
Hi David,
On ven., janv. 20 2017, David Miller wrote:
> From: Gregory CLEMENT
> Date: Thu, 19 Jan 2017 22:49:32 +0100
>
>> I created a new family for this switch and filled the ops structure
>> by selecting which seems the more appropriate functions. I rebased
>
Hi Vvien and Andrew,
On ven., janv. 20 2017, Andrew Lunn <and...@lunn.ch> wrote:
> On Thu, Jan 19, 2017 at 05:26:03PM -0500, Vivien Didelot wrote:
>> Gregory CLEMENT <gregory.clem...@free-electrons.com> writes:
>>
>> > +static bool mv88e6xxx_634
Hi Vvien and Andrew,
On ven., janv. 20 2017, Andrew Lunn wrote:
> On Thu, Jan 19, 2017 at 05:26:03PM -0500, Vivien Didelot wrote:
>> Gregory CLEMENT writes:
>>
>> > +static bool mv88e6xxx_6341_family(struct mv88e6xxx_chip *chip)
>> > +{
he same here. I've mostly been working on where the 6390 is
> different. Where it is the same i've mostly ignored it so far :-)
>
> There is also an ongoing effort to remove all these big if statements
> with a list of families.
Thanks for this answers I understand it a little bett
I've mostly been working on where the 6390 is
> different. Where it is the same i've mostly ignored it so far :-)
>
> There is also an ongoing effort to remove all these big if statements
> with a list of families.
Thanks for this answers I understand it a little better now.
Gregory
>
> Andrew
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
t 2-3 releases we may consider removing the old DSA binding entirely
>> from the kernel.
>
> Gregory, all patches have been reviewed/tested now, can you take this
> for an upcoming 4.11 pull request? Thanks!
All the series applied on mvebu/dt
Thanks,
Gregory
> --
> Florian
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
nsider removing the old DSA binding entirely
>> from the kernel.
>
> Gregory, all patches have been reviewed/tested now, can you take this
> for an upcoming 4.11 pull request? Thanks!
All the series applied on mvebu/dt
Thanks,
Gregory
> --
> Florian
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
;and...@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/dsa/mv88e6xxx/chip.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 987b2dbbd35a..d1960ae0a618 100644
--- a/d
ports and internal
Port 1 to Port4 PHYs mapped at SMI addresses from 0x11 to 0x14.
This commits fixes the issue by removing the condition in MDIO callbacks.
Signed-off-by: Romain Perier
Reviewed-by: Andrew Lunn
Signed-off-by: Gregory CLEMENT
---
drivers/net/dsa/mv88e6xxx/chip.c | 6 --
1 file
for this switch by describing its
capabilities to the driver and introducing a new family.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/net/dsa/mv88e6xxx/chip.c | 55 +--
drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | 21 ++
for this switch by describing its
capabilities to the driver and introducing a new family.
Signed-off-by: Gregory CLEMENT
---
drivers/net/dsa/mv88e6xxx/chip.c | 55 +--
drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | 21 -
2 files changed, 72 insertions(+), 4
ame.
Thanks,
Gregory
Gregory CLEMENT (1):
net: dsa: mv88e6xxx: Add support for ethernet switch 88E6341
Romain Perier (1):
net: dsa: mv88e6xxx: Don't forbid MDIO I/Os for PHY addr >=
num_of_ports
drivers/net/dsa/mv88e6xxx/chip.c | 61 +--
drivers/n
ame.
Thanks,
Gregory
Gregory CLEMENT (1):
net: dsa: mv88e6xxx: Add support for ethernet switch 88E6341
Romain Perier (1):
net: dsa: mv88e6xxx: Don't forbid MDIO I/Os for PHY addr >=
num_of_ports
drivers/net/dsa/mv88e6xxx/chip.c | 61 +--
drivers/n
arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts | 49 +++
>> arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts| 11 +
>> arch/arm/boot/dts/kirkwood-rd88f6281.dtsi | 44 +
>> 9 files changed, 415 insertions(+), 1 deletion(-)
>>
>
>
> --
> Florian
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
dts/kirkwood-mv88f6281gtw-ge.dts | 49 +++++++
>> arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts| 11 +
>> arch/arm/boot/dts/kirkwood-rd88f6281.dtsi | 44 +
>> 9 files changed, 415 insertions(+), 1 deletion(-)
>>
>
>
> --
> Florian
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
Hi Russell King,
On ven., janv. 13 2017, Russell King - ARM Linux <li...@armlinux.org.uk> wrote:
> On Fri, Jan 13, 2017 at 05:36:42PM +0100, Gregory CLEMENT wrote:
>> Hi Sebastian,
>>
>> On lun., janv. 09 2017, Bhumika Goyal <bhumi...@gmail.com> wrote:
&
Hi Russell King,
On ven., janv. 13 2017, Russell King - ARM Linux wrote:
> On Fri, Jan 13, 2017 at 05:36:42PM +0100, Gregory CLEMENT wrote:
>> Hi Sebastian,
>>
>> On lun., janv. 09 2017, Bhumika Goyal wrote:
>>
>> > Declare reset_control_ops as cons
+ b/arch/arm/mach-mv78xx0/pcie.c
> @@ -29,7 +29,7 @@ struct pcie_port {
> u8 root_bus_nr;
> void __iomem*base;
> spinlock_t conf_lock;
> - charmem_space_name[16];
> + charmem_spac
/pcie.c
> @@ -29,7 +29,7 @@ struct pcie_port {
> u8 root_bus_nr;
> void __iomem*base;
> spinlock_t conf_lock;
> - charmem_space_name[16];
> + charmem_space_name[20];
> struct resource
tic struct reset_control_ops pmu_reset_ops = {
> +static const struct reset_control_ops pmu_reset_ops = {
> .reset = pmu_reset_reset,
> .assert = pmu_reset_assert,
> .deassert = pmu_reset_deassert,
> --
> 1.9.1
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
+static const struct reset_control_ops pmu_reset_ops = {
> .reset = pmu_reset_reset,
> .assert = pmu_reset_assert,
> .deassert = pmu_reset_deassert,
> --
> 1.9.1
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
From: Hu Ziji <huz...@marvell.com>
Export sdhci_enable_sdio_irq() from sdhci.c.
Thus vendor SDHC driver can implement its specific SDIO irq
control.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/mm
From: Hu Ziji <huz...@marvell.com>
Export sdhci_start_signal_voltage_switch() from sdhci.c.
Thus vendor sdhci driver can implement its own signal voltage
switch routine.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.co
From: Hu Ziji <huz...@marvell.com>
Export sdhci_set_ios() in sdhci.c.
Thus vendor sdhci driver can implement its own set_ios() routine.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/mmc/host/sdhci.
From: Hu Ziji
Export sdhci_enable_sdio_irq() from sdhci.c.
Thus vendor SDHC driver can implement its specific SDIO irq
control.
Signed-off-by: Hu Ziji
Signed-off-by: Gregory CLEMENT
---
drivers/mmc/host/sdhci.c | 3 ++-
drivers/mmc/host/sdhci.h | 1 +
2 files changed, 3 insertions(+), 1
From: Hu Ziji
Export sdhci_start_signal_voltage_switch() from sdhci.c.
Thus vendor sdhci driver can implement its own signal voltage
switch routine.
Signed-off-by: Hu Ziji
Signed-off-by: Gregory CLEMENT
---
drivers/mmc/host/sdhci.c | 5 +++--
drivers/mmc/host/sdhci.h | 2 ++
2 files changed
From: Hu Ziji
Export sdhci_set_ios() in sdhci.c.
Thus vendor sdhci driver can implement its own set_ios() routine.
Signed-off-by: Hu Ziji
Signed-off-by: Gregory CLEMENT
---
drivers/mmc/host/sdhci.c | 3 ++-
drivers/mmc/host/sdhci.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff
Xenon SDHC conforms to SD Physical Layer Specification
Version 3.01 and is designed according to the guidelines provided
in the SD Host Controller Standard Specification Version 3.00.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Tested-by: Russell King <rmk+ker...@armlinux.org.uk>
Sign
From: Hu Ziji <huz...@marvell.com>
Add maintainer entry for Marvell Xenon eMMC/SD/SDIO
Host Controller drivers.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
MAINTAINERS | 7 +++
1 file changed, 7 i
Physical Layer Specification
Version 3.01 and is designed according to the guidelines provided
in the SD Host Controller Standard Specification Version 3.00.
Signed-off-by: Hu Ziji
Tested-by: Russell King
Signed-off-by: Gregory CLEMENT
---
drivers/mmc/host/Kconfig | 9 +-
drivers/mmc/host
From: Hu Ziji
Add maintainer entry for Marvell Xenon eMMC/SD/SDIO
Host Controller drivers.
Signed-off-by: Hu Ziji
Signed-off-by: Gregory CLEMENT
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index cfff2c9e3d94..f4fea77165d5 100644
ot; Changes in V2:
rebase on v4.9-rc2.
Re-write Xenon bindings. Ajust Xenon DT property naming.
Add a new DT property to indicate eMMC card type, instead of using
variable card_candidate.
Clear quirks SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 in Xenon platform data
Add support to HS400 retuni
ot; Changes in V2:
rebase on v4.9-rc2.
Re-write Xenon bindings. Ajust Xenon DT property naming.
Add a new DT property to indicate eMMC card type, instead of using
variable card_candidate.
Clear quirks SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 in Xenon platform data
Add support to HS400 retuni
lement Xenon PHY in MMC host directory.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Tested-by: Russell King <rmk+ker...@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/mmc/host/Makefile | 2 +-
drivers/mmc/host
m>
Tested-by: Russell King <rmk+ker...@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/mmc/host/sdhci-xenon-phy.c | 116 +-
drivers/mmc/host/sdhci-xenon.c | 2 +-
drivers/mmc/host/sdhci-xenon.h | 2
Add the eMMC support for Armada 37xx SoC and enable it in the Armada 3720
DB board.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 16
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 11
lt;han...@marvell.com>
[fixed up conflicts, added error handling --rmk]
Signed-off-by: Russell King <rmk+ker...@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 3 ++-
drivers/clk/mv
This patch enables the driver for the SDHCI controller found on the
Marvell Armada 3700 and 7K/8K ARM64 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defco
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 3 ++-
drivers/clk/mvebu/ap806-system-controller.c | 15 ++-
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
b/arch/arm64/boot/dts/marvell
This patch enables the driver for the SDHCI controller found on the
Marvell Armada 3700 and 7K/8K ARM64 SoCs.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index
From: Hu Ziji
Some SoCs have PHY PAD outside Xenon IP.
PHY PAD voltage should match signalling voltage in use.
Add generic SoC PHY PAD voltage control interface.
Implement Aramda-3700 SoC PHY PAD voltage control.
Signed-off-by: Hu Ziji
Tested-by: Russell King
Signed-off-by: Gregory CLEMENT
Add the eMMC support for Armada 37xx SoC and enable it in the Armada 3720
DB board.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 16
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 11 +++
2 files changed, 27 insertions(+)
diff
directory.
Signed-off-by: Hu Ziji
Tested-by: Russell King
Signed-off-by: Gregory CLEMENT
---
drivers/mmc/host/Makefile | 2 +-
drivers/mmc/host/sdhci-xenon-phy.c | 790 ++-
drivers/mmc/host/sdhci-xenon.c | 3 +-
drivers/mmc/host/sdhci-xenon.h
Also enable it on the Armada 7040 DB board
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-7040-db.dts | 14 +-
arch/arm64/boot/dts/marvell/armada-ap806.dtsi| 10 +-
arch/arm64/boot/dts/marvell/
Also enable it on the Armada 7040 DB board
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-7040-db.dts | 14 +-
arch/arm64/boot/dts/marvell/armada-ap806.dtsi| 10 +-
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 11 ++-
3
From: Hu Ziji <huz...@marvell.com>
Marvell Xenon SDHC can support eMMC/SD/SDIO.
Add Xenon-specific properties.
Also add properties for Xenon PHY setting.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
Docume
From: Hu Ziji
Marvell Xenon SDHC can support eMMC/SD/SDIO.
Add Xenon-specific properties.
Also add properties for Xenon PHY setting.
Signed-off-by: Hu Ziji
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.txt | 197 +++-
1 file changed, 197
Hi Florian,
On mer., janv. 04 2017, Florian Fainelli <f.faine...@gmail.com> wrote:
> On 01/04/2017 09:23 AM, Gregory CLEMENT wrote:
>> Hi Florian,
>>
>> On lun., janv. 02 2017, Florian Fainelli <f.faine...@gmail.com> wrote:
>>
>>> Uti
Hi Florian,
On mer., janv. 04 2017, Florian Fainelli wrote:
> On 01/04/2017 09:23 AM, Gregory CLEMENT wrote:
>> Hi Florian,
>>
>> On lun., janv. 02 2017, Florian Fainelli wrote:
>>
>>> Utilize the new DSA binding, introduced with commit 8c5ad1d6179d
defconfig | 2 +-
> arch/arm/configs/multi_v5_defconfig | 2 +-
> arch/arm/configs/multi_v7_defconfig | 2 +-
> arch/arm/configs/mvebu_v5_defconfig | 2 +-
For this file:
Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Gregory
>
_defconfig | 2 +-
> arch/arm/configs/multi_v7_defconfig | 2 +-
> arch/arm/configs/mvebu_v5_defconfig | 2 +-
For this file:
Acked-by: Gregory CLEMENT
Gregory
> arch/arm/configs/pxa_defconfig| 2 +-
> arch/arm/configs/shmobile_defconfig | 2 +-
&
resses are hexadecimal, which is why this was
> chosen here, but I really don't mind changing that.
And what about using:
reg = <0x10>;
Gregory
> --
> Florian
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
y this was
> chosen here, but I really don't mind changing that.
And what about using:
reg = <0x10>;
Gregory
> --
> Florian
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
0);
> + if (WARN_ON(!base))
> + return;
> +
> + of_node_put(dfx_node);
> +
> + parent_name = of_clk_get_parent_name(node, 0);
> +
> + clk_data.clk_num = 1;
> +
> + /* clks holds the clock array */
> + clks = kcalloc(clk_data.clk_num, siz
t_name = of_clk_get_parent_name(node, 0);
> +
> + clk_data.clk_num = 1;
> +
> + /* clks holds the clock array */
> + clks = kcalloc(clk_data.clk_num, sizeof(struct clk *),
> + GFP_KERNEL);
> + if (WARN_ON(!clks))
> + goto err_unmap;
> + /* corediv holds the clock specific array */
> + corediv = kcalloc(clk_data.clk_num, sizeof(struct clk_corediv),
> + GFP_KERNEL);
> + if (WARN_ON(!corediv))
> + goto err_free_clks;
> +
> + spin_lock_init(>lock);
> +
> + of_property_read_string_index(node, "clock-output-names",
> + 0, _name);
> +
> + init.num_parents = 1;
> + init.parent_names = _name;
> + init.name = clk_name;
> + init.ops =
> + init.flags = 0;
> +
> + corediv[0].reg = (void *)((int)base + be32_to_cpu(*off));
> + corediv[0].hw.init =
> +
> + clks[0] = clk_register(NULL, [0].hw);
> + WARN_ON(IS_ERR(clks[0]));
> +
> + clk_data.clks = clks;
> + of_clk_add_provider(node, of_clk_src_onecell_get, _data);
> + return;
> +
> +err_free_clks:
> + kfree(clks);
> +err_unmap:
> + iounmap(base);
> +}
> +
> +CLK_OF_DECLARE(mv98dx3236_corediv_clk, "marvell,mv98dx3236-corediv-clock",
> +mv98dx3236_corediv_clk_init);
> --
> 2.11.0.24.ge6920cf
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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