RE: [EXT] [PATCH] spi: spi-fsl-qspi: Clear TDH bits in FLSHCR register

> -Original Message- > From: Schrempf Frieder > Sent: Monday, October 7, 2019 2:23 AM > To: Han Xu ; Mark Brown > Cc: Schrempf Frieder ; sta...@vger.kernel.org; > linux-...@vger.kernel.org; linux-kernel@vger.kernel.org > Subject: [EXT] [PATCH] spi: spi-fsl

RE: [PATCH] spi: spi-fsl-qspi: Introduce variable to fix different invalid master Id

> -Original Message- > From: Kuldeep Singh > Sent: Tuesday, October 1, 2019 3:59 AM > To: Han Xu ; broo...@kernel.org; linux-...@vger.kernel.org; > linux-kernel@vger.kernel.org > Cc: Kuldeep Singh ; Suresh Gupta > > Subject: [PATCH] spi: spi-fsl-qspi: I

RE: [EXT] Re: [PATCH 1/3] spi: spi-nxp-fspi: dynamically alloc AHB memory for FSPI

> -Original Message- > From: Mark Brown > Sent: Thursday, July 11, 2019 7:41 AM > To: Han Xu > Cc: Ashish Kumar ; linux-...@vger.kernel.org; linux- > ker...@vger.kernel.org; dl-linux-imx > Subject: Re: [EXT] Re: [PATCH 1/3] spi: spi-nxp-fspi: dynamicall

RE: [EXT] Re: [PATCH 1/3] spi: spi-nxp-fspi: dynamically alloc AHB memory for FSPI

> -Original Message- > From: Mark Brown > Sent: Wednesday, July 10, 2019 10:16 AM > To: Han Xu > Cc: Ashish Kumar ; linux-...@vger.kernel.org; linux- > ker...@vger.kernel.org; dl-linux-imx > Subject: [EXT] Re: [PATCH 1/3] spi: spi-nxp-fspi: dynamically alloc

[PATCH 0/3] dynamically alloc AHB memory

From: Han Xu i.MX platforms reserved 256M memory area for FSPI/QSPI AHB memory, it may failed to alloc all of them at once on some platforms. These patches allow the controller alloc AHB as needed. i.MX7D RX FIFO should be 128B rather than 512B. Han Xu (3): spi: spi-nxp-fspi: dynamically

[PATCH 3/3] spi: spi-fsl-qspi: dynamically alloc AHB memory for QSPI

From: Han Xu dynamically alloc AHB memory for QSPI controller. Signed-off-by: Han Xu --- drivers/spi/spi-fsl-qspi.c | 58 +++--- 1 file changed, 42 insertions(+), 16 deletions(-) diff --git a/drivers/spi/spi-fsl-qspi.c b/drivers/spi/spi-fsl-qspi.c index

[PATCH 1/3] spi: spi-nxp-fspi: dynamically alloc AHB memory for FSPI

From: Han Xu dynamically alloc AHB memory for FSPI controller Signed-off-by: Han Xu --- drivers/spi/spi-nxp-fspi.c | 39 ++ 1 file changed, 31 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c index

[PATCH 2/3] spi: spi-fsl-qspi: change i.MX7D RX FIFO size

From: Han Xu The RX FIFO should be 128 byte rather than 512 byte. It's a typo on reference manual. Signed-off-by: Han Xu --- drivers/spi/spi-fsl-qspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-fsl-qspi.c b/drivers/spi/spi-fsl-qspi.c index

RE: [EXT] Re: [PATCH] mtd: spi-nor: Add prep/unprep for spi_nor_resume

> -Original Message- > From: tudor.amba...@microchip.com > Sent: Thursday, June 6, 2019 12:46 AM > To: Han Xu ; cyrille.pitc...@wedev4u.fr; > marek.va...@gmail.com > Cc: boris.brezil...@free-electrons.com; f.faine...@gmail.com; > kdasu.k...@gmail.com; rich...

[PATCH] mtd: spi-nor: Add prep/unprep for spi_nor_resume

In the new implemented spi_nor_resume function, the spi_nor_init() should be braced by prep/unprep functions._ Signed-off-by: Han Xu --- drivers/mtd/spi-nor/spi-nor.c | 8 include/linux/mtd/spi-nor.h | 1 + 2 files changed, 9 insertions(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c

RE: [PATCH v2] mtd: rawnand: gpmi: fix MX28 bus master lockup problem

> -Original Message- > From: Martin Kepplinger > Sent: Tuesday, February 5, 2019 9:53 AM > To: Han Xu ; bbrezil...@kernel.org; > miquel.ray...@bootlin.com; rich...@nod.at; dw...@infradead.org; > computersforpe...@gmail.com; marek.va...@gmail.com; linux- > m...@lis

RE: [PATCH v7 3/9] spi: Add a driver for the Freescale/NXP QuadSPI controller

> -Original Message- > From: Schrempf Frieder > Sent: Tuesday, December 4, 2018 8:15 AM > To: linux-...@lists.infradead.org; boris.brezil...@bootlin.com; linux- > s...@vger.kernel.org; Marek Vasut ; Mark Brown > ; Han Xu > Cc: dw...@infradead.org; computersforpe

RE: [PATCH v7 6/9] mtd: fsl-quadspi: Remove the driver as it was replaced by spi-fsl-qspi.c

..@nod.at; miquel.ray...@bootlin.com; broo...@kernel.org; David > Wolfe ; Fabio Estevam ; > Prabhakar Kushwaha ; Yogesh Narayan > Gaur ; Han Xu ; > shawn...@kernel.org; Schrempf Frieder ; > linux-kernel@vger.kernel.org > Subject: [PATCH v7 6/9] mtd: fsl-quadspi: Remove the driver

RE: [PATCH v6 3/9] spi: Add a driver for the Freescale/NXP QuadSPI controller

> -Original Message- > From: Schrempf Frieder > Sent: Thursday, November 29, 2018 11:36 AM > To: Han Xu ; Yogesh Narayan Gaur > ; linux-...@lists.infradead.org; > boris.brezil...@bootlin.com; linux-...@vger.kernel.org; Marek Vasut > ; Mark Brown >

RE: [PATCH v6 3/9] spi: Add a driver for the Freescale/NXP QuadSPI controller

> -Original Message- > From: Schrempf Frieder > Sent: Thursday, November 29, 2018 11:36 AM > To: Han Xu ; Yogesh Narayan Gaur > ; linux-...@lists.infradead.org; > boris.brezil...@bootlin.com; linux-...@vger.kernel.org; Marek Vasut > ; Mark Brown >

RE: [PATCH v6 3/9] spi: Add a driver for the Freescale/NXP QuadSPI controller

> -Original Message- > From: Schrempf Frieder > Sent: Thursday, November 29, 2018 5:54 AM > To: Yogesh Narayan Gaur ; linux- > m...@lists.infradead.org; boris.brezil...@bootlin.com; linux- > s...@vger.kernel.org; Marek Vasut ; Mark Brown > ; Han Xu >

RE: [PATCH v6 3/9] spi: Add a driver for the Freescale/NXP QuadSPI controller

> -Original Message- > From: Schrempf Frieder > Sent: Thursday, November 29, 2018 5:54 AM > To: Yogesh Narayan Gaur ; linux- > m...@lists.infradead.org; boris.brezil...@bootlin.com; linux- > s...@vger.kernel.org; Marek Vasut ; Mark Brown > ; Han Xu >

Re: [PATCH v2 2/2] dt-bindings: mtd: rawnand: gpmi: document specific ECC strength

ECC step. The driver > + supports 512 and 1024. > > The device tree may optionally contain sub-nodes describing partitions of > the > address space. See partition.txt for more detail. > Acked-by: Han Xu <han...@nxp.com>

Re: [PATCH v2 2/2] dt-bindings: mtd: rawnand: gpmi: document specific ECC strength

supports 512 and 1024. > > The device tree may optionally contain sub-nodes describing partitions of > the > address space. See partition.txt for more detail. > Acked-by: Han Xu

Re: [PATCH v2 1/2] mtd: rawnand: gpmi: add support for specific ECC strength

+ || legacy_set_geometry(this)) { > + if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0)) > + return -EINVAL; > + > + return set_geometry_by_ecc_info(this, chip->ecc_strength_ds, > + chip->ecc_step_ds); > + } > > return 0; > } > Acked-by: Han Xu <han...@nxp.com>

Re: [PATCH v2 1/2] mtd: rawnand: gpmi: add support for specific ECC strength

|| legacy_set_geometry(this)) { > + if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0)) > + return -EINVAL; > + > + return set_geometry_by_ecc_info(this, chip->ecc_strength_ds, > + chip->ecc_step_ds); > + } > > return 0; > } > Acked-by: Han Xu

Re: [PATCH 2/2] mtd: nand: gpmi: add support for specific ECC strength

On 02/06/2018 11:40 AM, Stefan Agner wrote: > Add support for specified ECC strength/size using device tree > properties nand-ecc-strength/nand-ecc-step-size. > > Signed-off-by: Stefan Agner > --- > .../devicetree/bindings/mtd/gpmi-nand.txt | 5 >

Re: [PATCH 2/2] mtd: nand: gpmi: add support for specific ECC strength

On 02/06/2018 11:40 AM, Stefan Agner wrote: > Add support for specified ECC strength/size using device tree > properties nand-ecc-strength/nand-ecc-step-size. > > Signed-off-by: Stefan Agner > --- > .../devicetree/bindings/mtd/gpmi-nand.txt | 5 >

Re: [PATCH] mtd: nand: gpmi: replace _manual_ swap with swap macro

From: Gustavo A. R. Silva <garsi...@embeddedor.com> Sent: Friday, November 3, 2017 3:31 PM To: Han Xu; Boris Brezillon; Richard Weinberger; David Woodhouse; Brian Norris; Marek Vasut; Cyrille Pitchen Cc: linux-...@lists.infradead.org; linux-

Re: [PATCH] mtd: nand: gpmi: replace _manual_ swap with swap macro

From: Gustavo A. R. Silva Sent: Friday, November 3, 2017 3:31 PM To: Han Xu; Boris Brezillon; Richard Weinberger; David Woodhouse; Brian Norris; Marek Vasut; Cyrille Pitchen Cc: linux-...@lists.infradead.org; linux-kernel@vger.kernel.org; Gustavo A. R

Re: [PATCH] mtd: gpmi-nand: do not fail setting ONFI timing mode if available

On 07/13/2017 03:15 PM, Boris Brezillon wrote: > Hi Miquel, > > Le Thu, 13 Jul 2017 21:20:30 +0200, > Miquel Raynal a écrit : > >> GPMI NFC driver fails to apply timing mode if the ->onfi_get_features() >> does not return the mode that was previously applied.

Re: [PATCH] mtd: gpmi-nand: do not fail setting ONFI timing mode if available

On 07/13/2017 03:15 PM, Boris Brezillon wrote: > Hi Miquel, > > Le Thu, 13 Jul 2017 21:20:30 +0200, > Miquel Raynal a écrit : > >> GPMI NFC driver fails to apply timing mode if the ->onfi_get_features() >> does not return the mode that was previously applied. >> >> We can assume that a nand

Re: [PATCH v6 3/3] ARM: dts: imx7-colibri: add NAND support

On 06/08/2017 05:34 PM, Stefan Agner wrote: > The Colibri iMX7 modules come with 512MB on-module SLC NAND flash > populated. Make use of it by enabling the GPMI controller. > > Signed-off-by: Stefan Agner <ste...@agner.ch> > Tested-by: Fabio Estevam <fabio.este...@nxp.co

Re: [PATCH v6 3/3] ARM: dts: imx7-colibri: add NAND support

On 06/08/2017 05:34 PM, Stefan Agner wrote: > The Colibri iMX7 modules come with 512MB on-module SLC NAND flash > populated. Make use of it by enabling the GPMI controller. > > Signed-off-by: Stefan Agner > Tested-by: Fabio Estevam Acked-by: Han Xu > --- > a

Re: [PATCH v6 2/3] ARM: dts: imx7: add GPMI NAND and APBH DMA

On 06/08/2017 05:34 PM, Stefan Agner wrote: > Add i.MX 7 APBH DMA and GPMI NAND modules. > > Signed-off-by: Stefan Agner <ste...@agner.ch> > Tested-by: Fabio Estevam <fabio.este...@nxp.com> Acked-by: Han Xu <han...@nxp.com> > --- >

Re: [PATCH v6 2/3] ARM: dts: imx7: add GPMI NAND and APBH DMA

On 06/08/2017 05:34 PM, Stefan Agner wrote: > Add i.MX 7 APBH DMA and GPMI NAND modules. > > Signed-off-by: Stefan Agner > Tested-by: Fabio Estevam Acked-by: Han Xu > --- > arch/arm/boot/dts/imx7s.dtsi | 31 +++ > 1 file changed, 31 inserti

Re: [PATCH v6 1/3] clk: imx7d: create clocks behind rawnand clock gate

H-Bridge-DMA. > > Add new clocks which represent the clock after the gate, and use a > shared clock gate to correctly model the hardware. > > Signed-off-by: Stefan Agner <ste...@agner.ch> > Tested-by: Fabio Estevam <fabio.este...@nxp.com> Acked-by: Han Xu <han...@n

Re: [PATCH v6 1/3] clk: imx7d: create clocks behind rawnand clock gate

H-Bridge-DMA. > > Add new clocks which represent the clock after the gate, and use a > shared clock gate to correctly model the hardware. > > Signed-off-by: Stefan Agner > Tested-by: Fabio Estevam Acked-by: Han Xu > --- > drivers/clk/imx/clk-imx7d.c | 6 --

Re: [PATCH v5 2/3] ARM: dts: imx7: add GPMI NAND and APBH DMA

On 06/06/2017 01:30 AM, Stefan Agner wrote: > Add i.MX 7 APBH DMA and GPMI NAND modules. > > Signed-off-by: Stefan Agner > --- > arch/arm/boot/dts/imx7s.dtsi | 32 > 1 file changed, 32 insertions(+) > > diff --git

Re: [PATCH v5 2/3] ARM: dts: imx7: add GPMI NAND and APBH DMA

On 06/06/2017 01:30 AM, Stefan Agner wrote: > Add i.MX 7 APBH DMA and GPMI NAND modules. > > Signed-off-by: Stefan Agner > --- > arch/arm/boot/dts/imx7s.dtsi | 32 > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm/boot/dts/imx7s.dtsi

Re: [PATCH v3 0/2] ARM: dts: imx7: add NAND support

On 06/01/2017 08:48 PM, Stefan Agner wrote: > Hi Han, > > On 2017-06-01 14:14, Han Xu wrote: >> On 06/01/2017 02:20 PM, Stefan Agner wrote: >>> This are the missing device tree parts to add NAND support for i.MX 7. >>> See previous patchset: >>> https

Re: [PATCH v3 0/2] ARM: dts: imx7: add NAND support

On 06/01/2017 08:48 PM, Stefan Agner wrote: > Hi Han, > > On 2017-06-01 14:14, Han Xu wrote: >> On 06/01/2017 02:20 PM, Stefan Agner wrote: >>> This are the missing device tree parts to add NAND support for i.MX 7. >>> See previous patchset: >>> https

Re: [PATCH v3 0/2] ARM: dts: imx7: add NAND support

On 06/01/2017 02:20 PM, Stefan Agner wrote: > This are the missing device tree parts to add NAND support for i.MX 7. > See previous patchset: >

Re: [PATCH v3 0/2] ARM: dts: imx7: add NAND support

On 06/01/2017 02:20 PM, Stefan Agner wrote: > This are the missing device tree parts to add NAND support for i.MX 7. > See previous patchset: >

Re: [PATCH v2 4/5] ARM: dts: imx7: add GPMI NAND

On 05/04/2017 04:50 PM, Stefan Agner wrote: > On 2017-05-04 12:13, Han Xu wrote: >> On 04/21/2017 08:23 PM, Stefan Agner wrote: >>> Add i.MX 7 GPMI NAND module. >>> >>> Signed-off-by: Stefan Agner <ste...@agner.ch> >&g

Re: [PATCH v2 4/5] ARM: dts: imx7: add GPMI NAND

On 05/04/2017 04:50 PM, Stefan Agner wrote: > On 2017-05-04 12:13, Han Xu wrote: >> On 04/21/2017 08:23 PM, Stefan Agner wrote: >>> Add i.MX 7 GPMI NAND module. >>> >>> Signed-off-by: Stefan Agner >>> --- >>>arch/arm/boot/dts/imx7s.d

Re: [PATCH v2 4/5] ARM: dts: imx7: add GPMI NAND

On 04/21/2017 08:23 PM, Stefan Agner wrote: > Add i.MX 7 GPMI NAND module. > > Signed-off-by: Stefan Agner > --- > arch/arm/boot/dts/imx7s.dtsi | 31 +++ > 1 file changed, 31 insertions(+) > > diff --git a/arch/arm/boot/dts/imx7s.dtsi

Re: [PATCH v2 4/5] ARM: dts: imx7: add GPMI NAND

On 04/21/2017 08:23 PM, Stefan Agner wrote: > Add i.MX 7 GPMI NAND module. > > Signed-off-by: Stefan Agner > --- > arch/arm/boot/dts/imx7s.dtsi | 31 +++ > 1 file changed, 31 insertions(+) > > diff --git a/arch/arm/boot/dts/imx7s.dtsi

Re: [PATCH 2/5] mtd: nand: gpmi: add i.MX 7 SoC support

D, >>> .bch_max_ecc_strength = 62, >>> .max_chain_delay = 12, >>> .clks = gpmi_clks_for_mx7d, >>> diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h >>> b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h >>> index 2e584e18d980..f2cc13abc896 100644 >>> --- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h >>> +++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h >>> @@ -123,7 +123,8 @@ enum gpmi_type { >>> IS_MX23, >>> IS_MX28, >>> IS_MX6Q, >>> - IS_MX6SX >>> + IS_MX6SX, >>> + IS_MX7D, >>> }; >>> >>> struct gpmi_devdata { >>> @@ -307,6 +308,8 @@ void gpmi_copy_bits(u8 *dst, size_t dst_bit_off, >>> #define GPMI_IS_MX28(x)((x)->devdata->type == IS_MX28) >>> #define GPMI_IS_MX6Q(x)((x)->devdata->type == IS_MX6Q) >>> #define GPMI_IS_MX6SX(x) ((x)->devdata->type == IS_MX6SX) >>> +#define GPMI_IS_MX7D(x)((x)->devdata->type == IS_MX7D) >>> >>> -#define GPMI_IS_MX6(x) (GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x)) >>> +#define GPMI_IS_MX6(x) (GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x) || >>> \ >>> +GPMI_IS_MX7D(x)) >>> #endif >>> >>> -- >>> Stefan >>> > > __ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Sincerely, Han XU

Re: [PATCH 2/5] mtd: nand: gpmi: add i.MX 7 SoC support

62, >>> .max_chain_delay = 12, >>> .clks = gpmi_clks_for_mx7d, >>> diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h >>> b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h >>> index 2e584e18d980..f2cc13abc896 100644 >>> --- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h >>> +++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h >>> @@ -123,7 +123,8 @@ enum gpmi_type { >>> IS_MX23, >>> IS_MX28, >>> IS_MX6Q, >>> - IS_MX6SX >>> + IS_MX6SX, >>> + IS_MX7D, >>> }; >>> >>> struct gpmi_devdata { >>> @@ -307,6 +308,8 @@ void gpmi_copy_bits(u8 *dst, size_t dst_bit_off, >>> #define GPMI_IS_MX28(x)((x)->devdata->type == IS_MX28) >>> #define GPMI_IS_MX6Q(x)((x)->devdata->type == IS_MX6Q) >>> #define GPMI_IS_MX6SX(x) ((x)->devdata->type == IS_MX6SX) >>> +#define GPMI_IS_MX7D(x)((x)->devdata->type == IS_MX7D) >>> >>> -#define GPMI_IS_MX6(x) (GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x)) >>> +#define GPMI_IS_MX6(x) (GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x) || >>> \ >>> +GPMI_IS_MX7D(x)) >>> #endif >>> >>> -- >>> Stefan >>> > > __ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Sincerely, Han XU

Re: [PATCH v3 6/9] mtd: spi-nor: Support R/W for S25FS-S family flash

> > > + if (ret) >> > > > > + return ret; >> > > > > + if (cr3v & CR3V_4KB_ERASE_UNABLE) >> > > > > + return 0; >> > > > > + ret = nor->write_reg(nor, SPINOR_OP_WRE

Re: [PATCH v3 6/9] mtd: spi-nor: Support R/W for S25FS-S family flash

return ret; >> > > > > + if (cr3v & CR3V_4KB_ERASE_UNABLE) >> > > > > + return 0; >> > > > > + ret = nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0); >> > > > > + if (ret) >> > > > > +

Re: [PATCH v3 6/9] mtd: spi-nor: Support R/W for S25FS-S family flash

On Thu, Sep 15, 2016 at 06:50:55AM +, Krzeminski, Marcin (Nokia - PL/Wroclaw) wrote: > Hello, > > > -Original Message- > > From: linux-mtd [mailto:linux-mtd-boun...@lists.infradead.org] On Behalf > > Of Han Xu > > Sent: Wednesday, September 14, 2016 9

Re: [PATCH v3 6/9] mtd: spi-nor: Support R/W for S25FS-S family flash

On Thu, Sep 15, 2016 at 06:50:55AM +, Krzeminski, Marcin (Nokia - PL/Wroclaw) wrote: > Hello, > > > -Original Message- > > From: linux-mtd [mailto:linux-mtd-boun...@lists.infradead.org] On Behalf > > Of Han Xu > > Sent: Wednesday, September 14, 2016 9:49

[PATCH] mtd: fsl-quadspi: QSPI support dynamic LUT change

- WR EVCR typo in header file - RD EVCR command in lut This patch depends on Yunhui's patch set https://patchwork.ozlabs.org/patch/660356/ Signed-off-by: Han Xu <han...@nxp.com> --- drivers/mtd/spi-nor/fsl-quadspi.c | 111 +++--- include/linux/mtd/spi

[PATCH] mtd: fsl-quadspi: QSPI support dynamic LUT change

- WR EVCR typo in header file - RD EVCR command in lut This patch depends on Yunhui's patch set https://patchwork.ozlabs.org/patch/660356/ Signed-off-by: Han Xu --- drivers/mtd/spi-nor/fsl-quadspi.c | 111 +++--- include/linux/mtd/spi-nor.h | 6 ++- 2

Re: [PATCH v3 9/9] mtd: fsl-quadspi: add multi flash chip R/W on ls2080a

; > + qspi_writel(q, nor_size * 3 + mem_base, base + QUADSPI_SFB1AD); > + qspi_writel(q, nor_size * 4 + mem_base, base + QUADSPI_SFB2AD); > } > > /* > -- > 2.1.0.27.g96db324 > > Acked-by: Han xu <han...@nxp.com> > __ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Sincerely, Han XU

Re: [PATCH v3 9/9] mtd: fsl-quadspi: add multi flash chip R/W on ls2080a

t; + else > + mem_base = q->memmap_phy; > + > + qspi_writel(q, nor_size + mem_base, base + QUADSPI_SFA1AD); > + qspi_writel(q, nor_size * 2 + mem_base, base + QUADSPI_SFA2AD); > + qspi_writel(q, nor_size * 3 + mem_base, base + QUADSPI_SFB1AD);

Re: [PATCH v3 8/9] mtd: fsl-quadspi: disable AHB buffer prefetch

mprove the > +* read performance. > + */ > + qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK | > + ((q->devtype_data->ahb_buf_size / 8) > + << QUADSPI_BUF3CR_ADATSZ_SHIFT), > +

Re: [PATCH v3 8/9] mtd: fsl-quadspi: disable AHB buffer prefetch

*/ > + qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK | > + ((q->devtype_data->ahb_buf_size / 8) > + << QUADSPI_BUF3CR_ADATSZ_SHIFT), > + base + QUADSPI_BUF3CR); > + } > > /* We only use the buffer3 */ > qspi_writel(q, 0, base + QUADSPI_BUF0IND); > -- > 2.1.0.27.g96db324 > > Acked-by: Han xu > __ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Sincerely, Han XU

Re: [PATCH v3 6/9] mtd: spi-nor: Support R/W for S25FS-S family flash

tlen, u_char *buf) > { > @@ -1361,6 +1411,12 @@ int spi_nor_scan(struct spi_nor *nor, const char > *name, enum read_mode mode) > spi_nor_wait_till_ready(nor); > } > > + if (EXT_JEDEC(info) == SPINOR_S25FS_FAMILY_EXT_JEDEC) { > + ret = spansio

Re: [PATCH v3 6/9] mtd: spi-nor: Support R/W for S25FS-S family flash

r, const char > *name, enum read_mode mode) > spi_nor_wait_till_ready(nor); > } > > + if (EXT_JEDEC(info) == SPINOR_S25FS_FAMILY_EXT_JEDEC) { > + ret = spansion_s25fs_disable_4kb_erase(nor); > + if (ret) > + return ret; > + } > + > if (!mtd->name) > mtd->name = dev_name(dev); > mtd->priv = nor; > -- > 2.1.0.27.g96db324 > > Hi Brian, I will ack this change but still feel it's kind of hacking code. Acked-by: Han xu > __ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Sincerely, Han XU

Re: [PATCH v3 7/9] mtd: fsl-quadspi: Solve Micron Spansion flash command conflict

_RDAR_OR_RD_EVCR; > case SPINOR_OP_SPANSION_WRAR: > return SEQID_WRAR; > case SPINOR_OP_WREN: > @@ -550,6 +573,8 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) > return SEQID_EN4B; > case SPINOR_OP_BRWR: > return

Re: [PATCH v3 7/9] mtd: fsl-quadspi: Solve Micron Spansion flash command conflict

; case SPINOR_OP_WREN: > @@ -550,6 +573,8 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) > return SEQID_EN4B; > case SPINOR_OP_BRWR: > return SEQID_BRWR; > + case SPINOR_OP_WD_EVCR: > + return SEQID_WD_EVCR; > default: > if (cmd == q->nor[0].erase_opcode) > return SEQID_SE; > -- > 2.1.0.27.g96db324 > > Acked-by: Han xu > __ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Sincerely, Han XU

Re: [PATCH v3 5/9] mtd: spi-nor: fsl-quadspi:Support qspi for ls2080a

sl_qspi_dt_ids[] = { > { .compatible = "fsl,imx7d-qspi", .data = (void *)_data, }, > { .compatible = "fsl,imx6ul-qspi", .data = (void *)_data, }, > { .compatible = "fsl,ls1021a-qspi", .data = (void *)_data, }, > + { .compatible = &q

Re: [PATCH v3 5/9] mtd: spi-nor: fsl-quadspi:Support qspi for ls2080a

oid *)_data, }, > { .compatible = "fsl,imx6ul-qspi", .data = (void *)_data, }, > { .compatible = "fsl,ls1021a-qspi", .data = (void *)_data, }, > + { .compatible = "fsl,ls2080a-qspi", .data = (void *)_data, }, > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, fsl_qspi_dt_ids); > -- > 2.1.0.27.g96db324 > > Acked-by: Han xu > __ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Sincerely, Han XU

Re: [PATCH v3 4/9] mtd: spi-nor: fsl-quadspi: extend support for some special requerment.

> +++ b/include/linux/mtd/spi-nor.h > @@ -75,6 +75,10 @@ > /* Used for Spansion flashes only. */ > #define SPINOR_OP_BRWR 0x17/* Bank register write */ > > +/* Used for Spansion S25FS-S family flash only. */ > +#define S

Re: [PATCH v3 4/9] mtd: spi-nor: fsl-quadspi: extend support for some special requerment.

Used for Spansion flashes only. */ > #define SPINOR_OP_BRWR 0x17/* Bank register write */ > > +/* Used for Spansion S25FS-S family flash only. */ > +#define SPINOR_OP_SPANSION_RDAR0x65/* Read any device register */ > +#define SPINOR_OP_SPANSION_WRAR0x71/*

Re: [PATCH v3 3/9] mtd: spi-nor: fsl-quadspi: add fast-read mode support

} > > /* Write enable */ > lut_base = SEQID_WREN * 4; > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) > { > switch (cmd) { > case SPINOR_OP_READ_1_1_4: > + case SPINOR_OP_READ_FAST

Re: [PATCH v3 3/9] mtd: spi-nor: fsl-quadspi: add fast-read mode support

_WREN * 4; > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) > { > switch (cmd) { > case SPINOR_OP_READ_1_1_4: > + case SPINOR_OP_READ_FAST: > return SEQID_READ; > case SPINOR_OP_WREN: >

Re: [PATCH v3 2/9] mtd: fsl-quadspi: Rename SEQID_QUAD_READ to SEQID_READ

base + QUADSPI_LUT(lut_base)); > @@ -468,7 +468,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) > { > switch (cmd) { > case SPINOR_OP_READ_1_1_4: > - return SEQID_QUAD_READ; > + return SEQID_READ; >

Re: [PATCH v3 2/9] mtd: fsl-quadspi: Rename SEQID_QUAD_READ to SEQID_READ

468,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) > { > switch (cmd) { > case SPINOR_OP_READ_1_1_4: > - return SEQID_QUAD_READ; > + return SEQID_READ; > case SPINOR_OP_WREN: > return SEQID_WREN; >

Re: [PATCH v3 1/9] mtd:fsl-quadspi:use the property fields of SPI-NOR

ic void fsl_qspi_init_lut(struct fsl_qspi *q) > /* Erase a sector */ > lut_base = SEQID_SE * 4; > > - cmd = q->nor[0].erase_opcode; > - addrlen = q->nor_size <= SZ_16M ? ADDR24BIT : ADDR32BIT; > - > - qspi_writel(q, LUT0(C

Re: [PATCH v3 1/9] mtd:fsl-quadspi:use the property fields of SPI-NOR

> lut_base = SEQID_SE * 4; > > - cmd = q->nor[0].erase_opcode; > - addrlen = q->nor_size <= SZ_16M ? ADDR24BIT : ADDR32BIT; > - > - qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen), > + qspi_writel(q, LUT0(CMD, PAD1, nor->

Re: [PATCH] mtd: spi-nor: constify fsl_qspi_devtype_data

ata imx6ul_data = { > +static const struct fsl_qspi_devtype_data imx6ul_data = { > .devtype = FSL_QUADSPI_IMX6UL, > .rxfifo = 128, > .txfifo = 512, > -- > 2.7.3 > Acked-by: Han Xu <han...@nxp.com> > > __ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/

Re: [PATCH] mtd: spi-nor: constify fsl_qspi_devtype_data

tic const struct fsl_qspi_devtype_data imx6ul_data = { > .devtype = FSL_QUADSPI_IMX6UL, > .rxfifo = 128, > .txfifo = 512, > -- > 2.7.3 > Acked-by: Han Xu > > __ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/

Re: [PATCH v2 6/9] mtd: spi-nor: Support R/W for S25FS-S family flash

ct spi_nor *nor, const char > *name, enum read_mode mode) > spi_nor_wait_till_ready(nor); > } > > + if (EXT_ID(info) == SPINOR_S25FS_FAMILY_ID) { > + ret = spansion_s25fs_disable_4kb_erase(nor); > + if (ret) > + return ret; > + } > + > if (!mtd->name) > mtd->name = dev_name(dev); > mtd->priv = nor; > -- > 2.1.0.27.g96db324 > > > __ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Sincerely, Han XU

Re: [PATCH v2 6/9] mtd: spi-nor: Support R/W for S25FS-S family flash

); > } > > + if (EXT_ID(info) == SPINOR_S25FS_FAMILY_ID) { > + ret = spansion_s25fs_disable_4kb_erase(nor); > + if (ret) > + return ret; > + } > + > if (!mtd->name) > mtd->name = dev_name(dev); > mtd->priv = nor; > -- > 2.1.0.27.g96db324 > > > __ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Sincerely, Han XU

Re: [PATCH v2 1/9] mtd:fsl-quadspi:use the property fields of SPI-NOR

n't want this to be my only comment, but since you're pinging > again... > > Your patchset doesn't build on the latest. You need to refresh. > > Also, has Han Xu reviewed this? I sent comments for v1 in [PATCH 6/9] mtd: spi-nor: Support R/W for S25FS-S family flash, but nothing chang

Re: [PATCH v2 1/9] mtd:fsl-quadspi:use the property fields of SPI-NOR

ent, but since you're pinging > again... > > Your patchset doesn't build on the latest. You need to refresh. > > Also, has Han Xu reviewed this? I sent comments for v1 in [PATCH 6/9] mtd: spi-nor: Support R/W for S25FS-S family flash, but nothing changed in v2. Brian, could you please check

Re: [PATCH v3 2/6] Documentation: dt: mtd: gpmi: document the clocks and clock-names in DT property

On Tue, Jun 28, 2016 at 3:55 PM, Rob Herring <r...@kernel.org> wrote: > On Fri, Jun 24, 2016 at 04:40:07PM -0500, Han Xu wrote: >> add the clocks and clock-names in DT property, gpmi-io clock is >> mandatory for all platforms, but some platforms, such as i.MX6Q may >

Re: [PATCH v3 2/6] Documentation: dt: mtd: gpmi: document the clocks and clock-names in DT property

On Tue, Jun 28, 2016 at 3:55 PM, Rob Herring wrote: > On Fri, Jun 24, 2016 at 04:40:07PM -0500, Han Xu wrote: >> add the clocks and clock-names in DT property, gpmi-io clock is >> mandatory for all platforms, but some platforms, such as i.MX6Q may >> need more extra clocks

[PATCH v3 1/6] mtd: nand: gpmi: add GPMI NAND support for i.MX7D

support GPMI NAND on i.MX7D Signed-off-by: Han Xu <han...@nxp.com> --- drivers/mtd/nand/gpmi-nand/bch-regs.h | 14 +++--- drivers/mtd/nand/gpmi-nand/gpmi-lib.c | 10 ++ drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 30 -- drivers/mtd/nand/gpmi-nan

[PATCH v3 1/6] mtd: nand: gpmi: add GPMI NAND support for i.MX7D

support GPMI NAND on i.MX7D Signed-off-by: Han Xu --- drivers/mtd/nand/gpmi-nand/bch-regs.h | 14 +++--- drivers/mtd/nand/gpmi-nand/gpmi-lib.c | 10 ++ drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 30 -- drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 7

[PATCH v3 6/6] Documentation: dt: mtd: gpmi: document the new supported chip in DT

listed all supported chips in DT. Signed-off-by: Han Xu <han...@nxp.com> --- Documentation/devicetree/bindings/mtd/gpmi-nand.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt b/Documentation/devicetree/bindings/mt

[PATCH v3 6/6] Documentation: dt: mtd: gpmi: document the new supported chip in DT

listed all supported chips in DT. Signed-off-by: Han Xu --- Documentation/devicetree/bindings/mtd/gpmi-nand.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt index

[PATCH v3 4/6] mtd: nand: gpmi: correct bitflip for erased NAND page

i.MX6QP and i.MX7D BCH module integrated a new feature to detect the bitflip number for erased NAND page. So for these two platform, set the erase threshold to ecc_strength and if bitflip detected, GPMI driver will correct the data to all 0xFF. Signed-off-by: Han Xu <han...@nxp.com> --- d

[PATCH v3 3/6] mtd: nand: gpmi: add GPMI NAND support for i.MX6QP

support GPMI NAND on i.MX6QP Signed-off-by: Han Xu <han...@nxp.com> --- drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 9 + drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 5 - 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drive

[PATCH v3 5/6] mtd: nand: gpmi: support NAND on i.MX6UL

support GPMI NAND on i.MX6UL Signed-off-by: Han Xu <han...@nxp.com> --- drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 9 + drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 5 - 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drive

[PATCH v3 4/6] mtd: nand: gpmi: correct bitflip for erased NAND page

i.MX6QP and i.MX7D BCH module integrated a new feature to detect the bitflip number for erased NAND page. So for these two platform, set the erase threshold to ecc_strength and if bitflip detected, GPMI driver will correct the data to all 0xFF. Signed-off-by: Han Xu --- drivers/mtd/nand/gpmi

[PATCH v3 3/6] mtd: nand: gpmi: add GPMI NAND support for i.MX6QP

support GPMI NAND on i.MX6QP Signed-off-by: Han Xu --- drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 9 + drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 5 - 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi

[PATCH v3 5/6] mtd: nand: gpmi: support NAND on i.MX6UL

support GPMI NAND on i.MX6UL Signed-off-by: Han Xu --- drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 9 + drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 5 - 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi

[PATCH v3 2/6] Documentation: dt: mtd: gpmi: document the clocks and clock-names in DT property

add the clocks and clock-names in DT property, gpmi-io clock is mandatory for all platforms, but some platforms, such as i.MX6Q may need more extra clocks for submodules. More details please refer to the SoC reference manual. Signed-off-by: Han Xu <han...@nxp.com> --- Documentation/devi

[PATCH v3 0/6] support gpmi on i.MX6UL/7D and HW bitflip on i.MX6QP/7D

lit bitflip and i.MX6QP code v2 ---> v3: calculate erased chunks and fix bitflip after loop add more details for i.MX7 clock name fix the patch name for documentation Han Xu (6): mtd: nand: gpmi: add GPMI NAND support for i.MX7D Documentation: dt: mtd: gpmi: document the clocks and clock

[PATCH v3 2/6] Documentation: dt: mtd: gpmi: document the clocks and clock-names in DT property

add the clocks and clock-names in DT property, gpmi-io clock is mandatory for all platforms, but some platforms, such as i.MX6Q may need more extra clocks for submodules. More details please refer to the SoC reference manual. Signed-off-by: Han Xu --- Documentation/devicetree/bindings/mtd/gpmi

[PATCH v3 0/6] support gpmi on i.MX6UL/7D and HW bitflip on i.MX6QP/7D

lit bitflip and i.MX6QP code v2 ---> v3: calculate erased chunks and fix bitflip after loop add more details for i.MX7 clock name fix the patch name for documentation Han Xu (6): mtd: nand: gpmi: add GPMI NAND support for i.MX7D Documentation: dt: mtd: gpmi: document the clocks and clock

Re: [PATCH v2 4/6] mtd: nand: gpmi: correct bitflip for erased NAND page

On Tue, Jun 14, 2016 at 2:14 PM, Boris Brezillon <boris.brezil...@free-electrons.com> wrote: > On Fri, 10 Jun 2016 12:01:32 -0500 > Han Xu <han...@nxp.com> wrote: > >> i.MX6QP and i.MX7D BCH module integrated a new feature to detect the >> bitflip number for e

Re: [PATCH v2 4/6] mtd: nand: gpmi: correct bitflip for erased NAND page

On Tue, Jun 14, 2016 at 2:14 PM, Boris Brezillon wrote: > On Fri, 10 Jun 2016 12:01:32 -0500 > Han Xu wrote: > >> i.MX6QP and i.MX7D BCH module integrated a new feature to detect the >> bitflip number for erased NAND page. So for these two platform, set the >> eras

[PATCH v2 5/6] mtd: nand: gpmi: support NAND on i.MX6UL

support GPMI NAND on i.MX6UL Signed-off-by: Han Xu <han...@nxp.com> --- drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 9 + drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 5 - 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drive

[PATCH v2 6/6] mtd: nand: gpmi: document the new supported chip in DT

listed all supported chips in DT. Signed-off-by: Han Xu <han...@nxp.com> --- Documentation/devicetree/bindings/mtd/gpmi-nand.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt b/Documentation/devicetree/bindings/mt

[PATCH v2 5/6] mtd: nand: gpmi: support NAND on i.MX6UL

support GPMI NAND on i.MX6UL Signed-off-by: Han Xu --- drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 9 + drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 5 - 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi

[PATCH v2 6/6] mtd: nand: gpmi: document the new supported chip in DT

listed all supported chips in DT. Signed-off-by: Han Xu --- Documentation/devicetree/bindings/mtd/gpmi-nand.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt index

[PATCH v2 4/6] mtd: nand: gpmi: correct bitflip for erased NAND page

i.MX6QP and i.MX7D BCH module integrated a new feature to detect the bitflip number for erased NAND page. So for these two platform, set the erase threshold to ecc_strength and if bitflip detected, GPMI driver will correct the data to all 0xFF. Signed-off-by: Han Xu <han...@nxp.com> --- d

[PATCH v2 4/6] mtd: nand: gpmi: correct bitflip for erased NAND page

i.MX6QP and i.MX7D BCH module integrated a new feature to detect the bitflip number for erased NAND page. So for these two platform, set the erase threshold to ecc_strength and if bitflip detected, GPMI driver will correct the data to all 0xFF. Signed-off-by: Han Xu --- drivers/mtd/nand/gpmi

[PATCH v2 2/6] mtd: nand: gpmi: document the clocks and clock-names in DT property

add the clocks and clock-names in DT property, gpmi-io clock is mandatory for all platforms, but some platforms, such as i.MX6Q may need more extra clocks for submodules. More details please refer to the SoC reference manual. Signed-off-by: Han Xu <han...@nxp.com> --- Documentation/devi

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