On 3/22/2021 7:56 AM, Drew Fustini wrote:
I'm curious what SoC are you using?
I'm working on Amazon Annapurna Labs SoCs (based on ARM cortex
processors). That include multiple pins controlled with same register.
It's good to know who has hardware to test bits_per_mux in the future.
I p
On 3/18/2021 2:15 PM, Andy Shevchenko wrote:
On Wed, Mar 17, 2021 at 11:42 PM Hanna Hawa wrote:
An SError was detected when trying to print the supported pins in a
What is SError? Yes, I have read a discussion, but here is the hint:
if a person sees this as a first text due to, for exampl
On 3/17/2021 2:27 PM, Andy Shevchenko wrote:
On Tue, Mar 16, 2021 at 11:24 PM Hanna Hawa wrote:
An SError was detected when trying to print the supported pins in a
What SError is?
System error:
[ 24.257831] SError Interrupt on CPU0, code 0xbf02 -- SError
...
[ 24.257855] Kernel
On 7/23/2020 1:10 PM, Arnd Bergmann wrote:
Hi Hanna and Antoine,
I just came across this old series and noticed we had never merged it.
I don't know if the patches all still apply. Could you check and perhaps
resend to...@kernel.org if they are still good to go into the coming
merge window?
On 3/10/2020 3:47 PM, Robert Richter wrote:
CAUTION: This email originated from outside of the organization. Do not click
links or open attachments unless you can confirm the sender and know the
content is safe.
On 29.01.20 21:50:16, Hanna Hawa wrote:
Adds support for Amazon's Annapurna
On 10/10/2019 2:09 AM, Rob Herring wrote:
+Sudeep
On Mon, Oct 7, 2019 at 10:18 AM Hanna Hawa wrote:
Adds support for Amazon's Annapurna Labs L2 EDAC driver to detect and
report L2 errors.
I was curious why you needed a DT cache parsing function...
[...]
+static int al_l2_edac_probe(st
Hi,
On 10/10/2019 2:19 AM, Rob Herring wrote:
On Mon, Oct 7, 2019 at 10:18 AM Hanna Hawa wrote:
Adds support for Amazon's Annapurna Labs L2 EDAC driver to detect and
report L2 errors.
Signed-off-by: Hanna Hawa
---
MAINTAINERS | 5 +
drivers/edac/Kconfig | 8 ++
d
On 9/30/2019 5:50 PM, Borislav Petkov wrote:
On Mon, Sep 23, 2019 at 08:17:40PM +0100, Hanna Hawa wrote:
+void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev,
+ int inst_nr, int block_nr, const char *msg)
+{
+ __edac_device_handle_ce(edac_dev, 1, inst_
On 9/20/2019 9:42 AM, Robert Richter wrote:
On 19.09.19 18:17:12, Hanna Hawa wrote:
Add an API for EDAC device to report multiple errors with same type.
Signed-off-by: Hanna Hawa
With the change below it looks good to me:
Acked-by: Robert Richter
Thanks
Thanks,
-Robert
---
dri
On 9/20/2019 9:49 AM, Robert Richter wrote:
On 19.09.19 18:17:13, Hanna Hawa wrote:
Move edac_device_handle_*() functions from source file to header file as
inline funtcion that use the new API with single error.
Signed-off-by: Hanna Hawa
With the changes below it looks good to me:
Acked
On 9/19/2019 9:33 AM, Robert Richter wrote:
On 12.09.19 15:53:04, Hanna Hawa wrote:
Add an API for EDAC device to report multiple errors with same type.
Signed-off-by: Hanna Hawa
---
drivers/edac/edac_device.c | 91 ++
drivers/edac/edac_device.h | 40 +
Hi
On 9/8/2019 11:35 AM, Borislav Petkov wrote:
On Sun, Sep 08, 2019 at 10:16:02AM +0200, Borislav Petkov wrote:
On Sun, Sep 08, 2019 at 10:58:31AM +0300, Hawa, Hanna wrote:
Better use WARN_ON_ONCE() to avoid flooding.
In case of two drivers using this function with wrong error count, only
On 9/5/2019 12:56 PM, Robert Richter wrote:
Hi Hanna,
thanks for the update. See below.
On 05.09.19 09:37:45, Hanna Hawa wrote:
Add an API for edac device to report multiple errors with same type.
Signed-off-by: Hanna Hawa
---
drivers/edac/edac_device.c | 66
On 9/3/2019 10:27 AM, Robert Richter wrote:
On 15.07.19 16:24:09, Hanna Hawa wrote:
Adds support for Amazon's Annapurna Labs L2 EDAC driver to detect and
report L2 errors.
Signed-off-by: Hanna Hawa
---
MAINTAINERS | 6 ++
drivers/edac/Kconfig | 8 ++
drivers/edac/
On 9/3/2019 10:24 AM, Robert Richter wrote:
On 15.07.19 16:24:07, Hanna Hawa wrote:
Adds support for Amazon's Annapurna Labs L1 EDAC driver to detect and
report L1 errors.
Signed-off-by: Hanna Hawa
Reviewed-by: James Morse
---
MAINTAINERS | 6 ++
drivers/edac/Kconfig
On 8/21/2019 10:17 PM, Rob Herring wrote:
Why is this even in DT? AFAICT, this is all just CortexA57 core features
(i.e. nothing Amazon specific). The core type and the ECC capabilities
are discoverable.
Added to the DT in order to easily enable/disable the driver. You are
correct that they
On 8/2/2019 6:11 PM, James Morse wrote:
Hi Hanna,
On 01/08/2019 14:09, Hanna Hawa wrote:
Adds support for Amazon's Annapurna Labs L2 EDAC driver to detect and
report L2 errors.
diff --git a/drivers/edac/al_l2_edac.c b/drivers/edac/al_l2_edac.c
new file mode 100644
index ..6c6d37c
On 8/1/2019 5:17 PM, Robert Richter wrote:
Don't you think it'll be confused to have different APIs between EDAC_MC and
EDAC_DEVICE?
(in MC the count passed as part of edac_mc_handle_error())
I don't think edac_mc_handle_error() with 11 function arguments is a
good reference for somethin we w
On 8/1/2019 2:35 PM, Robert Richter wrote:
On 15.07.19 13:53:07, Hanna Hawa wrote:
Add a counter parameter in order to avoid losing errors count for edac
device, the error count reports the number of errors reported by an edac
device similar to the way MC_EDAC do.
Signed-off-by: Hanna Hawa
On 7/26/2019 7:49 PM, James Morse wrote:
Hi Hanna,
On 15/07/2019 14:24, Hanna Hawa wrote:
Adds support for Amazon's Annapurna Labs L1 EDAC driver to detect and
report L1 errors.
diff --git a/drivers/edac/al_l1_edac.c b/drivers/edac/al_l1_edac.c
new file mode 100644
index 000..70510ea
-
On 7/25/2019 9:36 PM, Mauro Carvalho Chehab wrote:
/* Propagate the count up the 'totals' tree */
- instance->counters.ue_count++;
- edac_dev->counters.ue_count++;
+ instance->counters.ue_count += error_count;
+ edac_dev->counters.ue_count += error_count;
Patch
Hi Jan,
On 7/17/2019 3:06 PM, Jan Glauber wrote:
Hi Hanna,
I'm probably missing something but this patch looks like while it adds
the error_count parameter the passed values all seem to be 1. So is the
new parameter used otherwise, maybe in another patch?
Yes in another patch. In Amazon L1/L2
On 7/9/2019 12:32 PM, Jonathan Cameron wrote:
Signed-off-by: Hanna Hawa
A quick drive by review as I was feeling curious.
Just a couple of trivial queries and observation on the fact it
might be useful to add a few devm managed functions to cut down
on edac driver boilerplate.
Thanks,
Jona
+static void al_a57_edac_l2merrsr(void *arg)
+{
+ edac_device_handle_ce(edac_dev, 0, 0, "L2 Error");
How do we know this is corrected?
If looks like L2CTLR_EL1[20] might force fatal 1/0 to map to
uncorrected/corrected. Is
this what you are depending on here?
No - not on this. Rep
Hi Boris,
Yap, I think we're in agreement here. I believe the important question
is whether you need to get error information from multiple sources
together in order to do proper recovery or doing it per error source
suffices.
And I think the actual use cases could/should dictate our
drivers/o
Hi James,
Allowing linux to access these implementation-defined registers has come up
before:
https://www.spinics.net/lists/kernel/msg2750349.html
It looks like you've navigated most of the issues. Accessing
implementation-defined
registers is frowned on, but this stuff can't be done generic
Hi Ben, Boris
On 6/11/2019 8:50 AM, Benjamin Herrenschmidt wrote:
Anyway, let's get back to the specific case of our Amazon platform here
since it's a concrete example.
Hanna, can you give us a reasonably exhaustive list of how many such
"drivers" we'll want in the EDAC subsystem and whether y
On 5/31/2019 8:14 AM, Borislav Petkov wrote:
On Fri, May 31, 2019 at 01:15:33AM +, Herrenschmidt, Benjamin wrote:
This isn't terribly helpful, there's nothing telling anybody which of
those files corresponds to an ARM SoC :-)
drivers/edac/altera_edac.c is one example.
Also, James and I
On 5/31/2019 4:15 AM, Herrenschmidt, Benjamin wrote:
On Thu, 2019-05-30 at 11:19 -0700, Boris Petkov wrote:
On May 30, 2019 3:15:29 AM PDT, Hanna Hawa wrote:
Add support for error detection and correction for Amazon's
Annapurna
Labs SoCs for L1/L2 caches.
So this should be a driver for t
On 3/31/2019 3:46 PM, Mukesh Ojha wrote:
On 3/31/2019 6:04 PM, Hanna Hawa wrote:
Update driver license to be in-line with Linux conventions.
Signed-off-by: Hanna Hawa
---
drivers/irqchip/irq-alpine-msi.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/
30 matches
Mail list logo
