[PATCH] arm64: dts: odroid: add spicc0 controller node

Add enabled spicc0 controller node with annotations describing the physical SPI0 pin number based on the 40 pin header on the Odroid board. Signed-off-by: Hyeonki Hong --- .../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 26 +-- .../boot/dts/amlogic/meson-sm1-odroid-c4.dts | 24

[PATCH] [v2] pinctrl: meson: fix drive strength register and bit calculation

following method was used to solve this problem: A bit is calculated first using predefined strides. Then, If the bit is 32 or more, the register is changed by the quotient of the bit divided by 32. And the bit is set to the remainder. Signed-off-by: Hyeonki Hong --- drivers/pinctrl/meson/pinctrl

[PATCH] pinctrl: meson: fix drive strength register and bit calculation

On Wed, Jun 10, 2020 at 03:09:42PM +0200, Jerome Brunet wrote: > > On Wed 10 Jun 2020 at 06:13, hhk7...@gmail.com wrote: > > > From: Hyeonki Hong > > > > If a GPIO bank has greater than 16 pins, PAD_DS_REG is split into two > > registers. However, when regi