[PATCH] dt-bindings: add device tree binding for Allwinner XR819 SDIO Wi-Fi

Allwinner XR819 is a SDIO Wi-Fi chip, which has the functionality to use an out-of-band interrupt pin instead of SDIO in-band interrupt. Add the device tree binding of this chip, in order to make it possible to add this interrupt pin to device trees. Signed-off-by: Icenowy Zheng <icen...@aosc

[PATCH] dt-bindings: add device tree binding for Allwinner XR819 SDIO Wi-Fi

Allwinner XR819 is a SDIO Wi-Fi chip, which has the functionality to use an out-of-band interrupt pin instead of SDIO in-band interrupt. Add the device tree binding of this chip, in order to make it possible to add this interrupt pin to device trees. Signed-off-by: Icenowy Zheng

Re: [linux-sunxi] [PATCH v6 8/9] arm64: allwinner: a64: enable AXP803 regulators for Pine64

于 2017年7月18日 GMT+08:00 上午10:58:52, Chen-Yu Tsai <w...@csie.org> 写到: >On Fri, May 19, 2017 at 4:55 PM, Andre Przywara ><andre.przyw...@arm.com> wrote: >> Hi, >> >> On 19/05/17 09:29, Icenowy Zheng wrote: >>> >>> >>> 于 2017年5月19日 G

Re: [linux-sunxi] [PATCH v6 8/9] arm64: allwinner: a64: enable AXP803 regulators for Pine64

于 2017年7月18日 GMT+08:00 上午10:58:52, Chen-Yu Tsai 写到: >On Fri, May 19, 2017 at 4:55 PM, Andre Przywara > wrote: >> Hi, >> >> On 19/05/17 09:29, Icenowy Zheng wrote: >>> >>> >>> 于 2017年5月19日 GMT+08:00 下午4:27:21, Andre Przywara > 写到: >

Re: [linux-sunxi] Re: [PATCH 1/2] pinctrl: sunxi: add a missing function of A10/A20 pinctrl driver

于 2017年7月10日 GMT+08:00 下午4:44:00, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Fri, Jul 07, 2017 at 07:21:19AM +0800, icen...@aosc.io wrote: >> 在 2017-07-07 04:46，Maxime Ripard 写道： >> > Hi, >> > >> > On Thu, Jul 06, 2017 at 10:28:21PM +0800

Re: [linux-sunxi] Re: [PATCH 1/2] pinctrl: sunxi: add a missing function of A10/A20 pinctrl driver

于 2017年7月10日 GMT+08:00 下午4:44:00, Maxime Ripard 写到: >On Fri, Jul 07, 2017 at 07:21:19AM +0800, icen...@aosc.io wrote: >> 在 2017-07-07 04:46，Maxime Ripard 写道： >> > Hi, >> > >> > On Thu, Jul 06, 2017 at 10:28:21PM +0800, Icenowy Zheng wrote: >> >

Re: [PATCH 2/2] pinctrl: sunxi: add support of R40 to A10 pinctrl driver

于 2017年7月7日 GMT+08:00 下午5:18:38, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Fri, Jul 07, 2017 at 07:13:30AM +0800, Icenowy Zheng wrote: >> >> >> 于 2017年7月7日 GMT+08:00 上午4:50:30, Maxime Ripard ><maxime.rip...@free-electrons.com> 写到: >>

Re: [PATCH 2/2] pinctrl: sunxi: add support of R40 to A10 pinctrl driver

于 2017年7月7日 GMT+08:00 下午5:18:38, Maxime Ripard 写到: >On Fri, Jul 07, 2017 at 07:13:30AM +0800, Icenowy Zheng wrote: >> >> >> 于 2017年7月7日 GMT+08:00 上午4:50:30, Maxime Ripard > 写到: >> >On Thu, Jul 06, 2017 at 10:28:22PM +0800, Icenowy Zheng wrote: >>

Re: [PATCH 2/2] pinctrl: sunxi: add support of R40 to A10 pinctrl driver

于 2017年7月7日 GMT+08:00 上午4:50:30, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Thu, Jul 06, 2017 at 10:28:22PM +0800, Icenowy Zheng wrote: >> SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), >>SUNXI_FUNCTION(0x0, "gpio_in"), >>

Re: [PATCH 2/2] pinctrl: sunxi: add support of R40 to A10 pinctrl driver

于 2017年7月7日 GMT+08:00 上午4:50:30, Maxime Ripard 写到: >On Thu, Jul 06, 2017 at 10:28:22PM +0800, Icenowy Zheng wrote: >> SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), >>SUNXI_FUNCTION(0x0, "gpio_in"), >>SUNXI_FUNCTION(0x1, "gpio_out

[PATCH 2/2] pinctrl: sunxi: add support of R40 to A10 pinctrl driver

R40 is said to be an upgrade of A20, and its pin configuration is also similar to A20 (and thus similar to A10). Add support for R40 to the A10 pinctrl driver. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/pinctrl/sunxi/Kconfig | 2 +- drivers/pinctrl/sunxi/p

[PATCH 2/2] pinctrl: sunxi: add support of R40 to A10 pinctrl driver

R40 is said to be an upgrade of A20, and its pin configuration is also similar to A20 (and thus similar to A10). Add support for R40 to the A10 pinctrl driver. Signed-off-by: Icenowy Zheng --- drivers/pinctrl/sunxi/Kconfig | 2 +- drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 280

[PATCH 0/2] Last step to working Allwinner R40 pinctrl

This patchset contains only two patches. The first one is a minor fix for the A10 pinctrl driver, add a function of a pin, which used to be missing in A10/A20 pinctrl driver. The second one is the real R40 pinctrl part, with fixes suggested by Chen-Yu. Icenowy Zheng (2): pinctrl: sunxi: add

[PATCH 1/2] pinctrl: sunxi: add a missing function of A10/A20 pinctrl driver

to the A10 one, we need to only fix the A10 driver now. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c in

[PATCH 0/2] Last step to working Allwinner R40 pinctrl

This patchset contains only two patches. The first one is a minor fix for the A10 pinctrl driver, add a function of a pin, which used to be missing in A10/A20 pinctrl driver. The second one is the real R40 pinctrl part, with fixes suggested by Chen-Yu. Icenowy Zheng (2): pinctrl: sunxi: add

[PATCH 1/2] pinctrl: sunxi: add a missing function of A10/A20 pinctrl driver

to the A10 one, we need to only fix the A10 driver now. Signed-off-by: Icenowy Zheng --- drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c index 159580c04b14..47

Re: [PATCH v6 05/21] net-next: stmmac: Add dwmac-sun8i

于 2017年6月27日 GMT+08:00 下午6:15:58, Andre Przywara 写到: >Hi, > >On 27/06/17 10:41, Maxime Ripard wrote: >> On Tue, Jun 27, 2017 at 10:02:45AM +0100, Andre Przywara wrote: >>> Hi, >>> >>> (CC:ing some people from that Rockchip dmwac series) >>> >>> On 27/06/17 09:21,

Re: [PATCH v6 05/21] net-next: stmmac: Add dwmac-sun8i

于 2017年6月27日 GMT+08:00 下午6:15:58, Andre Przywara 写到: >Hi, > >On 27/06/17 10:41, Maxime Ripard wrote: >> On Tue, Jun 27, 2017 at 10:02:45AM +0100, Andre Przywara wrote: >>> Hi, >>> >>> (CC:ing some people from that Rockchip dmwac series) >>> >>> On 27/06/17 09:21, Corentin Labbe wrote: On

Re: [linux-sunxi] Re: [PATCH v6 05/21] net-next: stmmac: Add dwmac-sun8i

于 2017年6月27日 GMT+08:00 下午6:11:47, Chen-Yu Tsai 写到: >On Tue, Jun 27, 2017 at 5:41 PM, Maxime Ripard > wrote: >> On Tue, Jun 27, 2017 at 10:02:45AM +0100, Andre Przywara wrote: >>> Hi, >>> >>> (CC:ing some people from that Rockchip dmwac series)

Re: [linux-sunxi] Re: [PATCH v6 05/21] net-next: stmmac: Add dwmac-sun8i

于 2017年6月27日 GMT+08:00 下午6:11:47, Chen-Yu Tsai 写到: >On Tue, Jun 27, 2017 at 5:41 PM, Maxime Ripard > wrote: >> On Tue, Jun 27, 2017 at 10:02:45AM +0100, Andre Przywara wrote: >>> Hi, >>> >>> (CC:ing some people from that Rockchip dmwac series) >>> >>> On 27/06/17 09:21, Corentin Labbe wrote:

[PATCH 4/4] net-next: stmmac: dwmac-sun8i: add support for V3s EMAC

-related register seems to have changed from H3, but it seems to be a harmless change. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 1 + 2 files changed, 9 inse

[PATCH 4/4] net-next: stmmac: dwmac-sun8i: add support for V3s EMAC

-related register seems to have changed from H3, but it seems to be a harmless change. Signed-off-by: Icenowy Zheng --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 1 + 2 files changed, 9 insertions(+) diff --git a/drivers

[PATCH 3/4] net-next: stmmac: dwmac-sun8i: force EPHY clock freq to 24MHz

the EPHY clock frequency to 24MHz. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c

[PATCH 3/4] net-next: stmmac: dwmac-sun8i: force EPHY clock freq to 24MHz

the EPHY clock frequency to 24MHz. Signed-off-by: Icenowy Zheng --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c index 54f93ee53ef7

[PATCH 2/4] dt-bindings: syscon: Add DT bindings documentation for Allwinner V3s syscon

Allwinner V3s SoC has a syscon like the one in H3. Add its compatible string. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Documentation/devicetree/bindings/misc/allwinner,syscon.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/misc/all

[PATCH 2/4] dt-bindings: syscon: Add DT bindings documentation for Allwinner V3s syscon

Allwinner V3s SoC has a syscon like the one in H3. Add its compatible string. Signed-off-by: Icenowy Zheng --- Documentation/devicetree/bindings/misc/allwinner,syscon.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/misc/allwinner,syscon.txt b

[PATCH 1/4] dt-bindings: net-next: Add DT bindings documentation for Allwinner V3s EMAC

Allwinner V3s SoC has a Ethernet MAC like the one in Allwinner H3, but have no external MII capability. That means that it can only use the EPHY and cannot do Gbps transmission. Add binding for it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Documentation/devicetree/bindings/net

[PATCH 1/4] dt-bindings: net-next: Add DT bindings documentation for Allwinner V3s EMAC

Allwinner V3s SoC has a Ethernet MAC like the one in Allwinner H3, but have no external MII capability. That means that it can only use the EPHY and cannot do Gbps transmission. Add binding for it. Signed-off-by: Icenowy Zheng --- Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 10

[PATCH 0/4] net-next: stmmac: dwmac-sun8i: add support for V3s

SoCs doesn't have extra xtal input for EPHY, and the main xtal is 24MHz. The default value of H3 is set to 24MHz, but the V3s default value is set to 25MHz). First two patches are device tree binding patches, the third forces the frequency to 24MHz and the fourth really add the V3s support. Icenowy

[PATCH 0/4] net-next: stmmac: dwmac-sun8i: add support for V3s

SoCs doesn't have extra xtal input for EPHY, and the main xtal is 24MHz. The default value of H3 is set to 24MHz, but the V3s default value is set to 25MHz). First two patches are device tree binding patches, the third forces the frequency to 24MHz and the fourth really add the V3s support. Icenowy

Re: [linux-sunxi] Re: [PATCH 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk

于 2017年6月15日 GMT+08:00 上午11:54:08, Vinod Koul 写到: >On Wed, Jun 14, 2017 at 11:04:39AM +0200, Maxime Ripard wrote: >> On Wed, Jun 14, 2017 at 02:15:29PM +0530, Vinod Koul wrote: >> > > SoC info is in compatible, so there's no reason to make it a >property. >> > >> > that's

Re: [linux-sunxi] Re: [PATCH 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk

于 2017年6月15日 GMT+08:00 上午11:54:08, Vinod Koul 写到: >On Wed, Jun 14, 2017 at 11:04:39AM +0200, Maxime Ripard wrote: >> On Wed, Jun 14, 2017 at 02:15:29PM +0530, Vinod Koul wrote: >> > > SoC info is in compatible, so there's no reason to make it a >property. >> > >> > that's why it would need to

Re: [linux-sunxi] Re: [PATCH 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk

于 2017年6月14日 GMT+08:00 下午4:45:29, Vinod Koul <vinod.k...@intel.com> 写到: >On Wed, Jun 14, 2017 at 04:32:57PM +0800, Icenowy Zheng wrote: >> >> >> 于 2017年6月14日 GMT+08:00 下午4:32:52, Vinod Koul <vinod.k...@intel.com> >写到: >> >On Mon, Jun 05,

Re: [linux-sunxi] Re: [PATCH 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk

于 2017年6月14日 GMT+08:00 下午4:45:29, Vinod Koul 写到: >On Wed, Jun 14, 2017 at 04:32:57PM +0800, Icenowy Zheng wrote: >> >> >> 于 2017年6月14日 GMT+08:00 下午4:32:52, Vinod Koul >写到: >> >On Mon, Jun 05, 2017 at 08:33:47PM +0800, Icenowy Zheng wrote: >> >> Fr

Re: [PATCH 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk

于 2017年6月14日 GMT+08:00 下午4:32:52, Vinod Koul <vinod.k...@intel.com> 写到: >On Mon, Jun 05, 2017 at 08:33:47PM +0800, Icenowy Zheng wrote: >> From: Icenowy Zheng <icen...@aosc.xyz> >> >> Originally we enable a special gate bit when the compatible indicates >&

Re: [PATCH 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk

于 2017年6月14日 GMT+08:00 下午4:32:52, Vinod Koul 写到: >On Mon, Jun 05, 2017 at 08:33:47PM +0800, Icenowy Zheng wrote: >> From: Icenowy Zheng >> >> Originally we enable a special gate bit when the compatible indicates >> A23/33. >> >> But according to

Re: [PATCH v2 07/11] drm: sun4i: add support for the TV encoder in H3 SoC

于 2017年6月13日 GMT+08:00 下午3:44:32, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Sun, Jun 11, 2017 at 02:43:42PM +0800, icen...@aosc.io wrote: >> 在 2017-06-07 17:38，Maxime Ripard 写道： >> > On Mon, Jun 05, 2017 at 12:01:45AM +0800, Icenowy Zheng wrote: >>

Re: [PATCH v2 07/11] drm: sun4i: add support for the TV encoder in H3 SoC

于 2017年6月13日 GMT+08:00 下午3:44:32, Maxime Ripard 写到: >On Sun, Jun 11, 2017 at 02:43:42PM +0800, icen...@aosc.io wrote: >> 在 2017-06-07 17:38，Maxime Ripard 写道： >> > On Mon, Jun 05, 2017 at 12:01:45AM +0800, Icenowy Zheng wrote: >> > > Allwinner H3 features a

Re: [linux-sunxi] Re: [PATCH v2 01/11] dt-bindings: update the binding for Allwinner H3 TVE support

于 2017年6月10日 GMT+08:00 上午12:49:15, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Wed, Jun 07, 2017 at 04:48:50PM +0800, Icenowy Zheng wrote: >> >> @@ -189,6 +211,8 @@ supported. >> >> Required properties: >> >>- compatible: value mus

Re: [linux-sunxi] Re: [PATCH v2 01/11] dt-bindings: update the binding for Allwinner H3 TVE support

于 2017年6月10日 GMT+08:00 上午12:49:15, Maxime Ripard 写到: >On Wed, Jun 07, 2017 at 04:48:50PM +0800, Icenowy Zheng wrote: >> >> @@ -189,6 +211,8 @@ supported. >> >> Required properties: >> >>- compatible: value must be one of: >> >> * a

Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

于 2017年6月7日 GMT+08:00 下午10:19:57, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Wed, Jun 07, 2017 at 05:44:56PM +0800, Icenowy Zheng wrote: >> 于 2017年6月7日 GMT+08:00 下午5:43:43, Maxime Ripard ><maxime.rip...@free-electrons.com> 写到: >> >On Mon, Jun 05,

Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

于 2017年6月7日 GMT+08:00 下午10:19:57, Maxime Ripard 写到: >On Wed, Jun 07, 2017 at 05:44:56PM +0800, Icenowy Zheng wrote: >> 于 2017年6月7日 GMT+08:00 下午5:43:43, Maxime Ripard > 写到: >> >On Mon, Jun 05, 2017 at 03:03:47AM +0800, Icenowy Zheng wrote: >> >>

Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

于 2017年6月7日 GMT+08:00 下午5:43:43, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Mon, Jun 05, 2017 at 03:03:47AM +0800, Icenowy Zheng wrote: >> >You should also expand function sun4i_drv_node_is_tcon() at >sun4i_drv.c >> >with >> >new

Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

于 2017年6月7日 GMT+08:00 下午5:43:43, Maxime Ripard 写到: >On Mon, Jun 05, 2017 at 03:03:47AM +0800, Icenowy Zheng wrote: >> >You should also expand function sun4i_drv_node_is_tcon() at >sun4i_drv.c >> >with >> >new entries, but I'm not sure if this fits in t

Re: [PATCH v2 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2

于 2017年6月7日 GMT+08:00 下午5:35:12, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Mon, Jun 05, 2017 at 12:01:41AM +0800, Icenowy Zheng wrote: >> Some SoC's DE2 has two mixers. Defaultly the mixer0 is connected to >> tcon0 and mixer1 is connected to tcon1; how

Re: [PATCH v2 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2

于 2017年6月7日 GMT+08:00 下午5:35:12, Maxime Ripard 写到: >On Mon, Jun 05, 2017 at 12:01:41AM +0800, Icenowy Zheng wrote: >> Some SoC's DE2 has two mixers. Defaultly the mixer0 is connected to >> tcon0 and mixer1 is connected to tcon1; however by setting a bit >> the conn

Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

于 2017年6月7日 GMT+08:00 下午5:43:43, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Mon, Jun 05, 2017 at 03:03:47AM +0800, Icenowy Zheng wrote: >> >You should also expand function sun4i_drv_node_is_tcon() at >sun4i_drv.c >> >with >> >new

Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

于 2017年6月7日 GMT+08:00 下午5:43:43, Maxime Ripard 写到: >On Mon, Jun 05, 2017 at 03:03:47AM +0800, Icenowy Zheng wrote: >> >You should also expand function sun4i_drv_node_is_tcon() at >sun4i_drv.c >> >with >> >new entries, but I'm not sure if this fits in t

Re: [PATCH v2 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2

于 2017年6月7日 GMT+08:00 下午5:35:12, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Mon, Jun 05, 2017 at 12:01:41AM +0800, Icenowy Zheng wrote: >> Some SoC's DE2 has two mixers. Defaultly the mixer0 is connected to >> tcon0 and mixer1 is connected to tcon1; how

Re: [PATCH v2 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2

于 2017年6月7日 GMT+08:00 下午5:35:12, Maxime Ripard 写到: >On Mon, Jun 05, 2017 at 12:01:41AM +0800, Icenowy Zheng wrote: >> Some SoC's DE2 has two mixers. Defaultly the mixer0 is connected to >> tcon0 and mixer1 is connected to tcon1; however by setting a bit >> the conn

Re: [PATCH v2 01/11] dt-bindings: update the binding for Allwinner H3 TVE support

于 2017年6月7日 GMT+08:00 下午4:45:44, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Mon, Jun 05, 2017 at 12:01:39AM +0800, Icenowy Zheng wrote: >> Allwinner H3 features a "DE2.0" and a TV Encoder. >> >> Add device tree bindings for the followin

Re: [PATCH v2 01/11] dt-bindings: update the binding for Allwinner H3 TVE support

于 2017年6月7日 GMT+08:00 下午4:45:44, Maxime Ripard 写到: >On Mon, Jun 05, 2017 at 12:01:39AM +0800, Icenowy Zheng wrote: >> Allwinner H3 features a "DE2.0" and a TV Encoder. >> >> Add device tree bindings for the following parts: >> - H3 TCONs >> - H3

[PATCH 3/3] arm64: allwinner: h5: enable dwmac-sun8i for Nano Pi NEO2

(which is controlled by a GPIO pin) and the actual Ethernet MAC node, referring the RGMII pins of the device. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 27 ++ 1 file changed, 27 insertions(+) diff --git a/arch

[PATCH 3/3] arm64: allwinner: h5: enable dwmac-sun8i for Nano Pi NEO2

(which is controlled by a GPIO pin) and the actual Ethernet MAC node, referring the RGMII pins of the device. Signed-off-by: Icenowy Zheng --- .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 27 ++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner

[PATCH 2/3] arm64: allwinner: h5: enable dwmac-sun8i for Orange Pi Prime

the RGMII pins of the device. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- .../dts/allwinner/sun50i-h5-orangepi-prime.dts | 27 ++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/

[PATCH 2/3] arm64: allwinner: h5: enable dwmac-sun8i for Orange Pi Prime

the RGMII pins of the device. Signed-off-by: Icenowy Zheng --- .../dts/allwinner/sun50i-h5-orangepi-prime.dts | 27 ++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi

[PATCH 1/3] arm64: allwinner: h5: sort the device nodes in / part for some boards

reg_vcc3v3 node to the position before reg_usb0_vbus. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts| 14 +++--- arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 14 +++--- 2 files changed, 14 inse

[PATCH 1/3] arm64: allwinner: h5: sort the device nodes in / part for some boards

reg_vcc3v3 node to the position before reg_usb0_vbus. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts| 14 +++--- arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 14 +++--- 2 files changed, 14 insertions(+), 14 deletions

Re: [PATCH 00/10] irqchip: sunxi-nmi: Cleanups and fix A31 R_INTC register offset

于 2017年6月6日 GMT+08:00 下午11:32:12, Marc Zyngier 写到: >On 06/06/17 06:59, Chen-Yu Tsai wrote: >> Hi everyone, >> >> This is an alternative to Icenowy's recent A64 R_INTC patches. >> >> This is a two part series. The first four patches clean up the >existing >> sunxi-nmi

Re: [PATCH 00/10] irqchip: sunxi-nmi: Cleanups and fix A31 R_INTC register offset

于 2017年6月6日 GMT+08:00 下午11:32:12, Marc Zyngier 写到: >On 06/06/17 06:59, Chen-Yu Tsai wrote: >> Hi everyone, >> >> This is an alternative to Icenowy's recent A64 R_INTC patches. >> >> This is a two part series. The first four patches clean up the >existing >> sunxi-nmi driver. Patches five and

[PATCH v4 3/3] ASoC: sun4i-codec: Add support for V3s codec

From: Icenowy Zheng <icen...@aosc.xyz> The codec in the V3s is similar to the one found on the A31. One key difference is the analog path controls are routed through the PRCM block. This is supported by the sun8i-codec-analog driver, and tied into this codec driver with the audio card's a

[PATCH v4 3/3] ASoC: sun4i-codec: Add support for V3s codec

From: Icenowy Zheng The codec in the V3s is similar to the one found on the A31. One key difference is the analog path controls are routed through the PRCM block. This is supported by the sun8i-codec-analog driver, and tied into this codec driver with the audio card's aux_dev. In addition

[PATCH v4 2/3] ASoC: sun8i-codec-analog: add support for V3s SoC

From: Icenowy Zheng <icen...@aosc.xyz> The V3s SoC features an analog codec with headphone support but without mic2 and linein. Add support for it. Signed-off-by: Icenowy Zheng <icen...@aosc.xyz> Reviewed-by: Chen-Yu Tsai <w...@csie.org> Acked-by: Rob Herring <r...@kernel.o

[PATCH v4 2/3] ASoC: sun8i-codec-analog: add support for V3s SoC

From: Icenowy Zheng The V3s SoC features an analog codec with headphone support but without mic2 and linein. Add support for it. Signed-off-by: Icenowy Zheng Reviewed-by: Chen-Yu Tsai Acked-by: Rob Herring --- Changes in v4: - Added Chen-Yu's Reviewed-By. - Added Rob's ACK. Documentation

[PATCH v4 1/3] ASoC: sun8i-codec-analog: prepare a mixer control/widget/route set for V3s

-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v4: - Added TODO comment. - Check the return value of sun8i_codec_analog_add_mixer(). sound/soc/sunxi/sun8i-codec-analog.c | 101 ++- 1 file changed, 100 insertions(+), 1 deletion(-) diff --git a/sound/soc/sunxi

[PATCH v4 1/3] ASoC: sun8i-codec-analog: prepare a mixer control/widget/route set for V3s

-by: Icenowy Zheng --- Changes in v4: - Added TODO comment. - Check the return value of sun8i_codec_analog_add_mixer(). sound/soc/sunxi/sun8i-codec-analog.c | 101 ++- 1 file changed, 100 insertions(+), 1 deletion(-) diff --git a/sound/soc/sunxi/sun8i-codec-analog.c b

[PATCH v4 0/3] Allwinner V3s audio codec support (ASoC part)

This is the ASoC part of the Allwinner V3s audio codec support. The audio codec is like the ones on A23/H3, but much simpler. As it lacks two features that used to be common (MIC2 and LINEIN), some structures are altered to exclude these features. Icenowy Zheng (3): ASoC: sun8i-codec-analog

[PATCH v4 0/3] Allwinner V3s audio codec support (ASoC part)

This is the ASoC part of the Allwinner V3s audio codec support. The audio codec is like the ones on A23/H3, but much simpler. As it lacks two features that used to be common (MIC2 and LINEIN), some structures are altered to exclude these features. Icenowy Zheng (3): ASoC: sun8i-codec-analog

[PATCH 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk

From: Icenowy Zheng <icen...@aosc.xyz> Originally we enable a special gate bit when the compatible indicates A23/33. But according to BSP sources and user manuals, more SoCs will need this gate bit. So make it a common quirk configured in the config struct. Signed-off-by: Icenowy Zheng

[PATCH 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk

From: Icenowy Zheng Originally we enable a special gate bit when the compatible indicates A23/33. But according to BSP sources and user manuals, more SoCs will need this gate bit. So make it a common quirk configured in the config struct. Signed-off-by: Icenowy Zheng --- Changes since

[PATCH 2/2] dmaengine: sun6i: support V3s SoC variant

From: Icenowy Zheng <icen...@aosc.xyz> Allwinner V3s has a DMA engine similar to the ones from A31, but with fewer channels and DRQs. Add support for it. Signed-off-by: Icenowy Zheng <icen...@aosc.xyz> Acked-by: Chen-Yu Tsai <w...@csie.org> Acked-by: Rob Herring <r...@ke

[PATCH 2/2] dmaengine: sun6i: support V3s SoC variant

From: Icenowy Zheng Allwinner V3s has a DMA engine similar to the ones from A31, but with fewer channels and DRQs. Add support for it. Signed-off-by: Icenowy Zheng Acked-by: Chen-Yu Tsai Acked-by: Rob Herring --- Changes since the original codec patchset v3: - Added Rob's ACK

[PATCH 0/2] Allwinner V3s DMA support

This is a dedicated patchset of Allwinner V3s DMA support, which used to be part of the audio codec support patchset. It's a derivation of the DMA part of v3 of the codec patchset. Icenowy Zheng (2): dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk dmaengine: sun6i

[PATCH 0/2] Allwinner V3s DMA support

This is a dedicated patchset of Allwinner V3s DMA support, which used to be part of the audio codec support patchset. It's a derivation of the DMA part of v3 of the codec patchset. Icenowy Zheng (2): dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk dmaengine: sun6i

Re: [linux-sunxi] Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC

于 2017年6月5日 GMT+08:00 下午3:53:50, Marc Zyngier <marc.zyng...@arm.com> 写到: >On 05/06/17 06:57, Chen-Yu Tsai wrote: >> Hi Marc, >> >> On Mon, May 22, 2017 at 10:25 PM, Chen-Yu Tsai <w...@csie.org> wrote: >>> On Mon, May 22, 2017 at 5:41 PM, Icenowy Zheng

Re: [linux-sunxi] Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC

于 2017年6月5日 GMT+08:00 下午3:53:50, Marc Zyngier 写到: >On 05/06/17 06:57, Chen-Yu Tsai wrote: >> Hi Marc, >> >> On Mon, May 22, 2017 at 10:25 PM, Chen-Yu Tsai wrote: >>> On Mon, May 22, 2017 at 5:41 PM, Icenowy Zheng >wrote: >>>> >>>>

Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

于 2017年6月5日 GMT+08:00 上午2:46:24, "Jernej Škrabec" <jernej.skra...@siol.net> 写到: >Hi, > >Dne nedelja, 04. junij 2017 ob 18:01:42 CEST je Icenowy Zheng >napisal(a): >> From: Icenowy Zheng <icen...@aosc.xyz> >> >> Allwinner H3 has two special

Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

于 2017年6月5日 GMT+08:00 上午2:46:24, "Jernej Škrabec" 写到: >Hi, > >Dne nedelja, 04. junij 2017 ob 18:01:42 CEST je Icenowy Zheng >napisal(a): >> From: Icenowy Zheng >> >> Allwinner H3 has two special TCONs, both come without channel0. And >th

[PATCH] net-next: stmmac: dwmac-sun8i: ensure the EPHY is properly reseted

ot-plugged in. Fixes: 9f93ac8d408 ("net-next: stmmac: Add dwmac-sun8i") Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/dr

[PATCH] net-next: stmmac: dwmac-sun8i: ensure the EPHY is properly reseted

ot-plugged in. Fixes: 9f93ac8d408 ("net-next: stmmac: Add dwmac-sun8i") Signed-off-by: Icenowy Zheng --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/

[PATCH v2 02/11] drm: sun4i: add support for H3 mixers

From: Icenowy Zheng <icen...@aosc.xyz> Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI channels, and the other has 1 VI and 1 UI. Add support for these two variants. Signed-off-by: Icenowy Zheng <icen...@aosc.xyz> --- drivers/gpu/drm/sun4i/sun8i_

[PATCH v2 02/11] drm: sun4i: add support for H3 mixers

From: Icenowy Zheng Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI channels, and the other has 1 VI and 1 UI. Add support for these two variants. Signed-off-by: Icenowy Zheng --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 18 ++ 1 file changed, 18 insertions

[PATCH v2 07/11] drm: sun4i: add support for the TV encoder in H3 SoC

Allwinner H3 features a TV encoder similar to the one in earlier SoCs, but has a internal fixed clock divider that divides the TCON1 clock (called TVE clock in datasheet) by 11. Add support for it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v2: - Quirk part rew

[PATCH v2 06/11] drm: sun4i: add color space correction support for DE2 mixer

The DE2 mixer can do color space correction needed by TV Encoder with its DCSC sub-engine. Add support for it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 35 +++ drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 +++

[PATCH v2 08/11] clk: sunxi-ng: allow CLK_DE to set CLK_PLL_DE for H3

_DE to set CLK_PLL_DE (add CLK_SET_RATE_PARENT to it). Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c in

[PATCH v2 08/11] clk: sunxi-ng: allow CLK_DE to set CLK_PLL_DE for H3

_DE to set CLK_PLL_DE (add CLK_SET_RATE_PARENT to it). Signed-off-by: Icenowy Zheng --- drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c index 62e4f0d2b2fc..b6a1636c2

[PATCH v2 07/11] drm: sun4i: add support for the TV encoder in H3 SoC

Allwinner H3 features a TV encoder similar to the one in earlier SoCs, but has a internal fixed clock divider that divides the TCON1 clock (called TVE clock in datasheet) by 11. Add support for it. Signed-off-by: Icenowy Zheng --- Changes in v2: - Quirk part rewritten. drivers/gpu/drm/sun4i

[PATCH v2 06/11] drm: sun4i: add color space correction support for DE2 mixer

The DE2 mixer can do color space correction needed by TV Encoder with its DCSC sub-engine. Add support for it. Signed-off-by: Icenowy Zheng --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 35 +++ drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 +- 2 files changed, 40

[PATCH v2 05/11] drm: sun4i: add compatible for H3 display engine

Add a compatible string for H3 display engine in sun4i_drv code. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/gpu/drm/sun4i/sun4i_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index 775eee

[PATCH v2 05/11] drm: sun4i: add compatible for H3 display engine

Add a compatible string for H3 display engine in sun4i_drv code. Signed-off-by: Icenowy Zheng --- drivers/gpu/drm/sun4i/sun4i_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index 775eee82d8a9..2003507b41a6 100644

[PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

From: Icenowy Zheng <icen...@aosc.xyz> Allwinner H3 has two special TCONs, both come without channel0. And the TCON1 of H3 has no special clocks even for the channel1. Add support for these kinds of TCON. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v2: - Merged TCO

[PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

From: Icenowy Zheng Allwinner H3 has two special TCONs, both come without channel0. And the TCON1 of H3 has no special clocks even for the channel1. Add support for these kinds of TCON. Signed-off-by: Icenowy Zheng --- Changes in v2: - Merged TCON0 and TCON1 quirks and compatibles. drivers

[PATCH v2 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2

for the swapped connection. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v2: - Change to use new endpoint reg definition. drivers/gpu/drm/sun4i/sun4i_drv.c | 45 drivers/gpu/drm/sun4i/sun4i_tcon.c | 61 -- drive

[PATCH v2 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2

for the swapped connection. Signed-off-by: Icenowy Zheng --- Changes in v2: - Change to use new endpoint reg definition. drivers/gpu/drm/sun4i/sun4i_drv.c | 45 drivers/gpu/drm/sun4i/sun4i_tcon.c | 61 -- drivers/gpu/drm/sun4i

[PATCH v2 11/11] [DO NOT MERGE] ARM: sun8i: h3: enable TV output on Orange Pi PC

Orange Pi PC features a 3.5mm jack with TV output in it. Enable the TV output. As it currently do not have jack detection feature, do not merge this patch. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 12 1 file chang

[PATCH v2 11/11] [DO NOT MERGE] ARM: sun8i: h3: enable TV output on Orange Pi PC

Orange Pi PC features a 3.5mm jack with TV output in it. Enable the TV output. As it currently do not have jack detection feature, do not merge this patch. Signed-off-by: Icenowy Zheng --- arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 12 1 file changed, 12 insertions(+) diff

[PATCH v2 09/11] clk: sunxi-ng: export CLK_PLL_DE for H3

The CLK_PLL_DE is needed to be referenced in device tree for H3, for both forcing the parent of PLL_DE. So export it to the device tree binding header. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 3 +-- include/dt-bindings/clock/sun8i-h3

[PATCH v2 10/11] ARM: sun8i: h3: add display engine pipeline for TVE

. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v2: - Changes according to new dt bindings. arch/arm/boot/dts/sun8i-h3.dtsi | 186 1 file changed, 186 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h

[PATCH v2 09/11] clk: sunxi-ng: export CLK_PLL_DE for H3

The CLK_PLL_DE is needed to be referenced in device tree for H3, for both forcing the parent of PLL_DE. So export it to the device tree binding header. Signed-off-by: Icenowy Zheng --- drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 3 +-- include/dt-bindings/clock/sun8i-h3-ccu.h | 2 ++ 2 files

[PATCH v2 10/11] ARM: sun8i: h3: add display engine pipeline for TVE

. Signed-off-by: Icenowy Zheng --- Changes in v2: - Changes according to new dt bindings. arch/arm/boot/dts/sun8i-h3.dtsi | 186 1 file changed, 186 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index b36f9f423c39

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