as GPIO (so it's with 2.0mm pitch, not 2.54mm as
other GPIO headers).
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
as GPIO (so it's with 2.0mm pitch, not 2.54mm as
other GPIO headers).
Signed-off-by: Icenowy Zheng
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
b/arch/arm64/boot/dts
Add support of AXP803 regulators in the Pine64 device tree, in order to
enable many future functionalities, e.g. Wi-Fi.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v6:
- Rebased on next-20170517.
.../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 109 ++
Add support of AXP803 regulators in the Pine64 device tree, in order to
enable many future functionalities, e.g. Wi-Fi.
Signed-off-by: Icenowy Zheng
---
Changes in v6:
- Rebased on next-20170517.
.../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 109 +
1 file changed
As nearly all A64 boards are using AXP803 PMIC, add a DTSI file for it,
like the old DTSI files for AXP20x/22x, for the common parts of the
PMIC.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
Acked-by: Mark Brown <broo...@kernel.org>
---
Changes in v5:
- Added Mark Brown's ACK.
C
AXP803 PMIC also have a series of regulators (DCDCs and LDOs)
controllable via I2C/RSB bus.
Add support for them.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
Acked-by: Chen-Yu Tsai <w...@csie.org>
---
Changes in v4:
- Fixed somewhere which mention AXP806 before 803.
Changes in
As axp20x-regulator now supports AXP803, add a cell for it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
Acked-by: Chen-Yu Tsai <w...@csie.org>
---
Changes in v5:
- Removed wrong snippet.
Changes in v4:
- Added a trailing comma for new cell, for easier further cell addition.
C
As nearly all A64 boards are using AXP803 PMIC, add a DTSI file for it,
like the old DTSI files for AXP20x/22x, for the common parts of the
PMIC.
Signed-off-by: Icenowy Zheng
Acked-by: Mark Brown
---
Changes in v5:
- Added Mark Brown's ACK.
Changes in v4:
- Re-sorted the nodes.
arch/arm64
AXP803 PMIC also have a series of regulators (DCDCs and LDOs)
controllable via I2C/RSB bus.
Add support for them.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v4:
- Fixed somewhere which mention AXP806 before 803.
Changes in v2:
- Place AXP803 codes before AXP806/809 ones
As axp20x-regulator now supports AXP803, add a cell for it.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v5:
- Removed wrong snippet.
Changes in v4:
- Added a trailing comma for new cell, for easier further cell addition.
Changes in v3:
- Make the new cell one-liner
The Pine64 (including Pine64+) boards have an AXP803 as its main PMIC.
Add its device node.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v6:
- Rebase on next-20170517.
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 11 +++
1 file changed, 11 insertions(+)
The Pine64 (including Pine64+) boards have an AXP803 as its main PMIC.
Add its device node.
Signed-off-by: Icenowy Zheng
---
Changes in v6:
- Rebase on next-20170517.
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch
The A31 NMI driver seems to be using wrong base address.
As we're going to convert to use a correct NMI base address (and
correctly name it to R_INTC as the datasheet suggests), add a new
compatible string for the "correct" R_INTC, which we will use for A64
SoC.
Signed-off-by: Ice
The A31 NMI driver seems to be using wrong base address.
As we're going to convert to use a correct NMI base address (and
correctly name it to R_INTC as the datasheet suggests), add a new
compatible string for the "correct" R_INTC, which we will use for A64
SoC.
Signed-off-by: Ice
in AXP20x regulatoe driver.
(The binding is already applied)
PATCH 6 enables the AXP803 regulator cell in MFD driver.
PATCH 7 adds a DTSI file for AXP803, like other older AXP PMICs.
PATCH 8 enables AXP803 regulators in Pine64 device tree.
PATCH 9 enables Wi-Fi for Pine64.
Icenowy Zheng (9
in AXP20x regulatoe driver.
(The binding is already applied)
PATCH 6 enables the AXP803 regulator cell in MFD driver.
PATCH 7 adds a DTSI file for AXP803, like other older AXP PMICs.
PATCH 8 enables AXP803 regulators in Pine64 device tree.
PATCH 9 enables Wi-Fi for Pine64.
Icenowy Zheng (9
The Lichee Pi Zero Dock dtb file is not added to the Makefile, so that
it won't be built; and the file contains a problem that prevents it
from being correctly built.
Fix these issues.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm/boot/dts/Makefile
The Lichee Pi Zero Dock dtb file is not added to the Makefile, so that
it won't be built; and the file contains a problem that prevents it
from being correctly built.
Fix these issues.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/Makefile | 3 ++-
arch/arm/boot
于 2017年5月18日 GMT+08:00 上午1:37:39, Maxime Ripard
<maxime.rip...@free-electrons.com> 写到:
>On Wed, May 17, 2017 at 10:47:16PM +0800, Icenowy Zheng wrote:
>> This patchset is the initial patchset for Allwinner DE2 support.
>>
>> As the DE2 CCU support is already applied,
于 2017年5月18日 GMT+08:00 上午1:37:39, Maxime Ripard
写到:
>On Wed, May 17, 2017 at 10:47:16PM +0800, Icenowy Zheng wrote:
>> This patchset is the initial patchset for Allwinner DE2 support.
>>
>> As the DE2 CCU support is already applied, this patchset now contains
>>
From: Icenowy Zheng <icen...@aosc.xyz>
Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI channels,
and the other has 1 VI and 1 UI.
Add support for these two variants.
Signed-off-by: Icenowy Zheng <icen...@aosc.xyz>
---
drivers/gpu/drm/sun4i/sun8i_
From: Icenowy Zheng
Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI channels,
and the other has 1 VI and 1 UI.
Add support for these two variants.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 18 ++
1 file changed, 18 insertions
.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 189
1 file changed, 189 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index b36f9f423c39..20172ef92415 100644
--- a/ar
.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-h3.dtsi | 189
1 file changed, 189 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index b36f9f423c39..20172ef92415 100644
--- a/arch/arm/boot/dts/sun8i-h3
The CLK_PLL_DE is needed to be referenced in device tree for H3, for
both forcing the parent of PLL_DE.
So export it to the device tree binding header.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 3 +--
include/dt-bindings/clock/sun8i-h3
The CLK_PLL_DE is needed to be referenced in device tree for H3, for
both forcing the parent of PLL_DE.
So export it to the device tree binding header.
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 3 +--
include/dt-bindings/clock/sun8i-h3-ccu.h | 2 ++
2 files
_DE to set CLK_PLL_DE (add CLK_SET_RATE_PARENT to it).
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
in
_DE to set CLK_PLL_DE (add CLK_SET_RATE_PARENT to it).
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
index 4cbc1b701b7c..6e39ba7cb
The DE2 mixer can do color space correction needed by TV Encoder with
its DCSC sub-engine.
Add support for it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 35 +++
drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 +++
Allwinner H3 features a TV encoder similar to the one in earlier SoCs,
but with some different points about clocks:
- It has a mod clock and a bus clock.
- The mod clock must be at a fixed rate to generate signal.
Add support for it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
d
The DE2 mixer can do color space correction needed by TV Encoder with
its DCSC sub-engine.
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 35 +++
drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 +-
2 files changed, 40
Allwinner H3 features a TV encoder similar to the one in earlier SoCs,
but with some different points about clocks:
- It has a mod clock and a bus clock.
- The mod clock must be at a fixed rate to generate signal.
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i
From: Icenowy Zheng <icen...@aosc.xyz>
Allwinner H3 has two special TCONs, both come without channel0. And the
TCON1 of H3 has no special clocks even for the channel1.
Add support for these kinds of TCON.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
drivers/gpu/drm/sun4i/
From: Icenowy Zheng
Allwinner H3 has two special TCONs, both come without channel0. And the
TCON1 of H3 has no special clocks even for the channel1.
Add support for these kinds of TCON.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 78
for the swapped
connection.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 27 ++
drivers/gpu/drm/sun4i/sun4i_tcon.c | 39 +-
drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 ++
3 files changed, 59 inse
for the swapped
connection.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 27 ++
drivers/gpu/drm/sun4i/sun4i_tcon.c | 39 +-
drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 ++
3 files changed, 59 insertions(+), 9 deletions
Add a compatible string for H3 display engine in sun4i_drv code.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 29bf13
Add a compatible string for H3 display engine in sun4i_drv code.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 29bf1325ded6..c0de0741c923 100644
Orange Pi PC features a 3.5mm jack with TV output in it.
Enable the TV output.
As it currently do not have jack detection feature, do not merge this
patch.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 12
1 file chang
Orange Pi PC features a 3.5mm jack with TV output in it.
Enable the TV output.
As it currently do not have jack detection feature, do not merge this
patch.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 12
1 file changed, 12 insertions(+)
diff
Allwinner H3 features a "DE2.0" and a TV Encoder.
Add device tree bindings for the following parts:
- H3 TCONs
- H3 Mixers
- The connection between H3 TCONs and H3 Mixers
- H3 TV Encoder
- H3 Display engine
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
.../bindings/dis
Allwinner H3 features a "DE2.0" and a TV Encoder.
Add device tree bindings for the following parts:
- H3 TCONs
- H3 Mixers
- The connection between H3 TCONs and H3 Mixers
- H3 TV Encoder
- H3 Display engine
Signed-off-by: Icenowy Zheng
---
.../bindings/display/sunxi/sun
shouldn't be defaultly enabled now.
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/506806.html
Icenowy Zheng (11):
dt-bindings: update the binding for Allwinner H3 TVE support
drm: sun4i: add support for H3 mixers
drm: sun4i: ignore swapped mixer<->tcon connection for DE2
shouldn't be defaultly enabled now.
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/506806.html
Icenowy Zheng (11):
dt-bindings: update the binding for Allwinner H3 TVE support
drm: sun4i: add support for H3 mixers
drm: sun4i: ignore swapped mixer<->tcon connection for DE2
bridges' support is included
in this patchset, which makes it currently not usable on H3.
Thanks to Jean-Francois Moine and Jernej Skrabec for their efforts
to discover the internal of DE2!
[1] https://lists.freedesktop.org/archives/dri-devel/2016-December/126264.html
Icenowy Zheng (9):
drm/sun4i
bridges' support is included
in this patchset, which makes it currently not usable on H3.
Thanks to Jean-Francois Moine and Jernej Skrabec for their efforts
to discover the internal of DE2!
[1] https://lists.freedesktop.org/archives/dri-devel/2016-December/126264.html
Icenowy Zheng (9):
drm/sun4i
A 480x272 QiaoDian QD43003C0-40-7LED panel is available from Lichee Pi.
This commit connects this panel to Lichee Pi Zero.
Lichee Pi also provides a 800x480 panel without accurate model number,
so do not merge this patch. It will finally come as device tree overlay.
Signed-off-by: Icenowy Zheng
A 480x272 QiaoDian QD43003C0-40-7LED panel is available from Lichee Pi.
This commit connects this panel to Lichee Pi Zero.
Lichee Pi also provides a 800x480 panel without accurate model number,
so do not merge this patch. It will finally come as device tree overlay.
Signed-off-by: Icenowy Zheng
Allwinner V3s SoC features a set of pins that have functionality of RGB
LCD, the pins are at different pin ban than other SoCs.
Add pinctrl node for them.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
Acked-by: Chen-Yu Tsai <w...@csie.org>
---
Changes in v7:
- Dropped the
Allwinner V3s SoC features a set of pins that have functionality of RGB
LCD, the pins are at different pin ban than other SoCs.
Add pinctrl node for them.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v7:
- Dropped the trailing "@0" in rgb666 pinmux node name.
-
Allwinner V3s SoC features a "Display Engine 2.0" with only one mixer
and only one TCON connected to this mixer, which have RGB LCD output.
Add device nodes for this display pipeline.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v8:
- Changed some label name
Allwinner V3s SoC features a "Display Engine 2.0" with only one mixer
and only one TCON connected to this mixer, which have RGB LCD output.
Add device nodes for this display pipeline.
Signed-off-by: Icenowy Zheng
---
Changes in v8:
- Changed some label names.
Changes in v7:
- Change
Allwinner V3s SoC features a TCON without channel 1.
Add support for it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
Reviewed-by: Chen-Yu Tsai <w...@csie.org>
---
Changes in v7:
- Added Chen-Yu's Reviewed-by.
drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
drivers/gpu/drm/sun4i/sun4
Allwinner V3s SoC features a TCON without channel 1.
Add support for it.
Signed-off-by: Icenowy Zheng
Reviewed-by: Chen-Yu Tsai
---
Changes in v7:
- Added Chen-Yu's Reviewed-by.
drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +
2 files changed, 7
Allwinner V3s features the new "Display Engine 2.0", which can now also
be driven with our subdrivers in sun4i-drm.
Add the compatible string for in sun4i_drv.c, in order to make the
display engine and its components probed.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Allwinner V3s features the new "Display Engine 2.0", which can now also
be driven with our subdrivers in sun4i-drm.
Add the compatible string for in sun4i_drv.c, in order to make the
display engine and its components probed.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/s
ng -- more investigations
are needed to gain enough information for them.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v8:
- Set id manually to -1.
Changes in v7:
- Small fixed advised by Maxime Ripard.
- Added fixup on CRTC destination coordinate.
Changes in v6:
- Rebased
ng -- more investigations
are needed to gain enough information for them.
Signed-off-by: Icenowy Zheng
---
Changes in v8:
- Set id manually to -1.
Changes in v7:
- Small fixed advised by Maxime Ripard.
- Added fixup on CRTC destination coordinate.
Changes in v6:
- Rebased on wens's multi-pipelin
As sun4i-backend is now a dedicated module, add an Kconfig option for
it to make it optional, since some build may only use other engines.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v7:
- Adjusted the position of BACKEND makefile item. (It's now after
common codes
As sun4i-backend is now a dedicated module, add an Kconfig option for
it to make it optional, since some build may only use other engines.
Signed-off-by: Icenowy Zheng
---
Changes in v7:
- Adjusted the position of BACKEND makefile item. (It's now after
common codes shared between sun4i-backend
Currently the direct call from CRTC code to layer code has disappeared,
instead the layer's init function is called via the backend's ops.
Add a dedicated module for sun4i-backend and sun4i-layer, and drop the
EXPORT_SYMBOL from backend code to layer code.
Signed-off-by: Icenowy Zheng <i
Currently the direct call from CRTC code to layer code has disappeared,
instead the layer's init function is called via the backend's ops.
Add a dedicated module for sun4i-backend and sun4i-layer, and drop the
EXPORT_SYMBOL from backend code to layer code.
Signed-off-by: Icenowy Zheng
Reviewed
nner, so I choose to call them both "engine" here.
Abstract the engine type to a new struct with an ops struct, which contains
functions that should be called outside the engine-specified code (in
TCON, CRTC or TV Encoder code).
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
Re
nner, so I choose to call them both "engine" here.
Abstract the engine type to a new struct with an ops struct, which contains
functions that should be called outside the engine-specified code (in
TCON, CRTC or TV Encoder code).
Signed-off-by: Icenowy Zheng
Reviewed-by: Chen-Yu Tsa
-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 6ff50665e5e6..a49ebef53c91 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/ar
-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 6ff50665e5e6..a49ebef53c91 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i
于 2017年5月15日 GMT+08:00 下午5:20:01, Maxime Ripard
<maxime.rip...@free-electrons.com> 写到:
>On Mon, May 15, 2017 at 12:30:37AM +0800, Icenowy Zheng wrote:
>> As we are going to add support for the Allwinner DE2 engine in
>sun4i-drm
>> driver, we will finally have two
于 2017年5月15日 GMT+08:00 下午5:20:01, Maxime Ripard
写到:
>On Mon, May 15, 2017 at 12:30:37AM +0800, Icenowy Zheng wrote:
>> As we are going to add support for the Allwinner DE2 engine in
>sun4i-drm
>> driver, we will finally have two types of display engines -- the DE1
>> b
ng -- more investigations
are needed to gain enough information for them.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v7:
- Small fixed advised by Maxime Ripard.
- Added fixup on CRTC destination coordinate.
Changes in v6:
- Rebased on wens's multi-pipeline patchset.
Changes
ng -- more investigations
are needed to gain enough information for them.
Signed-off-by: Icenowy Zheng
---
Changes in v7:
- Small fixed advised by Maxime Ripard.
- Added fixup on CRTC destination coordinate.
Changes in v6:
- Rebased on wens's multi-pipeline patchset.
Changes in v5:
- Changed
As sun4i-backend is now a dedicated module, add an Kconfig option for
it to make it optional, since some build may only use other engines.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v7:
- Adjusted the position of BACKEND makefile item. (It's now after
common codes
As sun4i-backend is now a dedicated module, add an Kconfig option for
it to make it optional, since some build may only use other engines.
Signed-off-by: Icenowy Zheng
---
Changes in v7:
- Adjusted the position of BACKEND makefile item. (It's now after
common codes shared between sun4i-backend
A 480x272 QiaoDian QD43003C0-40-7LED panel is available from Lichee Pi.
This commit connects this panel to Lichee Pi Zero.
Lichee Pi also provides a 800x480 panel without accurate model number,
so do not merge this patch. It will finally come as device tree overlay.
Signed-off-by: Icenowy Zheng
Allwinner V3s SoC features a set of pins that have functionality of RGB
LCD, the pins are at different pin ban than other SoCs.
Add pinctrl node for them.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
Acked-by: Chen-Yu Tsai <w...@csie.org>
---
Changes in v7:
- Dropped the
Allwinner V3s SoC features a "Display Engine 2.0" with only one mixer
and only one TCON connected to this mixer, which have RGB LCD output.
Add device nodes for this display pipeline.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v7:
- Change DE2 clock compa
A 480x272 QiaoDian QD43003C0-40-7LED panel is available from Lichee Pi.
This commit connects this panel to Lichee Pi Zero.
Lichee Pi also provides a 800x480 panel without accurate model number,
so do not merge this patch. It will finally come as device tree overlay.
Signed-off-by: Icenowy Zheng
Allwinner V3s SoC features a set of pins that have functionality of RGB
LCD, the pins are at different pin ban than other SoCs.
Add pinctrl node for them.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v7:
- Dropped the trailing "@0" in rgb666 pinmux node name.
-
Allwinner V3s SoC features a "Display Engine 2.0" with only one mixer
and only one TCON connected to this mixer, which have RGB LCD output.
Add device nodes for this display pipeline.
Signed-off-by: Icenowy Zheng
---
Changes in v7:
- Change DE2 clock compatible to V3s one.
- Mentio
Currently the direct call from CRTC code to layer code has disappeared,
instead the layer's init function is called via the backend's ops.
Add a dedicated module for sun4i-backend and sun4i-layer, and drop the
EXPORT_SYMBOL from backend code to layer code.
Signed-off-by: Icenowy Zheng <i
Allwinner V3s SoC features a TCON without channel 1.
Add support for it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
Reviewed-by: Chen-Yu Tsai <w...@csie.org>
---
Changes in v7:
- Added Chen-Yu's Reviewed-by.
drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
drivers/gpu/drm/sun4i/sun4
Allwinner V3s SoC have a display engine which have a different pipeline
with older SoCs.
Add document for it (new compatibles and the new "mixer" part).
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes in v7:
- Reduced so
Currently the direct call from CRTC code to layer code has disappeared,
instead the layer's init function is called via the backend's ops.
Add a dedicated module for sun4i-backend and sun4i-layer, and drop the
EXPORT_SYMBOL from backend code to layer code.
Signed-off-by: Icenowy Zheng
Reviewed
Allwinner V3s SoC features a TCON without channel 1.
Add support for it.
Signed-off-by: Icenowy Zheng
Reviewed-by: Chen-Yu Tsai
---
Changes in v7:
- Added Chen-Yu's Reviewed-by.
drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +
2 files changed, 7
Allwinner V3s SoC have a display engine which have a different pipeline
with older SoCs.
Add document for it (new compatibles and the new "mixer" part).
Signed-off-by: Icenowy Zheng
Acked-by: Rob Herring
---
Changes in v7:
- Reduced some text.
Changes in v4:
- Removed the refact
The "Display Engine 2.0" in Allwinner newer SoCs contains a clock
management unit for its subunits, like the DE CCU in A80.
Add a sunxi-ng style driver for it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v7:
- Fixed some parent clocks that are left open if
The "Display Engine 2.0" in Allwinner newer SoCs contains a clock
management unit for its subunits, like the DE CCU in A80.
Add a sunxi-ng style driver for it.
Signed-off-by: Icenowy Zheng
---
Changes in v7:
- Fixed some parent clocks that are left open if the probe failed.
-
Allwinner V3s features the new "Display Engine 2.0", which can now also
be driven with our subdrivers in sun4i-drm.
Add the compatible string for in sun4i_drv.c, in order to make the
display engine and its components probed.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Allwinner V3s features the new "Display Engine 2.0", which can now also
be driven with our subdrivers in sun4i-drm.
Add the compatible string for in sun4i_drv.c, in order to make the
display engine and its components probed.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/s
in sun4i_crtc struct.
Doing this uncouples the CRTC code from the type of layer (the
sun4i_layers_init function name is still hardcoded and will be changed
in the next patch), so that we can finally gain support for the
mixer in DE2, which has different layers.
Signed-off-by: Icenowy Zheng <icen...@aosc
nner, so I choose to call them both "engine" here.
Abstract the engine type to a new struct with an ops struct, which contains
functions that should be called outside the engine-specified code (in
TCON, CRTC or TV Encoder code).
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
Re
in sun4i_crtc struct.
Doing this uncouples the CRTC code from the type of layer (the
sun4i_layers_init function name is still hardcoded and will be changed
in the next patch), so that we can finally gain support for the
mixer in DE2, which has different layers.
Signed-off-by: Icenowy Zheng
Reviewed-by: Chen
nner, so I choose to call them both "engine" here.
Abstract the engine type to a new struct with an ops struct, which contains
functions that should be called outside the engine-specified code (in
TCON, CRTC or TV Encoder code).
Signed-off-by: Icenowy Zheng
Reviewed-by: Chen-Yu Tsa
Allwinner "Display Engine 2.0" contains some clock controls in it.
In order to add them as clock drivers, we need a device tree binding.
Add the binding here.
Also add the device tree binding headers.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
Acked-by: Rob Herring
Allwinner "Display Engine 2.0" contains some clock controls in it.
In order to add them as clock drivers, we need a device tree binding.
Add the binding here.
Also add the device tree binding headers.
Signed-off-by: Icenowy Zheng
Acked-by: Rob Herring
---
Changes in v7:
- Added V3s
://lists.freedesktop.org/archives/dri-devel/2016-December/126264.html
Icenowy Zheng (13):
dt-bindings: add binding for the Allwinner DE2 CCU
clk: sunxi-ng: add support for DE2 CCU
dt-bindings: add bindings for DE2 on V3s SoC
drm/sun4i: return only planes for layers created
drm/sun4i: abstract a engine
://lists.freedesktop.org/archives/dri-devel/2016-December/126264.html
Icenowy Zheng (13):
dt-bindings: add binding for the Allwinner DE2 CCU
clk: sunxi-ng: add support for DE2 CCU
dt-bindings: add bindings for DE2 on V3s SoC
drm/sun4i: return only planes for layers created
drm/sun4i: abstract a engine
于 2017年5月11日 GMT+08:00 下午10:01:54, Linus Walleij 写到:
>On Thu, May 4, 2017 at 1:57 AM, Andre Przywara
>wrote:
>
>> When a pinctrl driver gets interrupted during its probe process
>> (returning -EPROBE_DEFER), the devres system cleans up all
于 2017年5月11日 GMT+08:00 下午10:01:54, Linus Walleij 写到:
>On Thu, May 4, 2017 at 1:57 AM, Andre Przywara
>wrote:
>
>> When a pinctrl driver gets interrupted during its probe process
>> (returning -EPROBE_DEFER), the devres system cleans up all allocated
>> resources. During this process it calls
于 2017年5月5日 GMT+08:00 下午8:36:18, Maxime Ripard
写到:
>On Fri, May 05, 2017 at 12:50:51AM +0800, icen...@aosc.io wrote:
>> > > +void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer,
>> > > +int layer, bool enable)
>> > > +{
>> >
于 2017年5月5日 GMT+08:00 下午8:36:18, Maxime Ripard
写到:
>On Fri, May 05, 2017 at 12:50:51AM +0800, icen...@aosc.io wrote:
>> > > +void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer,
>> > > +int layer, bool enable)
>> > > +{
>> > > +u32 val;
>> > > +
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