[PATCH v2] clk: Move vendor's Kconfig into CCF menu section

Move all vendor's Kconfig into CCF menu section to prevent new drivers putting their Kconfig files in a wrong place. Some Kconigs need to modify at the same time to avoid build warnings. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- This patch is based on v4.5-rc1. changes si

Re: [PATCH] clk: Move vendor's Kconfig into CCF menu section

patch is applied to the wrong git tree, please drop us a note to > > help improving the system] > > > > url: > > https://github.com/0day-ci/linux/commits/James-Liao/clk-Move-vendor-s-Kconfig-into-CCF-menu-section/20160127-152850 > > base: https://git.kernel.org/

Re: [PATCH] clk: Move vendor's Kconfig into CCF menu section

patch is applied to the wrong git tree, please drop us a note to > > help improving the system] > > > > url: > > https://github.com/0day-ci/linux/commits/James-Liao/clk-Move-vendor-s-Kconfig-into-CCF-menu-section/20160127-152850 > > base: https://git.kernel.org/

[PATCH] clk: Move vendor's Kconfig into CCF menu section

Move all vendor's Kconfig into CCF menu section to prevent new drivers putting their Kconfig files in a wrong place. Signed-off-by: James Liao --- drivers/clk/Kconfig | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index

[PATCH v5 2/6] dt-bindings: ARM: Mediatek: Document bindings for MT2701

This patch adds the binding documentation for apmixedsys, bdpsys, ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys for Mediatek MT2701. Signed-off-by: James Liao Tested-by: John Crispin --- .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindings/arm

[PATCH v5 1/6] clk: mediatek: Refine the makefile to support multiple clock drivers

Add a Kconfig to define clock configuration for each SoC, and modify the Makefile to build drivers that only selected in config. Signed-off-by: Shunli Wang Signed-off-by: James Liao Tested-by: John Crispin --- drivers/clk/Kconfig | 1 + drivers/clk/mediatek/Kconfig | 23

[PATCH v5 5/6] reset: mediatek: Add MT2701 reset controller dt-binding file

From: Shunli Wang Dt-binding file about reset controller is used to provide kinds of definition, which is referenced by dts file and IC-specified reset controller driver code. Signed-off-by: Shunli Wang Signed-off-by: James Liao Tested-by: John Crispin --- include/dt-bindings/reset/mt2701

[PATCH v5 0/6] Add clock support for Mediatek MT2701

to include/dt-bindings/reset/. - Add hifsys reset patch from John Crispin. changes since v1: - Document MT2701 compatible strings. James Liao (2): clk: mediatek: Refine the makefile to support multiple clock drivers dt-bindings: ARM: Mediatek: Document bindings for MT2701 Shunli Wang (4): clk

[PATCH v5 4/6] clk: mediatek: Add MT2701 clock support

From: Shunli Wang Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao Tested-by: John Crispin --- drivers/clk/mediatek/Kconfig |8 + drivers/clk/mediatek/Makefile |1 + drivers

[PATCH v5 6/6] reset: mediatek: Add MT2701 reset driver

From: Shunli Wang In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang Signed-off-by: James Liao Tested-by: John Crispin

[PATCH v5 3/6] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao Tested-by: John Crispin --- include/dt-bindings/clock/mt2701-clk.h | 482 + 1 file

[PATCH v5 0/6] Add clock support for Mediatek MT2701

to include/dt-bindings/reset/. - Add hifsys reset patch from John Crispin. changes since v1: - Document MT2701 compatible strings. James Liao (2): clk: mediatek: Refine the makefile to support multiple clock drivers dt-bindings: ARM: Mediatek: Document bindings for MT2701 Shunli Wang (4): clk

[PATCH v5 4/6] clk: mediatek: Add MT2701 clock support

From: Shunli Wang <shunli.w...@mediatek.com> Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Tested-by: John Crispin &

[PATCH v5 6/6] reset: mediatek: Add MT2701 reset driver

iatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Tested-by: John Crispin <blo...@openwrt.org> --- drivers/clk/mediatek/clk-mt2701.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c index

[PATCH v5 3/6] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang <shunli.w...@mediatek.com> Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Tested-by: John Crispin &

[PATCH v5 2/6] dt-bindings: ARM: Mediatek: Document bindings for MT2701

This patch adds the binding documentation for apmixedsys, bdpsys, ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys for Mediatek MT2701. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Tested-by: John Crispin <blo...@openwrt.org> --- .../bindings/arm/media

[PATCH v5 1/6] clk: mediatek: Refine the makefile to support multiple clock drivers

Add a Kconfig to define clock configuration for each SoC, and modify the Makefile to build drivers that only selected in config. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> Tested-by: John Crispin <blo...@openwrt.or

[PATCH v5 5/6] reset: mediatek: Add MT2701 reset controller dt-binding file

From: Shunli Wang <shunli.w...@mediatek.com> Dt-binding file about reset controller is used to provide kinds of definition, which is referenced by dts file and IC-specified reset controller driver code. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Lia

[PATCH] clk: Move vendor's Kconfig into CCF menu section

Move all vendor's Kconfig into CCF menu section to prevent new drivers putting their Kconfig files in a wrong place. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- drivers/clk/Kconfig | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/clk/Kco

Re: [PATCH v3 1/6] clk: mediatek: Refine the makefile to support multiple clock drivers

Hi Yingjoe, On Thu, 2016-01-21 at 10:45 +0800, Yingjoe Chen wrote: > On Thu, 2016-01-21 at 10:28 +0800, Yingjoe Chen wrote: > > On Tue, 2016-01-12 at 16:31 +0800, James Liao wrote: > > > Add a Kconfig to define clock configuration for each SoC, and > > > modify th

Re: [PATCH v3 1/6] clk: mediatek: Refine the makefile to support multiple clock drivers

Hi Yingjoe, On Thu, 2016-01-21 at 10:28 +0800, Yingjoe Chen wrote: > On Tue, 2016-01-12 at 16:31 +0800, James Liao wrote: > > Add a Kconfig to define clock configuration for each SoC, and > > modify the Makefile to build drivers that only selected in config. > > > >

Re: [PATCH v4 1/4] soc: mediatek: Refine scpsys to support multiple platform

On Wed, 2016-01-20 at 17:14 +0800, Yingjoe Chen wrote: > On Wed, 2016-01-20 at 14:08 +0800, James Liao wrote: > > Refine scpsys driver common code to support multiple SoC / platform. > > > > Signed-off-by: James Liao > <...> > > diff --git a/drivers/soc/medi

Re: [PATCH v4 3/4] soc: mediatek: Add MT2701 power dt-bindings

Hi Yingjoe, Rob, On Wed, 2016-01-20 at 10:35 -0600, Rob Herring wrote: > On Wed, Jan 20, 2016 at 05:29:21PM +0800, Yingjoe Chen wrote: > > On Wed, 2016-01-20 at 14:08 +0800, James Liao wrote: > > > From: Shunli Wang > > > > > > Add power dt-bindings

Re: [PATCH v4 2/6] dt-bindings: ARM: Mediatek: Document bindings for MT2701

Hi Rob, On Wed, 2016-01-20 at 10:32 -0600, Rob Herring wrote: > On Wed, Jan 20, 2016 at 02:35:43PM +0800, James Liao wrote: > > This patch adds the binding documentation for apmixedsys, bdpsys, > > ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and > > vdecsy

Re: [PATCH v4 1/4] soc: mediatek: Refine scpsys to support multiple platform

On Wed, 2016-01-20 at 17:14 +0800, Yingjoe Chen wrote: > On Wed, 2016-01-20 at 14:08 +0800, James Liao wrote: > > Refine scpsys driver common code to support multiple SoC / platform. > > > > Signed-off-by: James Liao <jamesjj.l...@mediatek.com> > <...> >

Re: [PATCH v4 3/4] soc: mediatek: Add MT2701 power dt-bindings

Hi Yingjoe, Rob, On Wed, 2016-01-20 at 10:35 -0600, Rob Herring wrote: > On Wed, Jan 20, 2016 at 05:29:21PM +0800, Yingjoe Chen wrote: > > On Wed, 2016-01-20 at 14:08 +0800, James Liao wrote: > > > From: Shunli Wang <shunli.w...@mediatek.com> > > > >

Re: [PATCH v4 2/6] dt-bindings: ARM: Mediatek: Document bindings for MT2701

Hi Rob, On Wed, 2016-01-20 at 10:32 -0600, Rob Herring wrote: > On Wed, Jan 20, 2016 at 02:35:43PM +0800, James Liao wrote: > > This patch adds the binding documentation for apmixedsys, bdpsys, > > ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and > > vdecsy

Re: [PATCH v3 1/6] clk: mediatek: Refine the makefile to support multiple clock drivers

Hi Yingjoe, On Thu, 2016-01-21 at 10:28 +0800, Yingjoe Chen wrote: > On Tue, 2016-01-12 at 16:31 +0800, James Liao wrote: > > Add a Kconfig to define clock configuration for each SoC, and > > modify the Makefile to build drivers that only selected in config. > > > >

Re: [PATCH v3 1/6] clk: mediatek: Refine the makefile to support multiple clock drivers

Hi Yingjoe, On Thu, 2016-01-21 at 10:45 +0800, Yingjoe Chen wrote: > On Thu, 2016-01-21 at 10:28 +0800, Yingjoe Chen wrote: > > On Tue, 2016-01-12 at 16:31 +0800, James Liao wrote: > > > Add a Kconfig to define clock configuration for each SoC, and > > > modify th

Re: [PATCH v2 5/6] reset: mediatek: mt2701 reset controller dt-binding file

Hi Philipp, On Tue, 2016-01-05 at 10:31 +0100, Philipp Zabel wrote: > Am Dienstag, den 05.01.2016, 14:30 +0800 schrieb James Liao: > > From: Shunli Wang > > > > Dt-binding file about reset controller is used to provide > > kinds of definition, which is refere

Re: [PATCH v2 4/6] clk: mediatek: Add MT2701 clock support

Hi Philipp, On Tue, 2016-01-05 at 10:30 +0100, Philipp Zabel wrote: > Hi James, > > Am Dienstag, den 05.01.2016, 14:30 +0800 schrieb James Liao: > > From: Shunli Wang > > > > Add MT2701 clock support, include topckgen, apmixedsys, > > infracfg, pericfg and subs

Re: [PATCH v2 4/6] clk: mediatek: Add MT2701 clock support

Hi Philipp, On Tue, 2016-01-05 at 10:30 +0100, Philipp Zabel wrote: > Hi James, > > Am Dienstag, den 05.01.2016, 14:30 +0800 schrieb James Liao: > > From: Shunli Wang <shunli.w...@mediatek.com> > > > > Add MT2701 clock support, include topckgen, apmixedsys, &g

Re: [PATCH v2 5/6] reset: mediatek: mt2701 reset controller dt-binding file

Hi Philipp, On Tue, 2016-01-05 at 10:31 +0100, Philipp Zabel wrote: > Am Dienstag, den 05.01.2016, 14:30 +0800 schrieb James Liao: > > From: Shunli Wang <shunli.w...@mediatek.com> > > > > Dt-binding file about reset controller is used to provide > > kinds o

[PATCH v2 0/6] Add clock support for Mediatek MT2701

This patchset is based on 4.4-rc7, add clock and reset controller support for Mediatek MT2701. This patchset also refined makefile and Kconfig to support configurable multiple SoC clock support. changes since v1: - Document MT2701 compatible strings. James Liao (2): clk: mediatek: Refine

[PATCH v2 3/6] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao --- include/dt-bindings/clock/mt2701-clk.h | 481 + 1 file changed, 481 insertions

[PATCH v2 2/6] dt-bindings: ARM: Mediatek: Document bindings for MT2701

This patch adds the binding documentation for apmixedsys, bdpsys, ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys for Mediatek MT2701. Signed-off-by: James Liao --- .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindings/arm/mediatek/mediatek,bdpsys.txt

[PATCH v2 4/6] clk: mediatek: Add MT2701 clock support

From: Shunli Wang Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao --- drivers/clk/mediatek/Kconfig |8 + drivers/clk/mediatek/Makefile |1 + drivers/clk/mediatek/clk-gate.c

[PATCH v2 5/6] reset: mediatek: mt2701 reset controller dt-binding file

From: Shunli Wang Dt-binding file about reset controller is used to provide kinds of definition, which is referenced by dts file and IC-specified reset controller driver code. Signed-off-by: Shunli Wang --- .../dt-bindings/reset-controller/mt2701-resets.h | 74 ++ 1 file

[PATCH v2 6/6] reset: mediatek: mt2701 reset driver

From: Shunli Wang In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang --- drivers/clk/mediatek/clk-mt2701.c | 4 1

[PATCH v2 1/6] clk: mediatek: Refine the makefile to support multiple clock drivers

Add a Kconfig to define clock configuration for each SoC, and modify the Makefile to build drivers that only selected in config. Signed-off-by: Shunli Wang Signed-off-by: James Liao --- drivers/clk/Kconfig | 1 + drivers/clk/mediatek/Kconfig | 23 +++ drivers

Re: [PATCH 4/4] soc: mediatek: Add MT2701/MT7623 scpsys driver

Hi Matthias, On Wed, 2015-12-30 at 18:49 +0100, Matthias Brugger wrote: > > On Wed, 2015-12-30 at 17:01 +0800, Daniel Kurtz wrote: > >> On Wed, Dec 30, 2015 at 2:41 PM, James Liao > >> wrote: > >>> > >>> From: Shunli Wang > >>> >

Re: [PATCH 4/4] soc: mediatek: Add MT2701/MT7623 scpsys driver

Hi Matthias, On Wed, 2015-12-30 at 18:49 +0100, Matthias Brugger wrote: > > On Wed, 2015-12-30 at 17:01 +0800, Daniel Kurtz wrote: > >> On Wed, Dec 30, 2015 at 2:41 PM, James Liao <jamesjj.l...@mediatek.com> > >> wrote: > >>> > >>> From:

[PATCH v2 3/6] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang <shunli.w...@mediatek.com> Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- include/dt-bindings/

[PATCH v2 0/6] Add clock support for Mediatek MT2701

This patchset is based on 4.4-rc7, add clock and reset controller support for Mediatek MT2701. This patchset also refined makefile and Kconfig to support configurable multiple SoC clock support. changes since v1: - Document MT2701 compatible strings. James Liao (2): clk: mediatek: Refine

[PATCH v2 2/6] dt-bindings: ARM: Mediatek: Document bindings for MT2701

This patch adds the binding documentation for apmixedsys, bdpsys, ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys for Mediatek MT2701. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindin

[PATCH v2 4/6] clk: mediatek: Add MT2701 clock support

From: Shunli Wang <shunli.w...@mediatek.com> Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- drivers/clk/mediatek/K

[PATCH v2 5/6] reset: mediatek: mt2701 reset controller dt-binding file

From: Shunli Wang Dt-binding file about reset controller is used to provide kinds of definition, which is referenced by dts file and IC-specified reset controller driver code. Signed-off-by: Shunli Wang ---

[PATCH v2 6/6] reset: mediatek: mt2701 reset driver

From: Shunli Wang In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang

[PATCH v2 1/6] clk: mediatek: Refine the makefile to support multiple clock drivers

Add a Kconfig to define clock configuration for each SoC, and modify the Makefile to build drivers that only selected in config. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- drivers/clk/Kconfig | 1 +

Re: [PATCH 2/4] soc: mediatek: Init MT8173 scpsys driver earlier

Hi Arnd, On Thu, 2015-12-31 at 15:45 +0100, Arnd Bergmann wrote: > On Thursday 31 December 2015 17:16:34 James Liao wrote: > > > > """ > > Take a example for our IOMMU(M4U) and SMI. The IOMMU which is > > subsys_init defaultly will depend on

Re: [PATCH 2/4] soc: mediatek: Init MT8173 scpsys driver earlier

Hi Arnd, On Thu, 2015-12-31 at 15:45 +0100, Arnd Bergmann wrote: > On Thursday 31 December 2015 17:16:34 James Liao wrote: > > > > """ > > Take a example for our IOMMU(M4U) and SMI. The IOMMU which is > > subsys_init defaultly will depend on

Re: [PATCH 3/5] clk: mediatek: Add MT2701 clock support

Hi Mike On Wed, 2015-12-30 at 15:34 -0800, Michael Turquette wrote: > Quoting James Liao (2015-12-29 22:27:43) > > +CLK_OF_DECLARE(mtk_topckgen, "mediatek,mt2701-topckgen", > > mtk_topckgen_init); > > +CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt27

Re: [PATCH 2/4] soc: mediatek: Init MT8173 scpsys driver earlier

Hi Arnd, > On Wed, 2015-12-30 at 11:35 +0100, Arnd Bergmann wrote: > > On Wednesday 30 December 2015 18:12:08 James Liao wrote: > > > On Wed, 2015-12-30 at 09:52 +0100, Arnd Bergmann wrote: > > > > On Wednesday 30 December 2015 14:41:44 James Liao wrote: > > &

Re: [PATCH 2/4] soc: mediatek: Init MT8173 scpsys driver earlier

Hi Arnd, > On Wed, 2015-12-30 at 11:35 +0100, Arnd Bergmann wrote: > > On Wednesday 30 December 2015 18:12:08 James Liao wrote: > > > On Wed, 2015-12-30 at 09:52 +0100, Arnd Bergmann wrote: > > > > On Wednesday 30 December 2015 14:41:44 James Liao wrote: > > &

Re: [PATCH 3/5] clk: mediatek: Add MT2701 clock support

Hi Mike On Wed, 2015-12-30 at 15:34 -0800, Michael Turquette wrote: > Quoting James Liao (2015-12-29 22:27:43) > > +CLK_OF_DECLARE(mtk_topckgen, "mediatek,mt2701-topckgen", > > mtk_topckgen_init); > > +CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt27

Re: [PATCH 2/4] soc: mediatek: Init MT8173 scpsys driver earlier

Hi Arnd, On Wed, 2015-12-30 at 11:35 +0100, Arnd Bergmann wrote: > On Wednesday 30 December 2015 18:12:08 James Liao wrote: > > On Wed, 2015-12-30 at 09:52 +0100, Arnd Bergmann wrote: > > > On Wednesday 30 December 2015 14:41:44 James Liao wrote: > > > > Some p

Re: [PATCH 4/4] soc: mediatek: Add MT2701/MT7623 scpsys driver

Hi Daniel, On Wed, 2015-12-30 at 17:01 +0800, Daniel Kurtz wrote: > On Wed, Dec 30, 2015 at 2:41 PM, James Liao wrote: > > > > From: Shunli Wang > > > > Add scpsys driver for MT2701 and MT7623. > > > > Signed-off-by: Shunli Wang > > Signed-off-by:

Re: [PATCH 2/4] soc: mediatek: Init MT8173 scpsys driver earlier

Hi Arnd, On Wed, 2015-12-30 at 09:52 +0100, Arnd Bergmann wrote: > On Wednesday 30 December 2015 14:41:44 James Liao wrote: > > Some power domain comsumers may init before module_init. > > So the power domain provider (scpsys) need to be initialized > > earlier too. > >

Re: [PATCH 1/4] soc: mediatek: Separate scpsys driver common code

Hi Arnd, On Wed, 2015-12-30 at 09:52 +0100, Arnd Bergmann wrote: > On Wednesday 30 December 2015 14:41:43 James Liao wrote: > > diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig > > index 0a4ea80..eca6fb7 100644 > > --- a/drivers/soc/mediatek/Kconfig

Re: [PATCH 2/4] soc: mediatek: Init MT8173 scpsys driver earlier

Hi Arnd, On Wed, 2015-12-30 at 11:35 +0100, Arnd Bergmann wrote: > On Wednesday 30 December 2015 18:12:08 James Liao wrote: > > On Wed, 2015-12-30 at 09:52 +0100, Arnd Bergmann wrote: > > > On Wednesday 30 December 2015 14:41:44 James Liao wrote: > > > > Some p

Re: [PATCH 1/4] soc: mediatek: Separate scpsys driver common code

Hi Arnd, On Wed, 2015-12-30 at 09:52 +0100, Arnd Bergmann wrote: > On Wednesday 30 December 2015 14:41:43 James Liao wrote: > > diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig > > index 0a4ea80..eca6fb7 100644 > > --- a/drivers/soc/mediatek/Kconfig

Re: [PATCH 2/4] soc: mediatek: Init MT8173 scpsys driver earlier

Hi Arnd, On Wed, 2015-12-30 at 09:52 +0100, Arnd Bergmann wrote: > On Wednesday 30 December 2015 14:41:44 James Liao wrote: > > Some power domain comsumers may init before module_init. > > So the power domain provider (scpsys) need to be initialized > > earlier too. > >

Re: [PATCH 4/4] soc: mediatek: Add MT2701/MT7623 scpsys driver

Hi Daniel, On Wed, 2015-12-30 at 17:01 +0800, Daniel Kurtz wrote: > On Wed, Dec 30, 2015 at 2:41 PM, James Liao <jamesjj.l...@mediatek.com> wrote: > > > > From: Shunli Wang <shunli.w...@mediatek.com> > > > > Add scpsys driver for MT2701 and MT7623. >

[PATCH 4/4] soc: mediatek: Add MT2701/MT7623 scpsys driver

From: Shunli Wang Add scpsys driver for MT2701 and MT7623. Signed-off-by: Shunli Wang Signed-off-by: James Liao --- drivers/soc/mediatek/Kconfig | 11 +++ drivers/soc/mediatek/Makefile| 1 + drivers/soc/mediatek/mtk-scpsys-mt2701.c | 161

[PATCH 3/4] soc: mediatek: Add MT2701 power dt-bindings

From: Shunli Wang Add power dt-bindings for MT2701. Signed-off-by: Shunli Wang Signed-off-by: James Liao --- include/dt-bindings/power/mt2701-power.h | 27 +++ 1 file changed, 27 insertions(+) create mode 100644 include/dt-bindings/power/mt2701-power.h diff --git

[PATCH 2/4] soc: mediatek: Init MT8173 scpsys driver earlier

Some power domain comsumers may init before module_init. So the power domain provider (scpsys) need to be initialized earlier too. Signed-off-by: James Liao --- drivers/soc/mediatek/mtk-scpsys-mt8173.c | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/soc

[PATCH 1/4] soc: mediatek: Separate scpsys driver common code

Separate scpsys driver common code to mtk-scpsys.c, and move MT8173 platform code to mtk-scpsys-mt8173.c. Signed-off-by: James Liao --- drivers/soc/mediatek/Kconfig | 13 +- drivers/soc/mediatek/Makefile| 1 + drivers/soc/mediatek/mtk-scpsys-mt8173.c | 179

[PATCH 0/4] Mediatek MT2701 SCPSYS power domain support

This patchset is based on 4.4-rc7, add scpsys power domain support for Mediatek MT2701/MT7623. This patchset also separate MT8173 scpsys driver into common part (mtk-scpsys.c) and platform part (mtk-scpsys-mt8173.c), so that MT2701 scpsys driver can share most implementation with MT8173. James

[PATCH 4/5] reset: mediatek: mt2701 reset controller dt-binding file

From: Shunli Wang Dt-binding file about reset controller is used to provide kinds of definition, which is referenced by dts file and IC-specified reset controller driver code. Signed-off-by: Shunli Wang --- .../dt-bindings/reset-controller/mt2701-resets.h | 74 ++ 1 file

[PATCH 3/5] clk: mediatek: Add MT2701 clock support

From: Shunli Wang Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao --- drivers/clk/mediatek/Kconfig |8 + drivers/clk/mediatek/Makefile |1 + drivers/clk/mediatek/clk-gate.c

[PATCH 5/5] reset: mediatek: mt2701 reset driver

From: Shunli Wang In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang --- drivers/clk/mediatek/clk-mt2701.c | 4 1

[PATCH 1/5] clk: mediatek: Refine the makefile to support multiple clock drivers

Add a Kconfig to define clock configuration for each SoC, and modify the Makefile to build drivers that only selected in config. Signed-off-by: Shunli Wang Signed-off-by: James Liao --- drivers/clk/Kconfig | 1 + drivers/clk/mediatek/Kconfig | 23 +++ drivers

[PATCH 2/5] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang Signed-off-by: James Liao --- include/dt-bindings/clock/mt2701-clk.h | 481 + 1 file changed, 481 insertions

[PATCH 0/5] Add clock support for Mediatek MT2701

This patchset is based on 4.4-rc7, add clock and reset controller support for Mediatek MT2701. This patchset also refined makefile and Kconfig to support configurable multiple SoC clock support. James Liao (1): clk: mediatek: Refine the makefile to support multiple clock drivers Shunli Wang

[PATCH 2/5] clk: mediatek: Add dt-bindings for MT2701 clocks

From: Shunli Wang <shunli.w...@mediatek.com> Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- include/dt-bindings/

[PATCH 0/5] Add clock support for Mediatek MT2701

This patchset is based on 4.4-rc7, add clock and reset controller support for Mediatek MT2701. This patchset also refined makefile and Kconfig to support configurable multiple SoC clock support. James Liao (1): clk: mediatek: Refine the makefile to support multiple clock drivers Shunli Wang

[PATCH 1/5] clk: mediatek: Refine the makefile to support multiple clock drivers

Add a Kconfig to define clock configuration for each SoC, and modify the Makefile to build drivers that only selected in config. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- drivers/clk/Kconfig | 1 +

[PATCH 5/5] reset: mediatek: mt2701 reset driver

From: Shunli Wang In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang

[PATCH 4/4] soc: mediatek: Add MT2701/MT7623 scpsys driver

From: Shunli Wang <shunli.w...@mediatek.com> Add scpsys driver for MT2701 and MT7623. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- drivers/soc/mediatek/Kconfig | 11 +++ drivers/soc

[PATCH 3/4] soc: mediatek: Add MT2701 power dt-bindings

From: Shunli Wang <shunli.w...@mediatek.com> Add power dt-bindings for MT2701. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- include/dt-bindings/power/mt2701-power.h | 27 +++ 1 file chan

[PATCH 1/4] soc: mediatek: Separate scpsys driver common code

Separate scpsys driver common code to mtk-scpsys.c, and move MT8173 platform code to mtk-scpsys-mt8173.c. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- drivers/soc/mediatek/Kconfig | 13 +- drivers/soc/mediatek/Makefile| 1 + drivers/soc/mediatek/mtk-

[PATCH 0/4] Mediatek MT2701 SCPSYS power domain support

This patchset is based on 4.4-rc7, add scpsys power domain support for Mediatek MT2701/MT7623. This patchset also separate MT8173 scpsys driver into common part (mtk-scpsys.c) and platform part (mtk-scpsys-mt8173.c), so that MT2701 scpsys driver can share most implementation with MT8173. James

[PATCH 2/4] soc: mediatek: Init MT8173 scpsys driver earlier

Some power domain comsumers may init before module_init. So the power domain provider (scpsys) need to be initialized earlier too. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- drivers/soc/mediatek/mtk-scpsys-mt8173.c | 13 - 1 file changed, 12 insertions(+), 1 de

[PATCH 4/5] reset: mediatek: mt2701 reset controller dt-binding file

From: Shunli Wang Dt-binding file about reset controller is used to provide kinds of definition, which is referenced by dts file and IC-specified reset controller driver code. Signed-off-by: Shunli Wang ---

[PATCH 3/5] clk: mediatek: Add MT2701 clock support

From: Shunli Wang <shunli.w...@mediatek.com> Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.w...@mediatek.com> Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- drivers/clk/mediatek/K

[PATCH] soc: mediatek: Init MT8173 scpsys driver earlier

Some power domain comsumers may init before module_init. So the power domain provider (scpsys) need to be initialized earlier too. This patch modify scpsys driver init level from module_init to subsys_initcall. Signed-off-by: James Liao --- This patch is based on v4.3-rc7. drivers/soc

[PATCH] soc: mediatek: Init MT8173 scpsys driver earlier

Some power domain comsumers may init before module_init. So the power domain provider (scpsys) need to be initialized earlier too. This patch modify scpsys driver init level from module_init to subsys_initcall. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- This patch is

Re: [PATCH v2 0/3] Fix random hang up issue while kernel init

Hi Matthias, On Mon, 2015-10-12 at 18:32 +0200, Matthias Brugger wrote: > > On 07/10/15 11:14, James Liao wrote: > > This patch is based on v4.3-rc4, to fix system hanging up issue > > while disabling unused clocks. > > > > There is nothing different in mtk-scpsy

Re: [PATCH v2 0/3] Fix random hang up issue while kernel init

Hi Matthias, On Mon, 2015-10-12 at 18:32 +0200, Matthias Brugger wrote: > > On 07/10/15 11:14, James Liao wrote: > > This patch is based on v4.3-rc4, to fix system hanging up issue > > while disabling unused clocks. > > > > There is nothing different in mtk-scpsy

[PATCH v2 2/3] soc: mediatek: Fix random hang up issue while kernel init

accessing their registers. This patch keeps venc_sel / venclt_sel clock on when VENC / VENC_LT's power is on, to prevent system hang up while accessing its registeres. Signed-off-by: James Liao --- drivers/soc/mediatek/mtk-scpsys.c | 67 +-- 1 file changed, 44

[PATCH v2 1/3] dt-bindings: soc: Add clocks for Mediatek SCPSYS unit

Add clocks needed by Mediatek VENC and VENC_LT power domianis. These clocks were needed by accessing subsystem's registers, so they need to be enabled before power on these subsystems. Signed-off-by: James Liao --- Documentation/devicetree/bindings/soc/mediatek/scpsys.txt | 10 ++ 1

[PATCH v2 3/3] arm64: dts: mt8173: Add clocks for SCPSYS unit

Add clocks needed by Mediatek VENC and VENC_LT power domianis. These clocks were needed by accessing subsystem's registers, so they need to be enabled before power on these subsystems. Signed-off-by: James Liao --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 6 -- 1 file changed, 4

[PATCH v2 0/3] Fix random hang up issue while kernel init

to change the dtsi. [1] https://patchwork.kernel.org/patch/7262411/ James Liao (3): dt-bindings: soc: Add clocks for Mediatek SCPSYS unit soc: mediatek: Fix random hang up issue while kernel init arm64: dts: mt8173: Add clocks for SCPSYS unit .../devicetree/bindings/soc/mediatek/scpsys.txt

[PATCH v2 3/3] arm64: dts: mt8173: Add clocks for SCPSYS unit

Add clocks needed by Mediatek VENC and VENC_LT power domianis. These clocks were needed by accessing subsystem's registers, so they need to be enabled before power on these subsystems. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8173.dt

[PATCH v2 0/3] Fix random hang up issue while kernel init

to change the dtsi. [1] https://patchwork.kernel.org/patch/7262411/ James Liao (3): dt-bindings: soc: Add clocks for Mediatek SCPSYS unit soc: mediatek: Fix random hang up issue while kernel init arm64: dts: mt8173: Add clocks for SCPSYS unit .../devicetree/bindings/soc/mediatek/scpsys.txt

[PATCH v2 2/3] soc: mediatek: Fix random hang up issue while kernel init

accessing their registers. This patch keeps venc_sel / venclt_sel clock on when VENC / VENC_LT's power is on, to prevent system hang up while accessing its registeres. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- drivers/soc/mediatek/mtk-scpsys.

[PATCH v2 1/3] dt-bindings: soc: Add clocks for Mediatek SCPSYS unit

Add clocks needed by Mediatek VENC and VENC_LT power domianis. These clocks were needed by accessing subsystem's registers, so they need to be enabled before power on these subsystems. Signed-off-by: James Liao <jamesjj.l...@mediatek.com> --- Documentation/devicetree/bindings/soc/me

Re: [PATCH] soc: mediatek: Fix random hang up issue while kernel init

HI Daniel, On Fri, 2015-10-02 at 17:25 +0800, Daniel Kurtz wrote: > Actually, I should have proposed adding prepare / unprepare callbacks > to mtk_clk_gate_ops in which we prepare_enable/disable_unprepare > venc_sel (& mm_sel). > This should correctly track all of the clk reference counting

Re: [PATCH] soc: mediatek: Fix random hang up issue while kernel init

HI Daniel, On Fri, 2015-10-02 at 17:25 +0800, Daniel Kurtz wrote: > Actually, I should have proposed adding prepare / unprepare callbacks > to mtk_clk_gate_ops in which we prepare_enable/disable_unprepare > venc_sel (& mm_sel). > This should correctly track all of the clk reference counting

Re: [PATCH] soc: mediatek: Fix random hang up issue while kernel init

Hi Daniel, On Thu, 2015-10-01 at 18:08 +0800, Daniel Kurtz wrote: > I see two cases where "a power domain is a consumer of a clock": > (a) the clock is needed to access the power domain control > registers. The clock must actually be in another power domain, since > otherwise you could never

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