Selecting COMMON_CLK_AMLOGIC is not required as it is already selected
by the SoC clock controller driver
Signed-off-by: Jerome Brunet
---
arch/arm/mach-meson/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
index b16831697183
to remove it.
[0]: https://lkml.kernel.org/r/20190128180430.28689-1-jbru...@baylibre.com
Jerome Brunet (2):
arm64: meson: remove COMMON_CLK_AMLOGIC selection
ARM: meson: remove COMMON_CLK_AMLOGIC selection
arch/arm/mach-meson/Kconfig | 1 -
arch/arm64/Kconfig.platforms | 1 -
2 files changed, 2
This patchset adds new dt-bindings for the reset lines of amlogic g12a SoC
and the related compatible in the driver.
Changes since v1 [0]:
* Correct patch 2 commit message.
[0]: https://lkml.kernel.org/r/20190128141330.21927-1-jbru...@baylibre.com
Jerome Brunet (2):
dt-bindings: reset: meson
Add device tree bindings for the reset controller of g12a SoC family.
Acked-by: Neil Armstrong
Signed-off-by: Jerome Brunet
---
.../bindings/reset/amlogic,meson-reset.txt| 7 +-
.../reset/amlogic,meson-g12a-reset.h | 134 ++
2 files changed, 139 insertions(+), 2
Add a compatible for the new g12a SoC family.
Tested-by: Neil Armstrong
Signed-off-by: Jerome Brunet
---
drivers/reset/reset-meson.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index 5242e0679df7..a8f6549b3af4 100644
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg-aoclk.c | 1 -
drivers/clk/meson/axg.c | 1 -
drivers/clk/meson/clkc-audio.h | 3 ++-
drivers/clk/meson/clkc.h| 17 -
drivers/clk/meson/gxbb-aoclk.c | 1 -
drivers/clk/meson/gxbb.c| 1
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg.c | 1 +
drivers/clk/meson/clk-mpll.c | 12 +++-
drivers/clk/meson/clk-mpll.h | 30 ++
drivers/clk/meson/clkc.h | 14 --
drivers/clk/meson/gxbb.c | 1 +
drivers/clk/meson
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/clkc.h| 6 --
drivers/clk/meson/gxbb.c| 1 +
drivers/clk/meson/vid-pll-div.c | 10 +-
drivers/clk/meson/vid-pll-div.h | 20
4 files changed, 30 insertions(+), 7 deletions(-)
create mode 100644
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/clkc.h | 34 +
drivers/clk/meson/parm.h | 46
2 files changed, 47 insertions(+), 33 deletions(-)
create mode 100644 drivers/clk/meson/parm.h
diff --git a/drivers/clk/meson
Use CONFIG_ARCH_MESON to let make enter the meson clock directory.
As part of a rework, CONFIG_COMMON_CLK_AMLOGIC is about to be removed.
Signed-off-by: Jerome Brunet
---
drivers/clk/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/Makefile b/drivers/clk
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg.c | 1 +
drivers/clk/meson/clk-pll.c | 13 +++
drivers/clk/meson/clk-pll.h | 43 +
drivers/clk/meson/clkc.h| 30 --
drivers/clk/meson/gxbb.c| 1 +
drivers/clk
clk-provider.h provides clk_hw_is_prepared(), clk_hw_is_enabled() and
clk_hw_is_prepared() but these symbols are not exported for the
modules which prevents a clock driver using them to be compiled as
a module. Export them to fix the problem.
Signed-off-by: Jerome Brunet
---
drivers/clk/clk.c
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg-audio.c | 2 +-
drivers/clk/meson/sclk-div.c | 9 -
drivers/clk/meson/{clkc-audio.h => sclk-div.h} | 6 +++---
3 files changed, 12 insertions(+), 5 deletions(-)
rename drivers/clk/meson/{c
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg-audio.c | 1 +
drivers/clk/meson/axg.c | 1 +
drivers/clk/meson/clk-input.c | 7 ++-
drivers/clk/meson/clk-input.h | 19 +++
drivers/clk/meson/clkc.h| 5 -
drivers/clk/meson/gxbb.c
.
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/Kconfig | 82 +++---
drivers/clk/meson/Makefile | 21 ++
2 files changed, 71 insertions(+), 32 deletions(-)
diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig
index 2479dab09d70..f2e757aea4f1
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/Makefile | 2 +-
drivers/clk/meson/axg-audio.c| 2 +
drivers/clk/meson/clk-phase.c| 75 +---
drivers/clk/meson/clk-phase.h| 26 +++
drivers/clk/meson/clk-triphase.c | 68
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg-aoclk.c | 3 +++
drivers/clk/meson/clk-dualdiv.c | 10 +-
drivers/clk/meson/clk-dualdiv.h | 33 +
drivers/clk/meson/clkc.h| 19 ---
drivers/clk/meson/gxbb-aoclk.c | 3
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg.c| 1 +
drivers/clk/meson/clk-regmap.c | 5 +
drivers/clk/meson/clk-regmap.h | 15 +++
drivers/clk/meson/clkc.h | 15 ---
4 files changed, 21 insertions(+), 15 deletions(-)
diff --git a/drivers
The axg audio clock controller uses regmap mmio, not syscon.
Fixes: 1cd50181750f ("clk: meson: axg: add the audio clock controller driver")
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/meson
, Patch 4 to 14
should be squashed, keeping the commit message of patch 14.
Jerome Brunet (14):
clk: export some clk_hw function symbols for module drivers
clk: meson: use CONFIG_ARCH_MESON to enter meson clk directory
clk: meson: axg-audio does not require syscon
clk: meson: move MESON_GATE
Add device tree bindings for the reset controller of g12a SoC family.
Signed-off-by: Jerome Brunet
---
.../bindings/reset/amlogic,meson-reset.txt| 7 +-
.../reset/amlogic,meson-g12a-reset.h | 134 ++
2 files changed, 139 insertions(+), 2 deletions(-)
create mode
Add a compatible for the new g12a SoC family.
Signed-off-by: Jerome Brunet
---
drivers/reset/reset-meson.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index 5242e0679df7..a8f6549b3af4 100644
--- a/drivers/reset/reset-meson.c
This patchset adds new dt-bindings for the reset lines of amlogic g12a SoC
and the related compatible in the driver.
Jerome Brunet (2):
dt-bindings: reset: meson: add g12a bindings
reset: meson: add g12a and generic compatible string
.../bindings/reset/amlogic,meson-reset.txt| 7
On Tue, 2019-01-08 at 21:50 +0800, Jianxin Pan wrote:
> From: Yixun Lan
>
> Document the MMC sub clock controller driver, the potential consumer
> of this driver is MMC or NAND. Also add four clock bindings IDs which
> provided by this driver.
>
> Reviewed-by: Rob Herring
> Signed-off-by:
--git a/drivers/clk/meson/mmc-clkc.c b/drivers/clk/meson/mmc-clkc.c
> new file mode 100644
> index 000..2582a98
> --- /dev/null
> +++ b/drivers/clk/meson/mmc-clkc.c
> @@ -0,0 +1,304 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Amlogic Meson MMC Sub Clock Co
> const char *clk_name,
> unsigned long flags);
> -
> #endif /* __CLKC_H */
> diff --git a/drivers/clk/meson/sclk-div.c b/drivers/clk/meson/sclk-div.c
> index bc64019..a6c425b 100644
> --- a/drive
On Thu, 2019-01-17 at 11:31 +0100, Jerome Brunet wrote:
> This patchset enables pinctrl on the g12a and adds the necessary
> pinctrl settings to the u200 uart
>
> Kevin, please note that this patchset depends on the:
> * dts bus fixup: [0]
> * pinctrl region fixes [1
On Mon, 2019-01-21 at 14:53 +0100, Linus Walleij wrote:
> On Thu, Jan 17, 2019 at 11:23 AM Jerome Brunet wrote:
>
> > This patchset fixes the initial pinctrl support added for th g12a SoC
> > family, which is mainly around the register regions claimed by the
> > drive
On Sat, 2019-01-19 at 02:09 +0800, Jianxin Pan wrote:
> Hi Martin and Jerome,
>
> On 2019/1/18 5:20, Martin Blumenstingl wrote:
> > On Thu, Jan 17, 2019 at 9:39 PM Jerome Brunet
> > wrote:
> > > On Thu, 2019-01-17 at 21:27 +0100, Martin Blumenstingl wrote:
&g
Add the clock measure device to the g12a SoC family
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
index bd24de947a5b
Add support for the axg and g12a SoC family in amlogic clk measure
Signed-off-by: Jerome Brunet
---
drivers/soc/amlogic/meson-clk-measure.c | 194
1 file changed, 194 insertions(+)
diff --git a/drivers/soc/amlogic/meson-clk-measure.c
b/drivers/soc/amlogic/meson-clk
Add the axg and g12a SoC family compatible to the clock measure bindings
Signed-off-by: Jerome Brunet
---
Documentation/devicetree/bindings/soc/amlogic/clk-measure.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/amlogic/clk-measure.txt
b
Add the clock measure device to the axg SoC family
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index f044473dc7d0
This patchset adds support for the axg and g12a SoC family in amlogic's
clock measure driver and enable it on the related devices
Changes since v1 [0]:
* re-order node in the g12a.dtsi
* change node name
[0]: https://lkml.kernel.org/r/20190117164838.8008-1-jbru...@baylibre.com
Jerome Brunet (4
On Thu, 2019-01-17 at 20:57 +0100, Martin Blumenstingl wrote:
> Hi Jerome,
>
> On Thu, Jan 17, 2019 at 5:48 PM Jerome Brunet wrote:
> > Add the clock measure device to the axg SoC family
> >
> > Signed-off-by: Jerome Brunet
> > ---
> > arch/ar
On Thu, 2019-01-17 at 23:42 +0100, Martin Blumenstingl wrote:
> On Thu, Jan 17, 2019 at 10:45 PM Jerome Brunet wrote:
> > On Thu, 2019-01-17 at 22:20 +0100, Martin Blumenstingl wrote:
> > > On Thu, Jan 17, 2019 at 9:39 PM Jerome Brunet
> > > wrote:
> > >
On Thu, 2019-01-17 at 22:20 +0100, Martin Blumenstingl wrote:
> On Thu, Jan 17, 2019 at 9:39 PM Jerome Brunet wrote:
> > On Thu, 2019-01-17 at 21:27 +0100, Martin Blumenstingl wrote:
> > > OK, but we had incorrect documentation in the past. did you check this
> > >
On Thu, 2019-01-17 at 21:27 +0100, Martin Blumenstingl wrote:
> OK, but we had incorrect documentation in the past. did you check this
> with someone from Amlogic?
>
> I'm curious because there seem to be two different approaches here:
> 1) hiubus name and offsets are being fixed within this
On Thu, 2019-01-17 at 21:03 +0100, Martin Blumenstingl wrote:
> Hi Jerome,
>
> On Wed, Jan 16, 2019 at 5:52 PM Jerome Brunet wrote:
> [...]
> > - aobus: bus@ff80 {
> > - compatible = "simple-bus";
> > -
On Thu, 2019-01-17 at 17:48 +0100, Jerome Brunet wrote:
> Add the clock measure device to the g12a SoC family
>
> Signed-off-by: Jerome Brunet
> ---
> arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm6
Add the clock measure device to the g12a SoC family
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
index bd24de947a5b
Add support for the axg and g12a SoC family in amlogic clk measure
Signed-off-by: Jerome Brunet
---
drivers/soc/amlogic/meson-clk-measure.c | 194
1 file changed, 194 insertions(+)
diff --git a/drivers/soc/amlogic/meson-clk-measure.c
b/drivers/soc/amlogic/meson-clk
Add the clock measure device to the axg SoC family
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 0e0abb1a03e2
Add the axg and g12a SoC family compatible to the clock measure bindings
Signed-off-by: Jerome Brunet
---
Documentation/devicetree/bindings/soc/amlogic/clk-measure.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/amlogic/clk-measure.txt
b
This patchset adds support for the axg and g12a SoC family in amlogic's
clock measure driver and enable it on the related devices
Jerome Brunet (4):
dt-bindings: amlogic: add new compatible devices to clk_measure
soc: amlogic: clk-measure: add axg and g12a support
arm64: dts: meson: axg
://lkml.kernel.org/r/20190117102315.1833-1-jbru...@baylibre.com
Cheers.
Jerome Brunet (2):
arm64: dts: meson: g12a: add pinctrl support controllers
arm64: dts: meson: g12a: add uart_ao_a pinctrl
.../boot/dts/amlogic/meson-g12a-u200.dts | 2 +
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 67
Add the always on UART pinctrl setting to the g12a soc DT and
use it for the u200 reference design
Signed-off-by: Jerome Brunet
---
.../arm64/boot/dts/amlogic/meson-g12a-u200.dts | 2 ++
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi| 18 ++
2 files changed, 20 insertions
Add the peripheral and always-on pinctrl controllers to the g12a soc.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 49 +
1 file changed, 49 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
b/arch/arm64/boot/dts
nd ao pull registers use the same base address, but
can be identified by the offset.
Fixes: 29ae0952e85f ("pinctrl: meson-g12a: add pinctrl driver support")
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
Signed-off-by: Jerome Brunet
---
drivers/pinctrl/meson/pinctrl-meson.c | 22
ve to look
at this again
Fixes: 3cd3c83f6752 ("pinctrl: Add compatibles for Amlogic Meson G12A pin
controllers")
Signed-off-by: Jerome Brunet
---
.../devicetree/bindings/pinctrl/meson,pinctrl.txt | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/Documentation
On the G12a, there is a new 'region' to handle the drive-strength.
This is optional since the older do not have this.
Fixes: 29ae0952e85f ("pinctrl: meson-g12a: add pinctrl driver support")
Signed-off-by: Jerome Brunet
---
drivers/pinctrl/meson/pinctrl-meson.c | 6 ++
drivers/pin
by
the bootloader. Enabling the broken pinctrl driver could cause regressions
in kernelCI. Having a tag, would allow us to start using pinctrl on this
SoC in this cycle, w/o regression. It would be nice :)
Jerome
Jerome Brunet (2):
dt-bindings: pinctrl: meson: update register descriptions
Add efuse to the AXG family
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index ae336cb34e29..0e0abb1a03e2 100644
Limiting the HS200 rate on the s400 was just a way to mask that the
tuning setting were not correct. This seems to have been fixed with
the recent MMC driver update. We can now use HS200 at full speed.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 3 +--
1
The bcm wifi/bt device on SDIO support SDR104 and it seems to work
well following the recent mmc driver update, so enable this
ultra high speed mode
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
Instead of relying on a fixed names for the differents input clocks
of the controller, get them through DT.
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg-aoclk.c | 22 +++-
drivers/clk/meson/gxbb-aoclk.c | 25 --
drivers/clk/meson/meson-aoclk.c
Following the preparation series [0] sent in the last cycle, this
patchset adds clock input claim through DT in the gxbb and axg clock
controllers
[0]: https://lkml.kernel.org/r/20181203171640.12110-1-jbru...@baylibre.com
Jerome Brunet (3):
clk: meson: gxbb: claim clock controller input clock
Instead of relying on a fixed name for the xtal clock, claim the
controller input clock trough DT.
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/gxbb.c | 37 -
1 file changed, 24 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/meson/gxbb.c b
Instead of relying on a fixed name for the xtal clock, claim the
controller input clock trough DT.
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg.c | 27 +++
1 file changed, 19 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/meson/axg.c b/drivers/clk
periph and hiu bus addresses/size are wrong.
cbus, aobus and apb just don't exist in the memory map so remove them.
Fixes: 9c8c52f7cb4f ("arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT
support")
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-g12a
As reported, the SPDX license id is not placed correctly and the variant
of the BSD License used should be specified.
Fixes: c16292578ffa ("dt-bindings: reset: Add bindings for the Meson-AXG SoC
Reset Controller")
Reported-by: Thomas Gleixner
Signed-off-by: Jerome Brunet
-
On Wed, 2018-09-12 at 21:49 -0700, Kevin Hilman wrote:
> Jerome Brunet writes:
>
> > Compile the necessary drivers as modules, including codecs, for the
> > s400 sound card.
> >
> > Signed-off-by: Jerome Brunet
>
> Applied to v4.20/defconfig.
Hi Kevin,
On Sat, 2018-12-22 at 18:28 +0100, Martin Blumenstingl wrote:
> Hi Jerome,
>
> On Thu, Dec 6, 2018 at 4:18 PM Jerome Brunet wrote:
> > The goal of the patchset was mainly to address the following warning:
> >
> > WARNING: CPU: 0 PID: 0 at /usr/src/kernel/drivers/m
On Sat, 2018-12-22 at 18:01 +0100, Martin Blumenstingl wrote:
> Hi Jerome,
>
> On Thu, Dec 20, 2018 at 5:11 PM Jerome Brunet wrote:
> > While some 3.3v eMMC 4.0 are available from libretech, the default
> > option for the aml-s905x-cc seems to 1.8v 5.0 modules.
> nit-pick
related
issues, so dev_dbg() looks more appropriate than dev_info().
Signed-off-by: Jerome Brunet
---
drivers/base/core.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/base/core.c b/drivers/base/core.c
index 04bbcd779e11..8d330f921ad7 100644
--- a/drivers/base
Replace the cec-32k clock of gxbb-ao with the simpler dual divider
driver. The dual divider implements only the dividing part. All the
other bits are now exposed using simple elements, such as gates and
muxes
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/Makefile | 2 +-
drivers
On Mon, 2018-12-17 at 17:54 -0800, Stephen Boyd wrote:
> Quoting Jerome Brunet (2018-12-07 02:03:19)
> > On Thu, 2018-12-06 at 14:08 -0800, Stephen Boyd wrote:
> > > Sorry this email is long.
> >
> > I tried reply the best I could to your use cases
> >
>
Add the CLKIDs for the slow clock generation path
Reviewed-by: Rob Herring
Signed-off-by: Jerome Brunet
---
include/dt-bindings/clock/axg-aoclkc.h | 7 ++-
include/dt-bindings/clock/gxbb-aoclkc.h | 7 +++
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/include/dt
Add the clock subtree generating the 32k clock in amlogic axg ao block.
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg-aoclk.c | 175 +++---
drivers/clk/meson/axg-aoclk.h | 13 +--
2 files changed, 163 insertions(+), 25 deletions(-)
diff --git a/drivers/clk
Add the dual divider driver. This special divider make a weighted
average between 2 dividers to reach fractional divider values.
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/Makefile | 2 +-
drivers/clk/meson/clk-dualdiv.c | 130
drivers/clk/meson
Order, ids and size between the table of regmap clocks and the onecell
data table could be different.
Set regmap pointer in all the regmap clocks before starting the
registration using the onecell data, to make sure we don't
get into an incoherent situation.
Signed-off-by: Jerome Brunet
/20181204163257.32085-1-jbru...@baylibre.com
[1]: https://lkml.kernel.org/r/20181204165310.20806-1-jbru...@baylibre.com
Jerome Brunet (5):
dt-bindings: clk: meson: add ao slow clock path ids
clk: meson: clean-up clock registration
clk: meson: add dual divider clock driver
clk: meson: gxbb-ao
The eMMC on this board is add-on module which is not mandatory. Removing
'non-removable' property should prevent some errors when booting a board
w/o an eMMC module present.
Fixes: 72fb2c852188 ("ARM64: dts: meson-gxl-s905x-libretech-cc: fixup board
definition")
Signed-off-by: Jer
This patchset provides a couple of update for the eMMC on the libretech-cc
It should remove some error message for those who don't have an eMMC
module and improve the performance for those who do have one.
Jerome Brunet (2):
arm64: dts: meson: libretech-cc: set eMMC as removable
arm64: dts
While some 3.3v eMMC 4.0 are available from libretech, the default
option for the aml-s905x-cc seems to 1.8v 5.0 modules.
Signed-off-by: Jerome Brunet
---
.../boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts| 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch
Even if this spdif input driver is only supposed to be used on 64bits
platform, there is possible problem with 32bits and do_div, as reported
by the kbuild robot. Just fix it.
Fixes: 5ce5658375e6 ("ASoC: meson: add axg spdif input")
Signed-off-by: Jerome Brunet
---
Hi Mark,
On Thu, 2018-12-13 at 22:37 +0800, Sunny Luo wrote:
> Hi Jerome,
>
> On 2018/12/13 17:28, Jerome Brunet wrote:
> > On Thu, 2018-12-13 at 09:55 +0100, Neil Armstrong wrote:
> > > > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> > > > config S
Add the SPDIF capture codec to the axg s400 board
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
index
Enable spdif input device on the S400 and add it to the card
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
b/arch/arm64/boot/dts/amlogic/meson
Add the SPDIF input device of the axg audio subsystem
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index
.
[0]:
https://lkml.kernel.org/r/20181213120843.876cb1125...@debutante.sirena.org.uk
Jerome Brunet (3):
arm64: dts: meson-axg: add spdifin
arm64: dts: meson-axg: s400: add spdif-dir codec
arm64: dts: meson-axg: s400: add spdifin to the sound card
.../arm64/boot/dts/amlogic/meson-axg-s400.dts
On Thu, 2018-12-13 at 09:55 +0100, Neil Armstrong wrote:
> Hi Sunny,
>
> On 13/12/2018 09:39, Sunny Luo wrote:
> > The SPICC controller in Meson-AXG SoC is capable of using
> > a linear clock divider to reach a much fine tuned range of clocks,
> > while the old controller only use a power of two
On Thu, 2018-12-13 at 16:39 +0800, Sunny Luo wrote:
> The SPICC controller in Meson-AXG is capable of driving the CLK/MOSI/SS
> signal lines through the idle state (between two transmission operation),
> which avoid the signals floating in unexpected state.
>
> Signed-off-by: Sunny Luo
>
On Thu, 2018-12-13 at 12:55 +0800, Jianxin Pan wrote:
> On 2018/12/12 0:59, Jerome Brunet wrote:
> > On Tue, 2018-12-11 at 00:04 +0800, Jianxin Pan wrote:
> > > From: Yixun Lan
> > >
> [...]
> > >
> > > +config COMMON_CLK_MMC_MESON
> &g
On Tue, 2018-12-11 at 00:04 +0800, Jianxin Pan wrote:
> When CLK_DIVIDER_ONE_BASED flag is set, the sclk divider will be:
> one based divider (div = val), and zero value gates the clock
>
> Signed-off-by: Jianxin Pan
> ---
> drivers/clk/meson/clkc-audio.h | 1 +
> drivers/clk/meson/sclk-div.c
ivers/clk/meson/mmc-clkc.c
> @@ -0,0 +1,313 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Amlogic Meson MMC Sub Clock Controller Driver
> + *
> + * Copyright (c) 2017 Baylibre SAS.
> + * Author: Jerome Brunet
> + *
> + * Copyright (c) 2018 Amlogic, inc.
> +
+ OR MIT)
> +/*
> + * Amlogic Meson MMC Sub Clock Controller Driver
> + *
> + * Copyright (c) 2017 Baylibre SAS.
> + * Author: Jerome Brunet
> + *
> + * Copyright (c) 2018 Amlogic, inc.
> + * Author: Yixun Lan
> + * Author: Jianxin Pan
> + */
> +
> +#includ
On Thu, 2018-11-29 at 21:41 +0800, Jian Hu wrote:
> Add new clock controller compatible and dt-bingdings headers
> for the Everything-Else domain of the g12a SoC
>
> Signed-off-by: Jian Hu
> ---
> .../bindings/clock/amlogic,gxbb-clkc.txt | 1 +
> include/dt-bindings/clock/g12a-clkc.h
the parity,
user, channel status and validity bits. It is better to just provide the
whole spdif subframe to the userspace and let the iec958 plugin deal with
it.
Signed-off-by: Jerome Brunet
---
sound/soc/meson/axg-fifo.h | 3 ++-
sound/soc/meson/axg-toddr.c | 15 +--
2 files changed, 7
Add the DT binding documentation for axg's SPDIF input.
Signed-off-by: Jerome Brunet
---
.../bindings/sound/amlogic,axg-spdifin.txt| 22 +++
1 file changed, 22 insertions(+)
create mode 100644
Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt
diff --git
more eyes on
this will help figure this out.
Since I authored all Amlogic ASoC drivers (and the related bugs) merged
so far, I have added myself as maintainer of them in the last patch of this
series.
Jerome Brunet (4):
ASoC: meson: axg-toddr: add support for spdifin backend
ASoC: meson: add axg
Add support for the spdif input decoder of the axg SoC family
Signed-off-by: Jerome Brunet
---
sound/soc/meson/Kconfig | 9 +-
sound/soc/meson/Makefile | 2 +
sound/soc/meson/axg-spdifin.c | 521 ++
3 files changed, 531 insertions(+), 1 deletion
Add sound/soc/meson drivers entry for Amlogic audio drivers.
Signed-off-by: Jerome Brunet
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7fe120fc25fa..e8e79713a790 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1310,6 +1310,13 @@ F
The name of input clock is not aligned with the rest of the tree
Because of this, the audio peripheral clocks are orphaned.
Fixes: 1222ab89328f ("clk: meson: axg-audio: use the clk input helper function")
Signed-off-by: Jerome Brunet
---
Neil,
Feel free to squash this with commit 12
On Thu, 2018-12-06 at 20:14 -0800, Kevin Hilman wrote:
> Jerome Brunet writes:
>
> > The goal of the patchset was mainly to address the following warning:
> >
> > WARNING: CPU: 0 PID: 0 at /usr/src/kernel/drivers/mmc/host/meson-gx-
> > mmc.c:1025 meson_mmc_irq
On Thu, 2018-12-06 at 20:14 -0800, Kevin Hilman wrote:
> Jerome Brunet writes:
>
> > The goal of the patchset was mainly to address the following warning:
> >
> > WARNING: CPU: 0 PID: 0 at /usr/src/kernel/drivers/mmc/host/meson-gx-
> > mmc.c:1025 meson_mmc_irq
ently used.
>
> Quoting Jerome Brunet (2018-12-05 09:20:09)
> > On Tue, 2018-12-04 at 23:54 -0800, Stephen Boyd wrote:
> > > Ok. Thanks for the explanation. What do you do to fix this problem in
> > > the 'ao_cts_cec' clk implementation?
> >
> > IMO, there is
ently used.
>
> Quoting Jerome Brunet (2018-12-05 09:20:09)
> > On Tue, 2018-12-04 at 23:54 -0800, Stephen Boyd wrote:
> > > Ok. Thanks for the explanation. What do you do to fix this problem in
> > > the 'ao_cts_cec' clk implementation?
> >
> > IMO, there is
The spinlock is only used within the irq handler so it does not
seem very useful.
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c
index fcb5d693c897
The spinlock is only used within the irq handler so it does not
seem very useful.
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c
index fcb5d693c897
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