As we sepreated the code of loongson2ef/loongson3a, they can
now have their own entries.
Signed-off-by: Jiaxun Yang
---
MAINTAINERS | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index a2c343ee3b2c..d5d4fed632e6 100644
--- a/MAINTAINERS
As later model of GSx64 family processors including 2-series-soc have
similar design with initial loongson3a while loongson2e/f seems less
identical, we separate loongson2e/f support code out of mach-loongson64
to make our life easier.
Signed-off-by: Jiaxun Yang
---
arch/mips/Kbuild.platforms
Document Loongson-3 I/O Interrupt controller.
Signed-off-by: Jiaxun Yang
---
.../loongson,ls3-iointc.yaml | 75 +++
1 file changed, 75 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-iointc.yaml
diff --git
Export irq_map_generic_chip, irq_unmap_generic_chip so drivers
can use them to construct their own generic chip domain ops.
Signed-off-by: Jiaxun Yang
---
include/linux/irq.h | 1 +
kernel/irq/generic-chip.c | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/include
v1:
- dt-bindings fixup according to Rob's comments
- irqchip fixup according to Marc's comments
- ls3-iointc: Make Core&IP map per-IRQ
- Regenerate kconfigs
- Typo & style improvements
Jiaxun Yang (18):
MIPS: Loongson64: Rename CPU TYPES
MIPS: Loongson64: separate loon
CPU_LOONGSON2 -> CPU_LOONGSON2EF
CPU_LOONGSON3 -> CPU_LOONGSON64
As newer loongson-2 products (2G/2H/2K1000) can share kernel
implementation with loongson-3 while 2E/2F are less similar with
other LOONGSON64 products.
Signed-off-by: Jiaxun Yang
---
arch/mips/K
On 2019/8/28 下午2:59, Marc Zyngier wrote:
On Wed, 28 Aug 2019 08:27:05 +0800
Jiaxun Yang wrote:
On 2019/8/28 上午12:45, Marc Zyngier wrote:
On 27/08/2019 09:52, Jiaxun Yang wrote:
+ chained_irq_enter(chip, desc);
+
+ pending = readl(priv->intc_base + LS3_REG_INTC_EN_STA
On 2019/8/28 上午6:05, Aaro Koskinen wrote:
Hi,
On Tue, Aug 27, 2019 at 04:52:51PM +0800, Jiaxun Yang wrote:
As later model of GSx64 family processors including 2-series-soc have
similar design with initial loongson3a while loongson2e/f seems less
identical, we seprate loongson2e/f support
On 2019/8/28 上午12:45, Marc Zyngier wrote:
On 27/08/2019 09:52, Jiaxun Yang wrote:
This controller appeared on Loongson-3 family of chips as the primary
package interrupt source.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig | 9 ++
drivers/irqchip/Makefile
On 2019/8/28 上午4:41, Paul Burton wrote:
Hi guys,
On Tue, Aug 27, 2019 at 10:18:46PM +0800, Jiaxun Yang wrote:
On 2019/8/27 下午8:45, Rob Herring wrote:
On Tue, Aug 27, 2019 at 3:55 AM Jiaxun Yang wrote:
diff --git a/Documentation/devicetree/bindings/mips/loongson/cpus.yaml
b/Documentation
/B
processors is sharing the same PRID_IMP with Loongson-2E/F.
It may lead to confusion if we're using the same way to express totally
different contents.
Notice me if any one have better idea on how to express loongson2ef
family machines.
--
Jiaxun Yang
Huacai
On 2019/8/27 下午8:45, Rob Herring wrote:
On Tue, Aug 27, 2019 at 3:55 AM Jiaxun Yang wrote:
Prepare for later dts.
Signed-off-by: Jiaxun Yang
---
.../bindings/mips/loongson/cpus.yaml | 38 +++
.../bindings/mips/loongson/devices.yaml | 64 +++
2
On 2019/8/27 下午8:49, Rob Herring wrote:
On Tue, Aug 27, 2019 at 3:59 AM Jiaxun Yang wrote:
Document Loongson-3 HyperTransport Interrupt controller.
Signed-off-by: Jiaxun Yang
---
.../loongson,ls3-htintc.yaml | 53 +++
1 file changed, 53 insertions
We've made generic irqchip drivers for Loongson-3 platform, it's time
to say goodbye to these legacy code.
Signed-off-by: Jiaxun Yang
---
arch/mips/include/asm/mach-loongson64/irq.h | 1 -
arch/mips/loongson64/irq.c | 167 +---
arch/mips/loongs
can allocate irq_desc
during initialization.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/irq-mips-cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-mips-cpu.c b/drivers/irqchip/irq-mips-cpu.c
index 95d4fd8f7a96..c3cf7fa76424 100644
--- a/drivers/irqc
Prepare for later dts.
Signed-off-by: Jiaxun Yang
---
.../bindings/mips/loongson/cpus.yaml | 38 +++
.../bindings/mips/loongson/devices.yaml | 64 +++
2 files changed, 102 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/loongson
Load proper dtb according to firmware passed parameters and
CPU PRID.
Signed-off-by: Jiaxun Yang
---
.../asm/mach-loongson64/builtin_dtbs.h| 26 +++
.../include/asm/mach-loongson64/loongson64.h | 2 +
arch/mips/loongson64/env.c| 67 +++
arch
This controller appeared on Loongson-3 family of chips to receive interrupts
from PCH chip.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig | 8 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls3-htintc.c | 145 +++
3 files changed
For some platforms (e.g. Loongson-3), platfrom interrupt controller
supports polling interrupt vector from i8259 automaticly and generating
sepreated interrupt.
Thus we add plat-poll OF property for these platforms and setup sepreated
chained interrupt handler.
Signed-off-by: Jiaxun Yang
Document Loongson-3 I/O Interrupt controller.
Signed-off-by: Jiaxun Yang
---
.../loongson,ls3-iointc.yaml | 61 +++
1 file changed, 61 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-iointc.yaml
diff --git
As we sepreated the code of loongson2ef/loongson3a, they can
now have their own entries.
Signed-off-by: Jiaxun Yang
---
MAINTAINERS | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index a2c343ee3b2c..d5d4fed632e6 100644
--- a/MAINTAINERS
without proper
maintainance and became outdated.
This patchset brings modern DeviceTree and irqchip support to the Loongson64
machine, and leaves
Loongson 2e/f alone since they are too legacy to touch.
Jiaxun Yang (13):
MIPS: Loongson64: Rename CPU TYPES
MIPS: Loongson64: Sepreate
Document Loongson-3 HyperTransport Interrupt controller.
Signed-off-by: Jiaxun Yang
---
.../loongson,ls3-htintc.yaml | 53 +++
1 file changed, 53 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-htintc.yaml
This controller appeared on Loongson-3 family of chips as the primary
package interrupt source.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig | 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls3-iointc.c | 216 +++
3 files
As later model of GSx64 family processors including 2-series-soc have
similar design with initial loongson3a while loongson2e/f seems less
identical, we seprate loongson2e/f support code out of mach-loongson64
to make our life easier.
Signed-off-by: Jiaxun Yang
---
arch/mips/Kbuild.platforms
Add generic device dts for Loongson-3 devices.
They seems identical but will be different later.
Signed-off-by: Jiaxun Yang
---
arch/mips/Kconfig | 4 +-
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/loongson/Makefile | 8
CPU_LOONGSON2 -> CPU_LOONGSON2EF
CPU_LOONGSON3 -> CPU_LOONGSON64
As newer loongson-2 products (2G/2H/2K1000) can share kernel
implementation with loongson-3 while 2E/2F are less similar with
other LOONGSON64 products.
Signed-off-by: Jiaxun Yang
---
arch/mips/K
Acked-by: Jiaxun Yang
Thanks!
--
Jiaxun Yang
在 2019/3/29 14:21, Dan Carpenter 写道:
Currently, when irq_domain_add_linear() fails, the error code does not
get so it returns zero which is wrong. Fix it by setting appropriate
error code.
Fixes: 9e543e22e204 ("irqchip: Add driver for Loo
Hi Rob,
Thanks for your reply, I have some questions on that:
在 2019/3/12 下午8:28, Rob Herring 写道:
On Tue, Mar 12, 2019 at 4:16 AM Jiaxun Yang wrote:
Add devicetree skeleton for ls1b and ls1c
Signed-off-by: Jiaxun Yang
---
+/ {
+ model = "Loongson LS1B";
+
Add devicetree skeleton for ls1b and ls1c
Signed-off-by: Jiaxun Yang
---
arch/mips/boot/dts/loongson/Makefile | 6 ++
arch/mips/boot/dts/loongson/ls1b.dts | 21 +
arch/mips/boot/dts/loongson/ls1c.dts | 25 ++
arch/mips/boot/dts/loongson/ls1x.dtsi | 117
Initial DeviceTree support for loongson32
Also remove the old IRQ driver since it have been replaced
by generic LS1X_IRQ.
Signed-off-by: Jiaxun Yang
---
arch/mips/Kconfig| 5 +-
arch/mips/loongson32/common/Makefile | 2 +-
arch/mips/loongson32/common/irq.c| 196
Loongson-1B&C have totally identical GS232 core, so merge
them into same CPU config.
Signed-off-by: Jiaxun Yang
---
arch/mips/Kconfig| 38 +---
arch/mips/include/asm/cpu-type.h | 3 +--
arch/mips/loongson32/Kconfig | 4 ++--
3 files changed
It's going to be enabled by DeviceTree
Signed-off-by: Jiaxun Yang
---
.../include/asm/mach-loongson32/platform.h| 1 -
arch/mips/loongson32/common/platform.c| 30 ---
arch/mips/loongson32/ls1b/board.c | 1 -
3 files changed, 32 deletions(-)
diff
Hi
More works should be done after rework on clk and other drivers
accepted.
Thanks.
Newer ThinkPads have a totally different EC program information DMI
table. And thermal subdriver can't work without correct EC version.
Read from this entry if the old method failed to get EC information.
Signed-off-by: Jiaxun Yang
---
drivers/platform/x86/thinkpad_acpi.c
在 2019/3/8 上午7:14, mario.limoncie...@dell.com 写道:
-Original Message-
From: platform-driver-x86-ow...@vger.kernel.org On Behalf Of Jiaxun Yang
Sent: Thursday, March 7, 2019 2:08 AM
To: ibm-a...@hmh.eng.br
Cc: dvh...@infradead.org; a...@infradead.org; ibm-acpi-
de
在 2019/3/7 下午7:20, Greg KH 写道:
On Thu, Mar 07, 2019 at 04:08:20PM +0800, Jiaxun Yang wrote:
Some AMD based ThinkPads have a firmware bug that calling
"GBDC" will cause bluetooth on Intel wireless cards blocked.
Probe these models by DMI match and disable bluetooth subdriver
if
Some AMD based ThinkPads have a firmware bug that calling
"GBDC" will cause bluetooth on Intel wireless cards blocked.
Probe these models by DMI match and disable bluetooth subdriver
if specified Intel wireless card exist.
Cc: stable # 4.14+
Signed-off-by: Jiaxun Yang
---
drivers/pl
Some AMD based ThinkPads have a firmware bug that calling
"GBDC" will cause bluetooth on Intel wireless cards blocked.
Probe these models by DMI match and disable bluetooth subdriver
if specified Intel wireless card exist.
Signed-off-by: Jiaxun Yang
---
drivers/platform/x86/think
Loongson-1 is a series of MIPS MCUs.
This patch add the clock bindings for loongson-1b and
loongson-1c clock subsystem.
Signed-off-by: Jiaxun Yang
---
.../bindings/clock/loongson1-clock.txt | 14 ++
include/dt-bindings/clock/ls1b-clock.h | 17
The patch introduces options for loongson1 clocks so we can
select the driver we need.
Signed-off-by: Jiaxun Yang
---
drivers/clk/Kconfig| 1 +
drivers/clk/Makefile | 2 +-
drivers/clk/loongson1/Kconfig | 27 +++
drivers/clk/loongson1/Makefile
This patch add of support by split the clk_hw register and
clkdev register, then handle the of clk_hw via
of_clk_hw_onecell_get.
Signed-off-by: Jiaxun Yang
---
drivers/clk/loongson1/clk-loongson1b.c | 197 -
drivers/clk/loongson1/clk-loongson1c.c | 164
v2->v3: Fix dt-bindings issues
Dt-bindings doc about Loongson-1 interrupt controller.
Reviewed-by: Rob Herring
Signed-off-by: Jiaxun Yang
---
.../loongson,ls1x-intc.txt| 25 +++
1 file changed, 25 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller
v1->v2: Fix SPDX-License-Identifier
v2->v3: Rework according suggestions from Marc Zyngier, Thanks.
v3->v4: Rework the driver into a single chip driver.
v4->v5: Fix minor issues.
v5->v6: Fix doc and collect Rob's review tag.
This controller appeared on Loongson-1 family MCUs
including Loongson-1B and Loongson-1C.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig| 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls1x.c | 192 +
3 files changed, 202
Dt-bindings doc about Loongson-1 interrupt controller.
Signed-off-by: Jiaxun Yang
---
.../loongson,ls1x-intc.txt| 24 +++
1 file changed, 24 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt
diff
v1->v2: Fix SPDX-License-Identifier
v2->v3: Rework according suggestions from Marc Zyngier, Thanks.
v3->v4: Rework the driver into a single chip driver.
v4->v5: Fix minor issues.
This controller appeared on Loongson-1 family MCUs
including Loongson-1B and Loongson-1C.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig| 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls1x.c | 192 +
3 files changed, 202
Loongson-1 is a series of MIPS MCUs.
This patch add the clock bindings for loongson-1b and
loongson-1c clock subsystem.
Signed-off-by: Jiaxun Yang
---
.../bindings/clock/loongson1-clock.txt| 11 ++
include/dt-bindings/clock/ls1b-clock.h| 20 +++
include
This patch add of support by split the clk_hw register and
clkdev register, then handle the of clk_hw via
of_clk_hw_onecell_get.
Signed-off-by: Jiaxun Yang
---
drivers/clk/loongson1/clk-loongson1b.c | 197 -
drivers/clk/loongson1/clk-loongson1c.c | 164
The patch introduces options for loongson1 clocks so we can
select the driver we need.
Signed-off-by: Jiaxun Yang
---
drivers/clk/Kconfig| 1 +
drivers/clk/Makefile | 2 +-
drivers/clk/loongson1/Kconfig | 27 +++
drivers/clk/loongson1/Makefile
Add of support for ls1c-clock and ls1b-clock
v2: Move of declear into per clk file
Dt-bindings doc about Loongson-1 interrupt controller.
Signed-off-by: Jiaxun Yang
---
.../loongson,ls1x-intc.txt| 24 +++
1 file changed, 24 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt
diff
This controller appeared on Loongson-1 family MCUs
including Loongson-1B and Loongson-1C.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig| 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls1x.c | 196 +
3 files changed, 206
v1->v2: Fix SPDX-License-Identifier
v2->v3: Rework according suggestions from Marc Zyngier, Thanks.
v3->v4: Rework the driver into a single chip driver.
Loongson-1 is a series of MIPS MCUs.
This patch add the clock bindings for loongson-1b and
loongson-1c clock subsystem.
Signed-off-by: Jiaxun Yang
---
.../bindings/clock/loongson1-clock.txt| 11 ++
include/dt-bindings/clock/ls1b-clock.h| 20 +++
include
The patch introduces options for loongson1 clocks so we can
select the driver we need.
Signed-off-by: Jiaxun Yang
---
drivers/clk/Kconfig| 1 +
drivers/clk/Makefile | 2 +-
drivers/clk/loongson1/Kconfig | 27 +++
drivers/clk/loongson1/Makefile
Add of support for ls1c-clock and ls1b-clock
This patch add of support by split the clk_hw register and
clkdev register, then handle the of clk_hw via
of_clk_hw_onecell_get.
Signed-off-by: Jiaxun Yang
---
drivers/clk/loongson1/clk-loongson1b.c | 176 +++--
drivers/clk/loongson1/clk-loongson1c.c | 144
u, 24 Jan 2019 03:27:29 +0000,
Jiaxun Yang wrote:
This controller appeared on Loongson-1 family MCUs
including Loongson-1B and Loongson-1C.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig| 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls1x.c
Dt-bindings doc about Loongson-1 interrupt controller
Signed-off-by: Jiaxun Yang
---
.../loongson,ls1x-intc.txt| 24 +++
1 file changed, 24 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt
diff
This controller appeared on Loongson-1 family MCUs
including Loongson-1B and Loongson-1C.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig| 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls1x.c | 176 +
3 files changed, 186
v1->v2: Fix SPDX-License-Identifier
v2->v3: Rework according suggestions from Marc Zyngier, Thanks.
This controller appeared on Loongson-1 family MCUs
including Loongson-1B and Loongson-1C.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig| 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls1x.c | 194 +
3 files changed, 204
Dt-bindings doc about Loongson-1 interrupt controller
Signed-off-by: Jiaxun Yang
---
.../loongson,ls1x-intc.txt| 28 +++
1 file changed, 28 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt
diff
v1->v2: Fix SPDX-License-Identifier
Dt-bindings doc about Loongson-1 interrupt controller
Signed-off-by: Jiaxun Yang
---
.../loongson,ls1x-intc.txt| 28 +++
1 file changed, 28 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt
diff
This controller appeared on Loongson-1 family MCUs
including Loongson-1B and Loongson-1C.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig| 9 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls1x.c | 194 +
3 files changed, 204
Commit-ID: 0237199186e7a4aa5310741f0a6498a20c820fd7
Gitweb: https://git.kernel.org/tip/0237199186e7a4aa5310741f0a6498a20c820fd7
Author: Jiaxun Yang
AuthorDate: Tue, 20 Nov 2018 11:00:18 +0800
Committer: Borislav Petkov
CommitDate: Fri, 18 Jan 2019 16:44:03 +0100
x86/CPU/AMD: Set the
0f10 and should have
CPB feature according AMD product specifications, however
their Fn8000_0007_EDX is 0x6599, indicating they don't
support CPB feature.
Since whole F17h should support CPB, we set the cap for all of
them.
Cc: sta...@vger.kernel.org
Signed-off-by: Jiaxun Yang
---
arch
x00810f10 and should have
CPB feature according AMD product specifications, however
their Fn8000_0007_EDX is 0x6599, indicating they don't
support CPB feature.
Signed-off-by: Jiaxun Yang
---
arch/x86/kernel/cpu/amd.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --
specific
WRITE_ONCE looks more reasonable, because it the eliminate the "non-cohrency".
So we can solve the bug from the root.
Thanks.
--
Jiaxun Yang
在 2018-03-22四的 22:21 +，James Hogan写道：
> On Fri, Mar 16, 2018 at 03:55:16PM +0800, Huacai Chen wrote:
> > diff --git a/arch/mips/boot/compressed/decompress.c
> > b/arch/mips/boot/compressed/decompress.c
> > index fdf99e9..5ba431c 100644
> > --- a/arch/mips/boot/compressed/decompress.c
> > +++ b/
has_cpu_mips*_user to decide which level should be
displayed in cpuinfo to prevent misleading userspace programs.
Signed-off-by: Jiaxun Yang
---
arch/mips/include/asm/cpu-features.h | 39
arch/mips/kernel/proc.c | 22 ++--
2 files changed
All loongson-3 processors support mips32r2 mips64r2 usermode instructions.
However 3A1000 3B1000 3B1500 should be treated as r1 in kernel.
Signed-off-by: Jiaxun Yang
---
arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips
has_cpu_mips*_user to decide witch level should be
displayed in cpuinfo to prevent misleading userspace programs.
Signed-off-by: Jiaxun Yang
---
arch/mips/include/asm/cpu-features.h | 39
arch/mips/kernel/proc.c | 22 ++--
2 files changed
All loongson-3 processors support mips64r2 usermode instructions.
However 3A1000 3B1000 3B1500 should be treated as mips64r1 in kernel.
Signed-off-by: Jiaxun Yang
---
arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips
ir b) $ cd c) $ wget
> http://git.ingenic.cn:8082/bj/repo d) $ chmod +x repo
>
Repo is a sourcecode managing system used by Android. The gerrit is
still here but need extra premission to reach. Now ingenic release
there soucecode by "Baidu Netdisk". It's hard to access by foreign
users. So we put the shourcecode here: https://github.com/Ingenic-commu
nity/linux-xburst-bsp
Thanks
--
Jiaxun Yang
在 2018-03-07三的 20:35 +0530，PrasannaKumar Muralidharan写道：
> Hi James,
>
> Seems Jiaxun is interested in the board and is willing to help.
>
> I have been told that Ingenic is focusing on IoT market and X1000 is
> intended for IoT segment. I think that they would be selling several
> 100Ks of chip
ag interface with standard MIPS cores, maybe we need some
modification on openocd). So maybe I can help in testing this after I
get my broad. Just ask if you need any help.
Thanks
--
Jiaxun Yang
t you know that we have a problem here.
--
Jiaxun Yang
signature.asc
Description: This is a digitally signed message part
h.
Signed-off-by: Jiaxun Yang
---
arch/mips/loongson64/Kconfig | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/mips/loongson64/Kconfig b/arch/mips/loongson64/Kconfig
index 0d249fc3cfe9..a7d9a9241ac4 100644
--- a/arch/mips/loongson64/Kconfig
+++ b/arch/mips/loongson64/Kconfig
@@ -
On 2018-01-02 Tue 08:48 +，James Hogan Wrote：
> On Tue, Dec 26, 2017 at 12:21:38PM +0800, Jiaxun Yang wrote:
> > Make loongson64 a pure 64-bit mach.
>
> Please expand to provide some rationale behind the change. Was 32-bit
> support broken at runtime, or broken at build time
rs who were from ICT and Lemote?
As far as I know, some authors are no longer working in Lemote. And I
can't see their new email addresses so it may hard to get their ack or
sign-off.
Thanks for your adivce.
--
Best Regards
Jiaxun Yang
signature.asc
Description: This is a digitally signed message part
To reduce unnecessary license text.
Signed-off-by: Jiaxun Yang
---
arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h | 5 ++---
arch/mips/include/asm/mach-loongson64/dma-coherence.h | 6 ++
arch/mips/include/asm/mach-loongson64/ec_kb3310b.h| 6 ++
arch
To reduce unnecessary license text.
Signed-off-by: Jiaxun Yang
---
arch/mips/loongson64/Makefile | 1 +
arch/mips/loongson64/Platform | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/mips/loongson64/Makefile b/arch/mips/loongson64/Makefile
index 4fe3d88fc361..64b270c70607 100644
--- a
To reduce unnecessary license text.
Signed-off-by: Jiaxun Yang
---
arch/mips/loongson64/loongson-3/Makefile | 1 +
arch/mips/loongson64/loongson-3/cop2-ex.c | 5 ++---
arch/mips/loongson64/loongson-3/numa.c | 7 ++-
arch/mips/loongson64/loongson-3/platform.c | 6 ++
arch/mips
To reduce unnecessary license text.
Signed-off-by: Jiaxun Yang
---
arch/mips/loongson64/common/bonito-irq.c | 6 ++
arch/mips/loongson64/common/cmdline.c | 7 ++-
arch/mips/loongson64/common/early_printk.c | 6 ++
arch/mips/loongson64/common/env.c | 6 ++
arch
To reduce unnecessary license text.
Signed-off-by: Jiaxun Yang
---
arch/mips/loongson64/lemote-2f/Makefile | 1 +
arch/mips/loongson64/lemote-2f/clock.c | 5 ++---
arch/mips/loongson64/lemote-2f/ec_kb3310b.c | 6 ++
arch/mips/loongson64/lemote-2f/irq.c| 6 ++
arch/mips
To reduce unnecessary license text.
Signed-off-by: Jiaxun Yang
---
arch/mips/loongson64/fuloong-2e/Makefile | 1 +
arch/mips/loongson64/fuloong-2e/irq.c| 6 ++
arch/mips/loongson64/fuloong-2e/reset.c | 6 ++
3 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/arch/mips
This patchset should based on "Add YeeLoong support v6"
v1 -> v2
Fix the issue raised by Philippe to use the corret style
To reduce unnecessary license text.
Signed-off-by: Jiaxun Yang
---
arch/mips/loongson64/common/cs5536/Makefile | 1 +
arch/mips/loongson64/common/cs5536/cs5536_acc.c | 6 ++
arch/mips/loongson64/common/cs5536/cs5536_ehci.c | 6 ++
arch/mips/loongson64/common/cs5536/cs5536_ide.c
This patch should based on "Add YeeLoong support v6"
arcs_cmdline refers to boot cmdline for all machs, not only arc systems.
This patch renamed all arcs_cmdline to mips_cmdline.
Signed-off-by: Jiaxun Yang
---
arch/mips/alchemy/common/prom.c | 6 +++---
arch/mips/ar7/prom.c | 8
arch/mips/cavium-octeon
To reduce unnecessary license text.
Signed-off-by: Jiaxun Yang
---
arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h | 5 ++---
arch/mips/include/asm/mach-loongson64/dma-coherence.h | 6 ++
arch/mips/include/asm/mach-loongson64/ec_kb3310b.h| 6 ++
arch
To reduce unnecessary license text.
Signed-off-by: Jiaxun Yang
---
arch/mips/loongson64/Makefile | 1 +
arch/mips/loongson64/Platform | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/mips/loongson64/Makefile b/arch/mips/loongson64/Makefile
index 4fe3d88fc361..64b270c70607 100644
--- a
To reduce unnecessary license text.
Signed-off-by: Jiaxun Yang
---
arch/mips/loongson64/lemote-2f/Makefile | 1 +
arch/mips/loongson64/lemote-2f/clock.c | 5 ++---
arch/mips/loongson64/lemote-2f/ec_kb3310b.c | 6 ++
arch/mips/loongson64/lemote-2f/irq.c| 6 ++
arch/mips
To reduce unnecessary license text.
Signed-off-by: Jiaxun Yang
---
arch/mips/loongson64/loongson-3/Makefile | 1 +
arch/mips/loongson64/loongson-3/cop2-ex.c | 5 ++---
arch/mips/loongson64/loongson-3/numa.c | 7 ++-
arch/mips/loongson64/loongson-3/platform.c | 6 ++
arch/mips
This patchset should based on "Add YeeLoong support v6"
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