This series tries to optimize the mvneta's suspend/resume
implementation by only taking necessary actions.
Jisheng Zhang (2):
net: mvneta: split rxq/txq init into SW and HW parts
net: mvneta: improve suspend/resume
drivers/net/ethernet/marvell/mvneta.c | 146
off-by: Jisheng Zhang <jisheng.zh...@synaptics.com>
---
drivers/net/ethernet/marvell/mvneta.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index eaa4bb80f1c9..30aab9bf77cc 100644
--- a/drivers/net/etherne
off-by: Jisheng Zhang
---
drivers/net/ethernet/marvell/mvneta.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index eaa4bb80f1c9..30aab9bf77cc 100644
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ether
Not all chipidea users need EXTCON, so it's better to avoid
unconditionally select EXTCON, this could save us 2KB kernel Image size.
Signed-off-by: Jisheng Zhang <jisheng.zh...@synaptics.com>
---
drivers/usb/chipidea/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/usb/ch
Not all chipidea users need EXTCON, so it's better to avoid
unconditionally select EXTCON, this could save us 2KB kernel Image size.
Signed-off-by: Jisheng Zhang
---
drivers/usb/chipidea/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb
Change the entry name and move it to its alphabetical location.
We move to ARM/Synaptics instead of ARM/Marvell.
This patch also updates my email address from marvell to synaptics.
Signed-off-by: Jisheng Zhang <jisheng.zh...@synaptics.com>
---
MAINTAINERS | 18 +-
Change the entry name and move it to its alphabetical location.
We move to ARM/Synaptics instead of ARM/Marvell.
This patch also updates my email address from marvell to synaptics.
Signed-off-by: Jisheng Zhang
---
MAINTAINERS | 18 +-
1 file changed, 9 insertions(+), 9
en we may only compile stuff on a very few arches.
>
> Lets cast this multiply to u64 type which prevents overflow.
Reviewed-by: Jisheng Zhang <jisheng.zh...@synaptics.com>
>
> Tested-by: Vineet Gupta <vineet.gup...@synopsys.com>
> Reported-by: Vineet Gupta <vineet
en we may only compile stuff on a very few arches.
>
> Lets cast this multiply to u64 type which prevents overflow.
Reviewed-by: Jisheng Zhang
>
> Tested-by: Vineet Gupta
> Reported-by: Vineet Gupta # ARC STAR 9001306872
> HSDK, sdio: board crashes when copying big f
On Mon, 26 Feb 2018 20:27:22 + Alexey Brodkin wrote:
> Hi Andy,
>
> On Mon, 2018-02-26 at 20:30 +0200, Andy Shevchenko wrote:
> > On Mon, Feb 26, 2018 at 7:14 PM, Evgeniy Didin
> > wrote:
> > > On Mon, 2018-02-26 at 18:53 +0200, Andy Shevchenko wrote:
> > > >
On Mon, 26 Feb 2018 20:27:22 + Alexey Brodkin wrote:
> Hi Andy,
>
> On Mon, 2018-02-26 at 20:30 +0200, Andy Shevchenko wrote:
> > On Mon, Feb 26, 2018 at 7:14 PM, Evgeniy Didin
> > wrote:
> > > On Mon, 2018-02-26 at 18:53 +0200, Andy Shevchenko wrote:
> > > > On Mon, Feb 26, 2018 at
On Mon, 26 Feb 2018 17:34:11 +0300 Evgeniy Didin wrote:
> For some 32-bit architectures calculation of DTO and STO timeout can be
> incorrect
> due to multiply overflow. Lets prevent this by casting multiply and result to
> u64.
>
> Suggested by Jisheng Zhang.
> Swit
On Mon, 26 Feb 2018 17:34:11 +0300 Evgeniy Didin wrote:
> For some 32-bit architectures calculation of DTO and STO timeout can be
> incorrect
> due to multiply overflow. Lets prevent this by casting multiply and result to
> u64.
>
> Suggested by Jisheng Zhang.
> Swit
On Thu, 22 Feb 2018 16:34:18 +0300 Evgeniy Didin wrote:
> In commit 9d9491a7da2a ("mmc: dw_mmc: Fix the DTO timeout calculation") have
> been made
> changes which cause multiply overflow for 32-bit systems.
> The broken timeout calculations caused false interrupt latency warnings
> and
On Thu, 22 Feb 2018 16:34:18 +0300 Evgeniy Didin wrote:
> In commit 9d9491a7da2a ("mmc: dw_mmc: Fix the DTO timeout calculation") have
> been made
> changes which cause multiply overflow for 32-bit systems.
> The broken timeout calculations caused false interrupt latency warnings
> and
commit 4efb2f694114 ("usb: host: xhci-plat: add struct xhci_plat_priv")
introduced struct xhci_plat_priv to hold the plat driver's specific
variables. The clk is only for plat driver, so let's move it to the
proper structure.
Signed-off-by: Jisheng Zhang <jisheng.zh...@synaptics.com&
commit 4efb2f694114 ("usb: host: xhci-plat: add struct xhci_plat_priv")
introduced struct xhci_plat_priv to hold the plat driver's specific
variables. The clk is only for plat driver, so let's move it to the
proper structure.
Signed-off-by: Jisheng Zhang
---
drivers/usb/host/xhci-p
On Thu, 12 Oct 2017 10:46:59 -0700 Jin Qian wrote:
> From: Jin Qian
>
> Expose emmc revision as part of device attributes.
>
> Signed-off-by: Jin Qian
> ---
A trivial point: when you send newer version, could you add change log
so that it's clearly
On Thu, 12 Oct 2017 10:46:59 -0700 Jin Qian wrote:
> From: Jin Qian
>
> Expose emmc revision as part of device attributes.
>
> Signed-off-by: Jin Qian
> ---
A trivial point: when you send newer version, could you add change log
so that it's clearly expressed what's updated/addressed.
>
On Wed, 11 Oct 2017 10:03:01 +0200 Geert Uytterhoeven wrote:
> PSCI support may be disabled at build time (by configuration) or at
> run-time (PSCI firmware not present). While CONFIG_ARM_PSCI_FW can be
> used to check for build time enablement, there is currently no simple
> way to check if
On Wed, 11 Oct 2017 10:03:01 +0200 Geert Uytterhoeven wrote:
> PSCI support may be disabled at build time (by configuration) or at
> run-time (PSCI firmware not present). While CONFIG_ARM_PSCI_FW can be
> used to check for build time enablement, there is currently no simple
> way to check if
On Wed, 11 Oct 2017 13:51:26 -0700
Jin Qian wrote:
> From: Jin Qian
>
> Expose emmc revision as part of device attributes.
>> ANDROID: mmc: core: export emmc revision
This commit probably back port from android linux kernel repo. Could we
remove the
On Wed, 11 Oct 2017 13:51:26 -0700
Jin Qian wrote:
> From: Jin Qian
>
> Expose emmc revision as part of device attributes.
>> ANDROID: mmc: core: export emmc revision
This commit probably back port from android linux kernel repo. Could we
remove the ANDROID prefix
>
> Signed-off-by: Jin
Now that the dts files are moved to the new location, update the berlin
entry in the MAINTAINERS.
Signed-off-by: Jisheng Zhang <jisheng.zh...@synaptics.com>
---
MAINTAINERS | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
Now that the dts files are moved to the new location, update the berlin
entry in the MAINTAINERS.
Signed-off-by: Jisheng Zhang
---
MAINTAINERS | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 209306019483..d0854bc98f24
ct-stb.dts
and update board name string.
* rename dts/marvell/berlin4ct-dmp.dts to synaptics/berlin4ct-dmp.dts
and update board name string.
* Update dts/marvell/Makefile not to build berlin dtbs
Signed-off-by: Jisheng Zhang <jisheng.zh...@synaptics.com>
---
arch/arm64/boot/dts/
ct-stb.dts
and update board name string.
* rename dts/marvell/berlin4ct-dmp.dts to synaptics/berlin4ct-dmp.dts
and update board name string.
* Update dts/marvell/Makefile not to build berlin dtbs
Signed-off-by: Jisheng Zhang
---
arch/arm64/boot/dts/marvell/Makefile | 4
The binder driver now could cause warnings as below on 32bit platforms
if ANDROID_BINDER_IPC_32BIT is unselected:
drivers/android/binder.c:1550:15: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
This patch fix all of them.
Signed-off-by: Jisheng Zhang <j
The binder driver now could cause warnings as below on 32bit platforms
if ANDROID_BINDER_IPC_32BIT is unselected:
drivers/android/binder.c:1550:15: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
This patch fix all of them.
Signed-off-by: Jisheng Zhang
This reverts commit d0bdff0db809 ("staging: Fix build issues with new
binder API"), because commit e38361d032f1 ("ARM: 8091/2: add get_user()
support for 8 byte types") has added the 64bit __get_user_asm_*
implementation.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com&
This reverts commit d0bdff0db809 ("staging: Fix build issues with new
binder API"), because commit e38361d032f1 ("ARM: 8091/2: add get_user()
support for 8 byte types") has added the 64bit __get_user_asm_*
implementation.
Signed-off-by: Jisheng Zhang
---
Since v2:
- fix
dded the
support, so it's time to allow ANDROID_BINDER_IPC_32BIT to be
unselected on 32bit ARM so that the 64bit ABI can be tested/used on
32bit systems.
This change allows running the same 32bit userspace build no matter
the kernel is 64bit or 32bit.
Signed-off-by: Jisheng Zhang <jszh...@ma
dded the
support, so it's time to allow ANDROID_BINDER_IPC_32BIT to be
unselected on 32bit ARM so that the 64bit ABI can be tested/used on
32bit systems.
This change allows running the same 32bit userspace build no matter
the kernel is 64bit or 32bit.
Signed-off-by: Jisheng Zhang
---
Since v1:
-
On Wed, 23 Aug 2017 13:48:47 -0500 Rob Herring wrote:
> On Tue, Aug 22, 2017 at 9:57 PM, John Stultz <john.stu...@linaro.org> wrote:
> > On Tue, Aug 22, 2017 at 7:56 PM, John Stultz <john.stu...@linaro.org>
> > wrote:
> >> On Tue, Aug 22, 2017 at 7:34 PM
On Wed, 23 Aug 2017 13:48:47 -0500 Rob Herring wrote:
> On Tue, Aug 22, 2017 at 9:57 PM, John Stultz wrote:
> > On Tue, Aug 22, 2017 at 7:56 PM, John Stultz
> > wrote:
> >> On Tue, Aug 22, 2017 at 7:34 PM, Jisheng Zhang
> >> wrote:
> >>> On
On Tue, 22 Aug 2017 19:57:04 -0700 John Stultz wrote:
> On Tue, Aug 22, 2017 at 7:56 PM, John Stultz <john.stu...@linaro.org> wrote:
> > On Tue, Aug 22, 2017 at 7:34 PM, Jisheng Zhang <jszh...@marvell.com> wrote:
> >
> >> On Tue, 22 Aug 2017 18:51:08 -070
On Tue, 22 Aug 2017 19:57:04 -0700 John Stultz wrote:
> On Tue, Aug 22, 2017 at 7:56 PM, John Stultz wrote:
> > On Tue, Aug 22, 2017 at 7:34 PM, Jisheng Zhang wrote:
> >
> >> On Tue, 22 Aug 2017 18:51:08 -0700 Greg KH wrote:
> >>
> >>> On T
On Tue, 22 Aug 2017 19:56:07 -0700 John Stultz wrote:
> External Email
>
> --
> On Tue, Aug 22, 2017 at 7:34 PM, Jisheng Zhang <jszh...@marvell.com> wrote:
> > On Tue, 22 Aug 2017 18:51:08 -0700 Greg KH
On Tue, 22 Aug 2017 19:56:07 -0700 John Stultz wrote:
> External Email
>
> --
> On Tue, Aug 22, 2017 at 7:34 PM, Jisheng Zhang wrote:
> > On Tue, 22 Aug 2017 18:51:08 -0700 Greg KH wrote:
> >
> &g
On Tue, 22 Aug 2017 18:51:08 -0700 Greg KH wrote:
> On Tue, Aug 08, 2017 at 07:03:05PM +0800, Jisheng Zhang wrote:
> > As noted in commit d0bdff0db809 ("staging: Fix build issues with new
> > binder API"), we can add back the choice for 32bit ARM "once a 64bit
>
On Tue, 22 Aug 2017 18:51:08 -0700 Greg KH wrote:
> On Tue, Aug 08, 2017 at 07:03:05PM +0800, Jisheng Zhang wrote:
> > As noted in commit d0bdff0db809 ("staging: Fix build issues with new
> > binder API"), we can add back the choice for 32bit ARM "once a 64bit
>
ister() can be reused.
> >
> > Also, rename the jump labels to say what the goto does. (Coding style
> > suggested by Documentation/process/coding-style.rst)
> >
> > Signed-off-by: Masahiro Yamada <yamada.masah...@socionext.com>
>
> Cc'ing Jisheng Zhang
ister() can be reused.
> >
> > Also, rename the jump labels to say what the goto does. (Coding style
> > suggested by Documentation/process/coding-style.rst)
> >
> > Signed-off-by: Masahiro Yamada
>
> Cc'ing Jisheng Zhang, but looks ok to me.
I have no pla
dded the
support, so it's time to let ANDROID_BINDER_IPC_32BIT be selectable on
32bit ARM
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/android/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/android/Kconfig b/drivers/android/Kconfig
ind
dded the
support, so it's time to let ANDROID_BINDER_IPC_32BIT be selectable on
32bit ARM
Signed-off-by: Jisheng Zhang
---
drivers/android/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/android/Kconfig b/drivers/android/Kconfig
index 832e885349b1..aca5dc30b97
Hi all,
I notice there's one regulator driver for NCP6335D in android-msm repo:
https://android.googlesource.com/kernel/msm/+log/android-msm-dory-3.10-kitkat-wear/drivers/regulator/onsemi-ncp6335d.c
Is there anyone want to make it mainlined?
Thanks,
Jisheng
Hi all,
I notice there's one regulator driver for NCP6335D in android-msm repo:
https://android.googlesource.com/kernel/msm/+log/android-msm-dory-3.10-kitkat-wear/drivers/regulator/onsemi-ncp6335d.c
Is there anyone want to make it mainlined?
Thanks,
Jisheng
if fan53555_regulator_probe() is called and the "client->dev.of_node"
isn't NULL, it means OF registered a device with a valid compatible
string, so match cannot be NULL.
Use of_device_get_match_data() to retrieve the drvdata pointer. No
functional change intended.
Signed-off-by:
if fan53555_regulator_probe() is called and the "client->dev.of_node"
isn't NULL, it means OF registered a device with a valid compatible
string, so match cannot be NULL.
Use of_device_get_match_data() to retrieve the drvdata pointer. No
functional change intended.
Signed-off-by:
The ATU CTRL2 register is 32 bit, besides the enable bit, other bits
may also be set. To check whether the ATU is enabled or not, we should
test the enable bit.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Acked-by: Joao Pinto <jpi...@synopsys.com>
---
Since v1:
- Add Joao'
The ATU CTRL2 register is 32 bit, besides the enable bit, other bits
may also be set. To check whether the ATU is enabled or not, we should
test the enable bit.
Signed-off-by: Jisheng Zhang
Acked-by: Joao Pinto
---
Since v1:
- Add Joao's Ack
- Fix typo in commit msg, thank Jingoo
drivers
The ATU CTRL2 register is 32 bit, besides the enable bit, other bits
may also be set. To check whether the ATU is enabled or not, we should
test the enable it.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/pci/dwc/pcie-designware.c | 2 +-
1 file changed, 1 insertion
The ATU CTRL2 register is 32 bit, besides the enable bit, other bits
may also be set. To check whether the ATU is enabled or not, we should
test the enable it.
Signed-off-by: Jisheng Zhang
---
drivers/pci/dwc/pcie-designware.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Tue, 4 Jul 2017 09:02:06 +0100 Ard Biesheuvel wrote:
> On 4 July 2017 at 07:58, Jisheng Zhang <jszh...@marvell.com> wrote:
> > On Mon, 3 Jul 2017 08:27:04 -0500 wrote:
> >
> >> [+cc Jingoo, Joao]
> >>
> >> On Mon, Jul 03, 2017 at 10:35:50AM
On Tue, 4 Jul 2017 09:02:06 +0100 Ard Biesheuvel wrote:
> On 4 July 2017 at 07:58, Jisheng Zhang wrote:
> > On Mon, 3 Jul 2017 08:27:04 -0500 wrote:
> >
> >> [+cc Jingoo, Joao]
> >>
> >> On Mon, Jul 03, 2017 at 10:35:50AM +0100, Ard Biesheuvel wrot
On Tue, 4 Jul 2017 14:58:40 +0800 Jisheng Zhang wrote:
> On Mon, 3 Jul 2017 08:27:04 -0500 wrote:
>
> > [+cc Jingoo, Joao]
> >
> > On Mon, Jul 03, 2017 at 10:35:50AM +0100, Ard Biesheuvel wrote:
> > > On 3 July 2017 at 00:18, Bjorn Helgaas <helg...@kernel
On Tue, 4 Jul 2017 14:58:40 +0800 Jisheng Zhang wrote:
> On Mon, 3 Jul 2017 08:27:04 -0500 wrote:
>
> > [+cc Jingoo, Joao]
> >
> > On Mon, Jul 03, 2017 at 10:35:50AM +0100, Ard Biesheuvel wrote:
> > > On 3 July 2017 at 00:18, Bjorn Helgaas wrote:
>
On Mon, 3 Jul 2017 08:27:04 -0500 wrote:
> [+cc Jingoo, Joao]
>
> On Mon, Jul 03, 2017 at 10:35:50AM +0100, Ard Biesheuvel wrote:
> > On 3 July 2017 at 00:18, Bjorn Helgaas wrote:
> > > On Tue, Jun 20, 2017 at 10:17:40AM +0200, Marc Gonzalez wrote:
> > >> This driver is
On Mon, 3 Jul 2017 08:27:04 -0500 wrote:
> [+cc Jingoo, Joao]
>
> On Mon, Jul 03, 2017 at 10:35:50AM +0100, Ard Biesheuvel wrote:
> > On 3 July 2017 at 00:18, Bjorn Helgaas wrote:
> > > On Tue, Jun 20, 2017 at 10:17:40AM +0200, Marc Gonzalez wrote:
> > >> This driver is required to work
On Wed, 21 Jun 2017 16:09:34 +1000
Stephen Rothwell wrote:
> Hi Linus,
>
> After merging the gpio tree, today's linux-next build (arm
> multi_v7_defconfig) failed like this:
>
> drivers/gpio/gpio-dwapb.c: In function 'dwapb_irq_set_type':
>
On Wed, 21 Jun 2017 16:09:34 +1000
Stephen Rothwell wrote:
> Hi Linus,
>
> After merging the gpio tree, today's linux-next build (arm
> multi_v7_defconfig) failed like this:
>
> drivers/gpio/gpio-dwapb.c: In function 'dwapb_irq_set_type':
> drivers/gpio/gpio-dwapb.c:291:2: error: stray '\357'
The dw_pcie_host_ops structures are never modified. Constify these
structures such that these can be write-protected.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/pci/dwc/pci-dra7xx.c | 2 +-
drivers/pci/dwc/pci-exynos.c | 2 +-
drivers/pci/dwc/pci-
The dw_pcie_host_ops structures are never modified. Constify these
structures such that these can be write-protected.
Signed-off-by: Jisheng Zhang
---
drivers/pci/dwc/pci-dra7xx.c | 2 +-
drivers/pci/dwc/pci-exynos.c | 2 +-
drivers/pci/dwc/pci-imx6.c | 2
On Tue, 16 May 2017 14:22:11 +0200 Andrew Lunn wrote:
> On Tue, May 16, 2017 at 02:17:20PM +0800, Jisheng Zhang wrote:
> > Currently, the xenon_clean_phy() is only used for freeing phy_params.
> > The phy_params is allocated by devm_kzalloc(), there's no need to free
&g
On Tue, 16 May 2017 14:22:11 +0200 Andrew Lunn wrote:
> On Tue, May 16, 2017 at 02:17:20PM +0800, Jisheng Zhang wrote:
> > Currently, the xenon_clean_phy() is only used for freeing phy_params.
> > The phy_params is allocated by devm_kzalloc(), there's no need to free
&g
Currently, the xenon_clean_phy() is only used for freeing phy_params.
The phy_params is allocated by devm_kzalloc(), there's no need to free
is explicitly.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/mmc/host/sdhci-xenon-phy.c | 14 +-
drivers/mmc/host
Currently, the xenon_clean_phy() is only used for freeing phy_params.
The phy_params is allocated by devm_kzalloc(), there's no need to free
is explicitly.
Signed-off-by: Jisheng Zhang
---
drivers/mmc/host/sdhci-xenon-phy.c | 14 +-
drivers/mmc/host/sdhci-xenon.c | 6
hould
also check ci->roles[CI_ROLE_GADGET].
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
Since v1:
- check ci->roles[CI_ROLE_GADGET] before destroying the otg, suggested
by Peter.
drivers/usb/chipidea/core.c | 29 +
1 file changed, 21 insertions(+)
hould
also check ci->roles[CI_ROLE_GADGET].
Signed-off-by: Jisheng Zhang
---
Since v1:
- check ci->roles[CI_ROLE_GADGET] before destroying the otg, suggested
by Peter.
drivers/usb/chipidea/core.c | 29 +
1 file changed, 21 insertions(+), 8 deletions(-)
diff --g
On Tue, 25 Apr 2017 17:21:59 +0200
Stefan Wahren wrote:
> Am 25.04.2017 um 11:20 schrieb Peter Chen:
> >
> diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
> index f88e9157fad0..60a786c87c06 100644
> --- a/drivers/usb/chipidea/udc.c
On Tue, 25 Apr 2017 17:21:59 +0200
Stefan Wahren wrote:
> Am 25.04.2017 um 11:20 schrieb Peter Chen:
> >
> diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
> index f88e9157fad0..60a786c87c06 100644
> --- a/drivers/usb/chipidea/udc.c
> +++
If ci_hdrc_host_init() or ci_hdrc_gadget_init() returns error and the
error != -ENXIO, as Peter pointed out, "it stands for initialization
for host or gadget has failed", so we'd better return failure rather
continue.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
driv
If ci_hdrc_host_init() or ci_hdrc_gadget_init() returns error and the
error != -ENXIO, as Peter pointed out, "it stands for initialization
for host or gadget has failed", so we'd better return failure rather
continue.
Signed-off-by: Jisheng Zhang
---
drivers/usb/chipidea/c
Hi Peter,
On Tue, 25 Apr 2017 16:29:48 +0800 Peter Chen wrote:
> On Mon, Apr 24, 2017 at 12:35:51PM +0000, Jisheng Zhang wrote:
> > Fix below NULL pointer dereference. we set ci->roles[CI_ROLE_GADGET]
> > too early in ci_hdrc_gadget_init(), if udc_start() fails due to some
Hi Peter,
On Tue, 25 Apr 2017 16:29:48 +0800 Peter Chen wrote:
> On Mon, Apr 24, 2017 at 12:35:51PM +0000, Jisheng Zhang wrote:
> > Fix below NULL pointer dereference. we set ci->roles[CI_ROLE_GADGET]
> > too early in ci_hdrc_gadget_init(), if udc_start() fails due to some
from_fork+0x10/0x50
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/usb/chipidea/udc.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index f88e9157fad0..60a786c87c06 100644
--- a/drivers/usb
from_fork+0x10/0x50
Signed-off-by: Jisheng Zhang
---
drivers/usb/chipidea/udc.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index f88e9157fad0..60a786c87c06 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/dr
pcie-qcom and vmd as well.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/pci/dwc/pcie-designware-plat.c | 3 ++-
drivers/pci/dwc/pcie-qcom.c| 3 ++-
drivers/pci/host/vmd.c | 3 ++-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/driv
pcie-qcom and vmd as well.
Signed-off-by: Jisheng Zhang
---
drivers/pci/dwc/pcie-designware-plat.c | 3 ++-
drivers/pci/dwc/pcie-qcom.c| 3 ++-
drivers/pci/host/vmd.c | 3 ++-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/dwc/pcie-designware
support WOL.
2. in mvneta_ethtool_set_wol(), call device_set_wakeup_enable() to
set power.wakeup if WOL has been successfully enabled in phy.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/net/ethernet/marvell/mvneta.c | 12 +++-
1 file changed, 11 insertions(+), 1 de
support WOL.
2. in mvneta_ethtool_set_wol(), call device_set_wakeup_enable() to
set power.wakeup if WOL has been successfully enabled in phy.
Signed-off-by: Jisheng Zhang
---
drivers/net/ethernet/marvell/mvneta.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers
Commit 67809b974a07 ("GPIO: gpio-dwapb: Change readl to
dwapb_read_write") missed this readl_relaxed() usage, I'm not
sure the reason, maybe for performance reason? But if we do care
the performance, we could use the relaxed io in dwapb_read and
dwapb_write.
Signed-off-by: Jisheng Z
Commit 67809b974a07 ("GPIO: gpio-dwapb: Change readl to
dwapb_read_write") missed this readl_relaxed() usage, I'm not
sure the reason, maybe for performance reason? But if we do care
the performance, we could use the relaxed io in dwapb_read and
dwapb_write.
Signed-off-by: Jis
On Tue, 11 Apr 2017 13:31:16 +0300 Adrian Hunter wrote:
> On 11/04/17 13:20, Jisheng Zhang wrote:
> > We found one issue on BG4CT platforms with GPIO for sdcar card detect
> > interrupt: remove sdcard when there's read write access to the sdcard,
> > sometimes the ca
On Tue, 11 Apr 2017 13:31:16 +0300 Adrian Hunter wrote:
> On 11/04/17 13:20, Jisheng Zhang wrote:
> > We found one issue on BG4CT platforms with GPIO for sdcar card detect
> > interrupt: remove sdcard when there's read write access to the sdcard,
> > sometimes the ca
patch2 is the real fix
Jisheng Zhang (2):
mmc: slot-gpio: check cd_gpio before setting up cd_gpio_isr
mmc: sdhci: provide isr for card-detect interrupts
drivers/mmc/core/slot-gpio.c | 3 +++
drivers/mmc/host/sdhci.c | 12
2 files changed, 15 insertions(+)
--
2.11.0
patch2 is the real fix
Jisheng Zhang (2):
mmc: slot-gpio: check cd_gpio before setting up cd_gpio_isr
mmc: sdhci: provide isr for card-detect interrupts
drivers/mmc/core/slot-gpio.c | 3 +++
drivers/mmc/host/sdhci.c | 12
2 files changed, 15 insertions(+)
--
2.11.0
.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/mmc/core/slot-gpio.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mmc/core/slot-gpio.c b/drivers/mmc/core/slot-gpio.c
index a8450a8701e4..42b260593955 100644
--- a/drivers/mmc/core/slot-gpio.c
+++ b/drivers/mmc/cor
.
Signed-off-by: Jisheng Zhang
---
drivers/mmc/core/slot-gpio.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mmc/core/slot-gpio.c b/drivers/mmc/core/slot-gpio.c
index a8450a8701e4..42b260593955 100644
--- a/drivers/mmc/core/slot-gpio.c
+++ b/drivers/mmc/core/slot-gpio.c
@@ -162,6
that the sdhci_card_event() is missing in common slot gpio's card
detect isr.
We fix this issue by providing sdhci's own isr for card-detect
interrupts. In this own isr, we call sdhci_card_event() then process
the change of state.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/mmc/host/sdhci.
that the sdhci_card_event() is missing in common slot gpio's card
detect isr.
We fix this issue by providing sdhci's own isr for card-detect
interrupts. In this own isr, we call sdhci_card_event() then process
the change of state.
Signed-off-by: Jisheng Zhang
---
drivers/mmc/host/sdhci.c | 12
1 file
n't. It turns out
the rx mode isn't resumed correctly. This patch fixes it by adding
mvneta_set_rx_mode(dev) in the resume hook if interface is running.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
Since v1:
- rebased to the latest net-next tree and explictly mention it
dr
n't. It turns out
the rx mode isn't resumed correctly. This patch fixes it by adding
mvneta_set_rx_mode(dev) in the resume hook if interface is running.
Signed-off-by: Jisheng Zhang
---
Since v1:
- rebased to the latest net-next tree and explictly mention it
drivers/net/ethernet/marvell/mvnet
RGMII_RXID and RGMII_TX_ID share the same GMAC CTRL setting as RGMII
or RGMII_ID.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/net/ethernet/marvell/mvneta.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/et
RGMII_RXID and RGMII_TX_ID share the same GMAC CTRL setting as RGMII
or RGMII_ID.
Signed-off-by: Jisheng Zhang
---
drivers/net/ethernet/marvell/mvneta.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index
Dear David,
On Mon, 27 Mar 2017 16:15:34 -0700 David Miller wrote:
> From: Jisheng Zhang <jszh...@marvell.com>
> Date: Mon, 27 Mar 2017 18:59:05 +0800
>
> > I found a bug by:
> >
> > 0. boot and start dhcp client
> > 1. echo mem > /sys/power/state
&
Dear David,
On Mon, 27 Mar 2017 16:15:34 -0700 David Miller wrote:
> From: Jisheng Zhang
> Date: Mon, 27 Mar 2017 18:59:05 +0800
>
> > I found a bug by:
> >
> > 0. boot and start dhcp client
> > 1. echo mem > /sys/power/state
> > 2. resume back
n't. It turns out
the rx mode isn't resumed correctly. This patch fixes it by adding
mvneta_set_rx_mode(dev) in the resume hook if interface is running.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/net/ethernet/marvell/mvneta.c | 5 -
1 file changed, 4 insertions(+), 1
n't. It turns out
the rx mode isn't resumed correctly. This patch fixes it by adding
mvneta_set_rx_mode(dev) in the resume hook if interface is running.
Signed-off-by: Jisheng Zhang
---
drivers/net/ethernet/marvell/mvneta.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --
device);
> + struct net_device *dev = dev_get_drvdata(device);
> + struct mvneta_port *pp = netdev_priv(dev);
> + int err;
> +
> + clk_prepare_enable(pp->clk);
> + clk_prepare_enable(pp->clk_bus);
hmm, since clk_bus is optional, it's better to add chec
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